TWI414049B - 半導體裝置之製造方法 - Google Patents

半導體裝置之製造方法 Download PDF

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Publication number
TWI414049B
TWI414049B TW099116411A TW99116411A TWI414049B TW I414049 B TWI414049 B TW I414049B TW 099116411 A TW099116411 A TW 099116411A TW 99116411 A TW99116411 A TW 99116411A TW I414049 B TWI414049 B TW I414049B
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Taiwan
Prior art keywords
solder
semiconductor wafer
connection
electrodes
semiconductor
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TW099116411A
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English (en)
Chinese (zh)
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TW201104817A (en
Inventor
秦英惠
中村真人
木下順弘
紺野順平
依田智子
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瑞薩電子股份有限公司
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Publication of TW201104817A publication Critical patent/TW201104817A/zh
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Publication of TWI414049B publication Critical patent/TWI414049B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
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    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
TW099116411A 2009-07-16 2010-05-21 半導體裝置之製造方法 TWI414049B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009167716A JP5465942B2 (ja) 2009-07-16 2009-07-16 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
TW201104817A TW201104817A (en) 2011-02-01
TWI414049B true TWI414049B (zh) 2013-11-01

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Family Applications (1)

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TW099116411A TWI414049B (zh) 2009-07-16 2010-05-21 半導體裝置之製造方法

Country Status (4)

Country Link
US (1) US8633103B2 (enExample)
JP (1) JP5465942B2 (enExample)
CN (2) CN101958298A (enExample)
TW (1) TWI414049B (enExample)

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US9324905B2 (en) 2011-03-15 2016-04-26 Micron Technology, Inc. Solid state optoelectronic device with preformed metal support substrate
JP5613100B2 (ja) * 2011-04-21 2014-10-22 パナソニック株式会社 半導体装置の製造方法
JP5638144B2 (ja) 2011-09-16 2014-12-10 パナソニック株式会社 実装構造およびその製造方法
US8497579B1 (en) * 2012-02-16 2013-07-30 Chipbond Technology Corporation Semiconductor packaging method and structure thereof
CN102637747A (zh) * 2012-04-05 2012-08-15 祁门县硅鼎电子元件厂 镀涂环保材料的双铜质电极整流管芯片及镀涂工艺
DE102013103081A1 (de) * 2013-03-26 2014-10-02 Osram Opto Semiconductors Gmbh Verfahren zum Verbinden von Fügepartnern und Anordnung von Fügepartnern
JP2015122445A (ja) * 2013-12-24 2015-07-02 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN104282582B (zh) * 2014-09-17 2017-02-01 中南大学 一种Ni‑P基板的封装方法
US10886250B2 (en) 2015-07-10 2021-01-05 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
TWI822659B (zh) 2016-10-27 2023-11-21 美商艾德亞半導體科技有限責任公司 用於低溫接合的結構和方法
JP6621068B2 (ja) * 2016-12-08 2019-12-18 パナソニックＩｐマネジメント株式会社 実装構造体
KR20230126736A (ko) 2020-12-30 2023-08-30 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 전도성 특징부를 갖는 구조 및 그 형성방법
KR20230058949A (ko) * 2021-10-25 2023-05-03 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법
CN116313834B (zh) * 2023-05-24 2023-09-12 江西兆驰半导体有限公司 晶圆级封装方法及晶圆级封装结构

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