CN104637826A - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

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Publication number
CN104637826A
CN104637826A CN201410452983.2A CN201410452983A CN104637826A CN 104637826 A CN104637826 A CN 104637826A CN 201410452983 A CN201410452983 A CN 201410452983A CN 104637826 A CN104637826 A CN 104637826A
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Prior art keywords
semiconductor chip
salient pole
projection
semiconductor device
semiconductor
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CN201410452983.2A
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CN104637826B (zh
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筑山慧至
福田昌利
尾山幸史
深山真哉
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Kioxia Corp
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Toshiba Corp
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Abstract

本发明提供一种能够抑制凸块的接合不良的半导体装置的制造方法。实施方式是在第一半导体芯片的第一面形成第一凸块电极，且在第二半导体芯片的第二面形成第二凸块电极与突起。以第一面与第二面相对的方式，使用突起将第一&第二半导体芯片固定。对所述第一半导体芯片与所述第二半导体芯片进行回流焊而使它们电连接，其后以低于回流焊温度的温度使突起硬化。

Description

半导体装置的制造方法
[相关申请案]
本申请案享有以日本专利申请案2013-230650号(申请日：2013年11月6日)作为基础申请案的优先权。本申请案通过参照该基础申请案而包含基础申请案的全部内容。
技术领域
本发明的实施方式涉及一种半导体装置的制造方法。
背景技术
为了实现半导体装置的小型化或高功能化，在一个封装体内积层多个半导体芯片并密封而成的SiP(System in Package，系统级封装)构造的半导体装置不断被实用化。在SiP构造的半导体装置中，要求高速地收发半导体芯片间的电信号。在这种情况下，半导体芯片间的电连接使用微凸块。微凸块具有例如5～50μm左右的直径，且以10～100μm左右之间距通过焊料形成在半导体芯片的表面。
这种半导体装置中，期望谋求抑制微凸块的接合不良。
发明内容
本发明的一个实施方式提供一种能够抑制凸块的接合不良的半导体装置的制造方法。
根据本发明的一个实施方式，在第一半导体芯片的第一面形成第一凸块电极，在第二半导体芯片的第二面形成第二凸块电极与突起，以所述第一面与所述第二面相对的方式，使用所述突起将所述第一半导体芯片与所述第二半导体芯片固定，在高于所述第一凸块电极与所述第二凸块电极中所含的金属的至少一部分金属的熔点的温度环境下，将所述第一半导体芯片与所述第二半导体芯片电连接，在所述第一半导体芯片与所述第二半导体芯片的电连接之后，在低于所述第一凸块电极与所述第二凸块电极中所含的金属的熔点的温度环境下使所述突起硬化。
附图说明
图1是第一实施方式的半导体装置的剖视图。
图2是沿图1所示的A-A线的箭线剖视图。
图3是表示半导体装置的制造步骤的流程图。
图4是表示半导体装置的制造步骤的剖视图。
图5是表示半导体装置的制造步骤的剖视图。
图6是表示图1所示的半导体装置的制造步骤的流程图，且是表示作为比较例的制造步骤的流程图。
图7是第二实施方式的半导体装置的剖视图。
具体实施方式
以下，参照附图对实施方式的半导体装置进行详细说明。此外，并非由这些实施方式限定本发明。例如，本实施方式的表示上下左右等方向的说明是指将附图上的上方向设为上的情况下的相对方向。即，存在本实施方式中所示的方向与以重力加速度方向为基准的方向不同的情况。
(第一实施方式)
首先，对半导体装置的构成进行说明。图1是第一实施方式的半导体装置的剖视图。图2是沿图1所示的A-A线的箭线剖视图。半导体装置10包含第一半导体芯片2与第二半导体芯片3。第一半导体芯片2的上表面(第一面)2a具有第一连接区域，且在第一连接区域内形成着第一凸块电极5a。第二半导体芯片3的下表面(第二面)3a具有与第一连接区域相对的第二连接区域，且在第二连接区域内形成着第二凸块电极5b。具有第一面2a的第一半导体芯片2、与具有第二面3a的第二半导体芯片3以使第一面2a与第二面3a相对的方式积层。另外，第二半导体芯片3使第二凸块电极5b与第一凸块电极5a连接，且积层在第一半导体芯片2上。即，第一半导体芯片2与第二半导体芯片3经由第一凸块电极5a与第二凸块电极5b的连接体(凸块连接部)5而电性及机械地连接。所谓连接区域，意指半导体芯片2、3的表面2a、3a上的第一凸块电极5a、第二凸块电极5b的形成区域。所谓第一凸块电极5a、第二凸块电极5b，意指形成将第一半导体芯片2与第二半导体芯片3电性及机械地连接的凸块连接部的电极。
第一凸块电极5a与第二凸块电极5b中所使用的材料可例示焊料、金(Au)等。作为第一凸块电极5a与第二凸块电极5b的组合，可例示焊料/焊料、金(Au)/焊料、焊料/金(Au)、金(Au)/金(Au)等组合。作为形成第一凸块电极5a与第二凸块电极5b的焊料，可例示无铅(Pb)焊料，该无铅(Pb)焊料使用在锡(Sn)中添加着铜(Cu)、银(Ag)、铋(Bi)、铟(In)等的锡(Sn)合金。作为无铅(Pb)焊料的具体例，可列举锡(Sn)-铜(Cu)合金、锡(Sn)-银(Ag)合金、锡(Sn)-银(Ag)-铜(Cu)合金等。形成第一凸块电极5a与第二凸块电极5b的金属也可以使用铜(Cu)、镍(Ni)、锡(Sn)、钯(Pd)、银(Ag)等来代替金(Au)。这些金属并不限于单层膜，也可以使用多层的金属积层膜。作为第一凸块电极5a、第二凸块电极5b的形状，可列举半球状或柱状等突起形状，但也可以为像焊垫那样的平坦形状。作为第一凸块电极5a与第二凸块电极5b的组合，可列举突起体彼此的组合、突起体与平坦体的组合等。此处，本实施方式是采取如下例子进行说明，即，对第一凸块电极5a使用从第一半导体芯片2侧起为镍(Ni)与金(Au)的积层膜，对第二凸块电极5b使用从第二半导体芯片3侧起为镍(Ni)与无铅(Pb)焊料的积层膜。第一半导体芯片2与第二半导体芯片3经由凸块连接部5而电连接。经由凸块连接部5在第一半导体芯片2与第二半导体芯片3之间收发电信号。
在第一半导体芯片2的上表面2a上的除第一连接区域以外的区域(第一非连接区域)、及第二半导体芯片3的下表面3a上的除第二连接区域以外的区域(第二非连接区域)的至少一区域设置着突起6。突起6由使用例如环氧树脂、聚酰亚胺树脂、丙烯酸系树脂、酚系树脂等的热固性树脂形成。突起6是以第一半导体芯片2与第二半导体芯片3之间的间隙(间距)成为所设定的凸块电极5a、5b的连接高度(凸块连接部5的设定高度)的方式设置。在压接第一半导体芯片2与第二半导体芯片3时，它们的间隙(间距)由突起6界定，因此能够抑制凸块连接部5的过度压扁或凸块电极5a、5b间的连接不良(开路不良)等的产生。
突起6的前端与第一非连接区域及第二非连接区域的另一区域粘着。在将第一凸块电极5a与第二凸块电极5b连接时，突起6强化第一半导体芯片2与第二半导体芯片3的连接状态。在经由凸块连接部5而连接的第一半导体芯片2的第一面2a与第二半导体芯片3的第二面3a的间隙中填充着底部填充树脂7。通过在第一半导体芯片2的第一非连接区域与第二半导体芯片3的第二非连接区域之间设置突起6，而能够提高填充底部填充树脂7之前的第一半导体芯片2与第二半导体芯片3的连接强度。即，第一半导体芯片2与第二半导体芯片3在填充底部填充树脂7之前，除了通过第一凸块电极5a与第二凸块电极5b的凸块连接部5而连接以外，也通过突起6而连接。因此，可提高填充底部填充树脂7之前的连接强度。
设置在第一半导体芯片2的第一凸块电极5a与设置在第二半导体芯片3的第二凸块电极5b通过例如一面加热一面进行压接而连接。在半导体芯片2、3的表面设置着像聚酰亚胺树脂膜那样的未图示的有机绝缘膜(绝缘膜)作为通常保护膜。构成半导体芯片2、3的硅基板的热膨胀系数为3ppm左右，相对于此，聚酰亚胺树脂的热膨胀系数较大为35ppm左右。因此，在半导体芯片2、3易产生翘曲，尤其是有半导体芯片2、3的厚度变得越薄则翘曲量变得越大的倾向。此处，利用突起6强化与半导体芯片2、3的连接状态，从而可抑制在将凸块电极5a、5b连接时、或连接之后因半导体芯片2、3的翘曲而导致凸块电极5a、5b的凸块连接部5破断的情况。
突起6在半导体芯片2、3间局部地设置。因此，可提高第一半导体芯片2与第二半导体芯片3的位置对准精度或第一凸块电极5a与第二凸块电极5b的连接性。例如将像NCF(Non Conductive Film，非导电性膜)那样的兼具粘着功能与密封功能的绝缘树脂层配置在半导体芯片间的整个间隙的方法中，在将第一半导体芯片2与第二半导体芯片3位置对准时，对准标记的检测精度会下降。凸块电极5a、5b的间距变得越窄，则要求更进一步提高位置对准精度。将突起6以不覆盖对准标记的方式局部地设置而提高对准标记的检测精度，由此可使半导体芯片2、3间的位置对准精度提升。
配置在半导体芯片2、3间的整个间隙的绝缘树脂层有进入到第一凸块电极5a与第二凸块电极5b之间而使连接性下降的担忧，相对于此，局部地设置的突起6由于不会进入到凸块电极5a、5b间，所以较少存在使凸块电极5a、5b间的连接性下降的担忧。因此，可使第一凸块电极5a与第二凸块电极5b的连接性提升。进而，在存在配置于半导体芯片2、3间的整个间隙的绝缘树脂层的情况下，在半导体芯片2、3间的连接时或粘着时易产生卷入空隙。产生于连接区域的空隙有时会使凸块连接部5产生未被树脂覆盖的状态，所以有在电极间产生短路的担忧。在本实施方式中，使用突起6提高半导体芯片2、3间的连接强度，并且将凸块电极5a、5b间连接，且在凸块电极5a、5b上填充着底部填充树脂7。因此，可将凸块连接部5以确实地覆盖的状态密封，从而能够提高可靠性。
接下来，对半导体装置10的制造步骤进行说明。图3是表示半导体装置10的制造步骤的流程图。图4是表示半导体装置10的制造步骤的剖视图。图5是表示半导体装置10的制造步骤的剖视图。
首先，在第一半导体芯片2的第一面2a形成第一凸块电极5a，在第二半导体芯片3的第二面3a形成第二凸块电极5b(步骤S1)。第一凸块电极5a形成在第一面2a的表面上所形成的表面电极8上。第二凸块电极5b形成在第二面3a的表面上所形成的表面电极8上。表面电极8电连接于形成在半导体芯片的贯通电极或内部配线。表面电极8形成在使第一半导体芯片2与第二半导体芯片3积层时相互相对的位置。表面电极8使用例如铜(Cu)、铝(Al)、镍(Ni)、金(Au)等。这些金属并不限于单层膜，也可以使用多层金属积层膜。也可以省略第一凸块电极5a、第二凸块电极5b中的其中一者。
接着，在第二半导体芯片3的第二面3a形成突起6(步骤S2)。突起6形成在第二半导体芯片3的第二面3a上的第二非连接区域。在本实施方式中，使突起6以柱状体的形式散布在第二面3a的整个非连接区域。此外，突起6也可以形成在第一半导体芯片2的第一面2a，或者也可以形成在第一面2a与第二面3a的两者。突起6优选为设置在与第一凸块电极5a或第二凸块电极5b相隔的位置。突起6优选为由使用例如环氧树脂、聚酰亚胺树脂、丙烯酸系树脂、酚系树脂等的热固性树脂形成。突起6可应用光刻技术或者利用分配器或喷墨的涂布技术而形成，或者可通过膜的粘着而形成。在涂布液状的热固性树脂组成物而形成突起6的情况下，优选为预先设为半硬化状态。或者，优选为使用速硬化型的材料缩短半导体芯片2、3的粘着、连接时的时间。
接着，进行积层第一半导体芯片2与第二半导体芯片3的积层步骤(步骤S3)。此处，使第一面2a与第二面3a相对，且将第一半导体芯片2与第二半导体芯片3以重叠的状态暂时固定。如图4、5所示，将吸附保持在接合头12的第二半导体芯片3配置在平台11上所载置的第一半导体芯片2。第一半导体芯片2与第二半导体芯片3的位置对准是例如通过省略图示的照相机等检测第一及第二半导体芯片2、3的对准标记而进行。此外，只要以不覆盖整个第一面2a或第二面3a而散布的方式形成突起6便可，所以可在避开对准标记的位置形成突起6。如果在避开对准标记的位置形成突起6，那么变得易于容易且确实地进行对准标记的检测。
另外，以小于等于第一凸块电极5a或第二凸块电极5b中所使用的金属的熔点、且可使突起6显现粘着性的温度环境下及时间，进行步骤S3的步骤，由此第一半导体芯片2与第二半导体芯片3由突起6暂时固定。例如，通过在150℃的环境下进行1秒的压接，而利用突起6将第一半导体芯片2与第二半导体芯片3暂时固定。此外，在以下的说明中，将被暂时固定的第一半导体芯片2与第二半导体芯片3也统称为芯片积层体。
接着，进行回流焊步骤，使形成在第一面2a与第二面3a的第一凸块电极5a或第二凸块电极5b中所含的金属的至少一部分熔融，而使第一凸块电极5a与第二凸块电极5b相互接合(步骤S4)。例如，将芯片积层体配置在回流焊炉内。例如，在回流焊炉内，将大于等于第二凸块电极5b中所使用的无铅(Pb)焊料的熔点即250℃设为峰值温度。接着，将芯片积层体在回流焊炉内在峰值温度下配置60秒。此处，为了去除第一凸块电极5a及第二凸块电极5b的表面氧化膜并且使第一凸块电极5a与第二凸块电极5b接合，而例如将回流焊炉内设为还原气氛。通过利用回流焊步骤将第一凸块电极5a与第二凸块电极5b接合，而使第一半导体芯片2与第二半导体芯片3经由凸块连接部5电连接。
接着，进行使利用热固性树脂的突起6硬化的固化步骤(步骤S5)。例如，将芯片积层体在小于等于第一凸块电极5a或第二凸块电极5b中所含的金属的熔点(在本实施方式的例子中为小于等于第一凸块电极5a或第二凸块电极5b中所含的金属中的熔点最低的无铅(Pb)焊料的熔点)、且热固性树脂的硬化进行的180℃的环境下配置两小时。通过使突起6硬化，而将第一半导体芯片2与第二半导体芯片3比暂时固定的状态更牢固地固定。
接着，向第一半导体芯片2的第一面2a与第二半导体芯片3的第二面3a之间填充底部填充树脂7(步骤S6)。其后，使所填充的底部填充树脂7硬化(步骤S7)。通过以上步骤而制造半导体装置10。此处虽省略了图示，但半导体装置1是搭载在具有外部连接端子的配线基板或引线框架等电路基材上而用作SiP构造的半导体装置等。通过倒装芯片接合或线接合等实施半导体装置1与电路基材的连接。
本实施方式的半导体装置10在回流焊步骤(S4)之前的阶段中，通过突起6将第一半导体芯片2与第二半导体芯片3暂时固定，所以可抑制半导体芯片2、3在回流焊后翘曲。因此，能够抑制因半导体芯片2、3的翘曲而导致第一凸块电极5a与第二凸块电极5b的凸块连接部5在填充底部填充树脂7之前破断。
另外，突起6是以散布在半导体芯片2、3的第一面2a或第二面3a的方式设置，所以与在整个第一面2a或第二面3a设置着突起6的情况相比，不易产生卷入空隙。由此，可提升半导体装置10的可靠性。另外，由于底部填充树脂7的填充步骤(S6)与底部填充树脂7的硬化步骤(S7)比固化步骤(S5)更靠后，所以可降低底部填充树脂7渗透到突起6而使突起6膨胀的可能性。突起6的膨胀会导致凸块连接部5破断。根据本实施方式的半导体装置10，通过抑制突起6的膨胀，可抑制凸块连接部5破断。
此外，也可以使用具有感光性及热固性的树脂形成突起6。作为感光性及热固性树脂的具体例，可列举像感光性粘着剂树脂那样的含有感光剂的热固性树脂。利用感光性及热固性树脂，可在突起6的形成阶段，使用光刻技术使突起6以柱状体的形式散布在第二面3a的整个非连接区域。进而，由于在后续的步骤(S5)的加热时进行热硬化，所以可将第一半导体芯片2与第二半导体芯片3更牢固地固定。
图6是表示图1所示的半导体装置的制造步骤的流程图，且是表示作为比较例的制造步骤的流程图。在作为比较例的制造步骤中，在步骤S14中进行固化步骤后，在步骤S15中进行回流焊步骤，固化步骤与回流焊步骤的顺序与本实施方式的制造步骤相反。除此以外的步骤与本实施方式的制造步骤相同。在作为比较例的制造步骤中，通过在固化步骤中使突起6硬化，而在实现半导体芯片2、3彼此的固定之后，在回流焊步骤中使第一凸块电极5a或第二凸块电极5b中所含的金属的至少一部分熔融，从而谋求第一凸块电极5a与第二凸块电极5b的接合。
此处，有时在半导体芯片2、3的表面设置像聚酰亚胺树脂膜那样的有机绝缘膜(绝缘膜)作为保护膜。因构成半导体芯片2、3的硅基板的热膨胀系数与聚酰亚胺树脂的热膨胀系数的差异，而导致在半导体芯片2、3易产生翘曲。尤其是有半导体芯片2、3的厚度变得越薄则翘曲量变得越大的倾向。在半导体芯片2、3的积层步骤(S3)中，半导体芯片2、3由平台11与接合头12夹入，由此半导体芯片2、3的翘曲被矫正，但当从平台11与接合头12之间取出芯片积层体时，半导体芯片2、3易于再次产生翘曲。在作为比较例的制造步骤中，利用固化步骤(S14)谋求半导体芯片2、3彼此的固定，由此抑制在半导体芯片2、3再次产生翘曲。
然而，在作为比较例的制造步骤中，存在介于第一凸块电极5a与表面电极8之间的镍或构成表面电极8的铜扩散到第一凸块电极5a中所使用的无铅(Pb)焊料内的情况。如果镍或铜等异种金属扩散到无铅(Pb)焊料内，那么无铅(Pb)焊料的熔点会上升。在无铅(Pb)焊料的熔点上升的情况下，如果不使回流焊步骤(S15)的温度升高，那么可能会产生凸块连接部5的连接不良。另一方面，如果使回流焊步骤(S15)的温度升高，那么有可能残留应力会相应地变大。
相对于此，如图3所示，本实施方式的制造步骤是在步骤S4中进行回流焊步骤，在步骤S5中进行固化步骤。即，在固化步骤之前进行回流焊步骤。藉此，可抑制镍(Ni)或铜(Cu)等异种金属的扩散，从而可谋求同时降低凸块连接部5的连接不良的可能性及降低残留应力。
另外，在本实施方式的制造步骤中，由于在积层步骤中利用突起6将第一半导体芯片2与第二半导体芯片3暂时固定，所以半导体芯片2、3不易再次产生翘曲。因此，即便在固化步骤之前进行回流焊步骤，也能够抑制因半导体芯片2、3的翘曲而导致凸块连接部5破断的情况。
图7是第二实施方式的半导体装置30的剖视图。半导体装置30包括第一半导体芯片21、第二半导体芯片22、第三半导体芯片23、及第四半导体芯片37。对第一半导体芯片21、第二半导体芯片22、及第三半导体芯片23可使用例如NAND(Not-AND，与非)闪速存储器。另外，对第四半导体芯片37可使用例如NAND控制器。第一半导体芯片21、第二半导体芯片22及第三半导体芯片23成为使用与第一实施方式相同的方法积层所得的芯片积层体20的构成的一部分。半导体装置30搭载在包含外部连接端子31与内部连接端子32的配线基板33上。第三半导体芯片23经由第三凸块电极38与第四半导体芯片37电连接。配线基板33的内部连接端子32经由设置在第四半导体芯片37的表面电极8及第四凸块电极39而与第四半导体芯片37电连接。在配线基板33上形成着将芯片积层体20与第四半导体芯片37等一起密封的树脂密封层36。
[符号的说明]
2、21     第一半导体芯片
2a        第一面
3、22     第二半导体芯片
3a        第二面
5         连接体(凸块连接部)
6         突起
7         底部填充树脂
8         表面电极
10        半导体装置
11        平台
12        接合头
20        芯片积层体
23        第三半导体芯片
31        外部连接端子
32        内部连接端子
33        配线基板
37        第四半导体芯片

Claims (7)

1.一种半导体装置的制造方法，其特征在于：在第一半导体芯片的第一面形成第一凸块电极；
在第二半导体芯片的第二面形成第二凸块电极与突起；
以所述第一面与所述第二面相对的方式，使用所述突起将所述第一半导体芯片与所述第二半导体芯片固定；
在高于所述第一凸块电极与所述第二凸块电极中所含的金属的至少一部分金属的熔点的温度环境下，将所述第一半导体芯片与所述第二半导体芯片电连接；且
在所述第一半导体芯片与所述第二半导体芯片的电连接之后，在低于所述第一凸块电极与所述第二凸块电极中所含的金属的熔点的温度环境下使所述突起硬化。
2.根据权利要求1所述的半导体装置的制造方法，其特征在于：包括使所述突起硬化之后，向所述第一面与所述第二面之间填充底部填充树脂，其后使所述底部填充树脂硬化的步骤。
3.根据权利要求1或2所述的半导体装置的制造方法，其特征在于：其中所述突起是相对于所述第二面以多个散布的方式形成。
4.根据权利要求3所述的半导体装置的制造方法，其特征在于：其中所述突起包含柱状体的形状。
5.根据权利要求1或2所述的半导体装置的制造方法，其特征在于：其中所述突起是使用光刻步骤以多个散布的方式形成。
6.根据权利要求5所述的半导体装置的制造方法，其特征在于：其中所述突起包含柱状体的形状。
7.根据权利要求1或2所述的半导体装置的制造方法，其特征在于：其中对所述第一半导体芯片与所述第二半导体芯片进行压接，而将所述第一半导体芯片与所述第二半导体芯片固定。
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