TWI275170B - Semiconductor device and its manufacturing method, electronic device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method, electronic device and its manufacturing method Download PDF

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Publication number
TWI275170B
TWI275170B TW092108665A TW92108665A TWI275170B TW I275170 B TWI275170 B TW I275170B TW 092108665 A TW092108665 A TW 092108665A TW 92108665 A TW92108665 A TW 92108665A TW I275170 B TWI275170 B TW I275170B
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Taiwan
Prior art keywords
layer
electrode pad
bonding layer
bonding
lead
Prior art date
Application number
TW092108665A
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English (en)
Chinese (zh)
Other versions
TW200402860A (en
Inventor
Kenichi Yamamoto
Toshiaki Morita
Munehiro Yamada
Ryosuke Kimoto
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Hitachi Ltd
Hitachi Ulsi Sys Co Ltd
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Publication of TW200402860A publication Critical patent/TW200402860A/zh
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Publication of TWI275170B publication Critical patent/TWI275170B/zh

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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2924/11—Device type
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    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3463—Solder compositions in relation to features of the printed circuit board or the mounting process

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
TW092108665A 2002-04-17 2003-04-15 Semiconductor device and its manufacturing method, electronic device and its manufacturing method TWI275170B (en)

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Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005183669A (ja) * 2003-12-19 2005-07-07 Tdk Corp 実装基板およびそれを用いた電子部品
US7005745B2 (en) * 2004-01-22 2006-02-28 Texas Instruments Incorporated Method and structure to reduce risk of gold embrittlement in solder joints
DE102004029584A1 (de) * 2004-06-18 2006-01-12 Infineon Technologies Ag Anordnung zur Erhöhung der Zuverlässigkeit von substratbasierten BGA-Packages
US20060068218A1 (en) 2004-09-28 2006-03-30 Hooghan Kultaransingh N Whisker-free lead frames
JP4817418B2 (ja) * 2005-01-31 2011-11-16 オンセミコンダクター・トレーディング・リミテッド 回路装置の製造方法
JP2006261569A (ja) * 2005-03-18 2006-09-28 Dowa Mining Co Ltd サブマウントおよびその製造方法
TWI462236B (zh) * 2005-03-18 2014-11-21 同和電子科技有限公司 副載置片及其製造方法
JP2006286944A (ja) * 2005-03-31 2006-10-19 Dowa Mining Co Ltd サブマウント及びその製造方法
KR100723497B1 (ko) * 2005-08-11 2007-06-04 삼성전자주식회사 솔더볼 랜드에 두 종류 이상의 표면처리부를 갖는인쇄회로기판 및 이를 포함하는 반도체 패키지
US7233074B2 (en) * 2005-08-11 2007-06-19 Texas Instruments Incorporated Semiconductor device with improved contacts
JP4569423B2 (ja) 2005-08-31 2010-10-27 株式会社日立製作所 半導体装置の製造方法
JP2007165420A (ja) * 2005-12-12 2007-06-28 Matsushita Electric Ind Co Ltd 半導体装置
JP2007258292A (ja) * 2006-03-22 2007-10-04 Nippon Inter Electronics Corp 縦型半導体装置
JP2007294899A (ja) * 2006-03-31 2007-11-08 Dowa Electronics Materials Co Ltd 半田層及びそれを用いた電子デバイス接合用基板並びに電子デバイス接合用サブマウント
US7727805B2 (en) * 2007-06-11 2010-06-01 Intel Corporation Reducing stress in a flip chip assembly
JP5331322B2 (ja) * 2007-09-20 2013-10-30 株式会社日立製作所 半導体装置
JP2009099589A (ja) * 2007-10-12 2009-05-07 Elpida Memory Inc ウエハまたは回路基板およびその接続構造体
US8367244B2 (en) * 2008-04-17 2013-02-05 Enovix Corporation Anode material having a uniform metal-semiconductor alloy layer
JP4991637B2 (ja) * 2008-06-12 2012-08-01 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US20090310320A1 (en) * 2008-06-16 2009-12-17 Weston Roth Low profile solder grid array technology for printed circuit board surface mount components
US9524945B2 (en) 2010-05-18 2016-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with L-shaped non-metal sidewall protection structure
EP2340554B1 (en) * 2008-09-18 2017-05-10 Imec Methods and systems for material bonding
JP2010161136A (ja) * 2009-01-07 2010-07-22 Panasonic Corp 半導体装置及びその製造方法
US8592995B2 (en) * 2009-07-02 2013-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method and structure for adhesion of intermetallic compound (IMC) on Cu pillar bump
US8841766B2 (en) 2009-07-30 2014-09-23 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall protection structure
US8377816B2 (en) * 2009-07-30 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming electrical connections
US8324738B2 (en) 2009-09-01 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned protection layer for copper post structure
KR101070098B1 (ko) * 2009-09-15 2011-10-04 삼성전기주식회사 인쇄회로기판 및 그의 제조 방법
US8659155B2 (en) * 2009-11-05 2014-02-25 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming copper pillar bumps
US8610270B2 (en) * 2010-02-09 2013-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and semiconductor assembly with lead-free solder
US9385095B2 (en) 2010-02-26 2016-07-05 Taiwan Semiconductor Manufacturing Company, Ltd. 3D semiconductor package interposer with die cavity
US8519537B2 (en) 2010-02-26 2013-08-27 Taiwan Semiconductor Manufacturing Company, Ltd. 3D semiconductor package interposer with die cavity
US8441124B2 (en) 2010-04-29 2013-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall protection structure
US8698306B2 (en) 2010-05-20 2014-04-15 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate contact opening
US9018758B2 (en) 2010-06-02 2015-04-28 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall spacer and metal top cap
US8546254B2 (en) 2010-08-19 2013-10-01 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming copper pillar bumps using patterned anodes
JP5557788B2 (ja) * 2011-04-07 2014-07-23 株式会社 日立パワーデバイス 電子装置の製造方法
JP5509295B2 (ja) * 2012-11-02 2014-06-04 パナソニック株式会社 半導体装置
US9355980B2 (en) 2013-09-03 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional chip stack and method of forming the same
US9653443B2 (en) 2014-02-14 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Thermal performance structure for semiconductor packages and method of forming same
US10026671B2 (en) 2014-02-14 2018-07-17 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
US9935090B2 (en) 2014-02-14 2018-04-03 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
US10056267B2 (en) 2014-02-14 2018-08-21 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
KR102356810B1 (ko) * 2015-01-22 2022-01-28 삼성전기주식회사 전자부품내장형 인쇄회로기판 및 그 제조방법
US9564416B2 (en) 2015-02-13 2017-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. Package structures and methods of forming the same
JP6451866B2 (ja) * 2015-11-16 2019-01-16 株式会社豊田中央研究所 接合構造体およびその製造方法
JP2017103434A (ja) * 2015-12-04 2017-06-08 トヨタ自動車株式会社 半導体装置
KR102373440B1 (ko) * 2017-03-17 2022-03-14 삼성디스플레이 주식회사 디스플레이 패널 및 이를 구비하는 디스플레이 장치
KR20190085590A (ko) * 2018-01-11 2019-07-19 삼성전자주식회사 반도체 장치, 이를 포함하는 반도체 패키지 및 이의 제조 방법
JP2022000676A (ja) 2020-06-19 2022-01-04 株式会社ジャパンディスプレイ 表示装置の製造方法
KR102837298B1 (ko) * 2020-12-22 2025-07-23 삼성전자주식회사 반도체 패키지 및 그 제조 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0634983A (ja) 1992-07-17 1994-02-10 Sharp Corp 貼合わせ装置
US6384344B1 (en) * 1995-06-19 2002-05-07 Ibiden Co., Ltd Circuit board for mounting electronic parts
JP3677983B2 (ja) 1998-02-05 2005-08-03 株式会社村田製作所 セラミック基板
JP2000244084A (ja) * 1999-02-24 2000-09-08 Kyocera Corp 配線基板
KR100306842B1 (ko) 1999-09-30 2001-11-02 윤종용 범프 패드에 오목 패턴이 형성된 재배치 웨이퍼 레벨 칩 사이즈 패키지 및 그 제조방법
JP2001144214A (ja) 1999-11-17 2001-05-25 Canon Inc 半導体装置およびその接合構造
JP3475147B2 (ja) * 2000-04-17 2003-12-08 株式会社タムラ製作所 はんだ接続部
JP2002146548A (ja) 2000-11-08 2002-05-22 Matsushita Electric Ind Co Ltd 無電解ニッケルめっき皮膜およびそれを用いたプリント配線板
JP3910363B2 (ja) * 2000-12-28 2007-04-25 富士通株式会社 外部接続端子

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JP2003309223A (ja) 2003-10-31
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