JP5557788B2 - 電子装置の製造方法 - Google Patents
電子装置の製造方法 Download PDFInfo
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Description
本発明の実験例1−6について図8を用いて説明する。Cuパッド4上に無電解Ni系めっき3、その上にフラッシュAuめっきを施したパッケージ基板5にフラックスを塗布し、直径0.4mmφの室温から200℃においてCu6Sn5相を含有するSn系はんだボール10を供給後、リフロー炉を用いてN2気流中で加熱してパッド上にはんだボール1を形成した。
接続構造は、実験例1−6と同じである。この電子装置の高温放置試験後のはんだボール/パッド接続部の接続強度を測定した。その結果を同じく表1に示す。初期接続強度の80%以上の強度を有している場合を○、80%未満の強度の場合を×で表記した。比較例1、2において、200℃1000hの高温放置試験後では、比較例1、2ともに初期接続強度の80%未満の強度となった。接続断面を観察すると、図16、図17のようなボイド200が接続界面に形成されていた。高温放置により界面反応が進み、化合物層18の成長に伴う体積変化で生じたボイド形成により、接続強度が低下したと考えられる。図18に、一例としてSn-3Ag-0.5Cuはんだで接続したサンプルを200℃で1000h高温放置したときの接続界面の断面を示す。Cu-Sn化合物のバリア層が形成されないため、SnとNiが反応してNi層が完全に消失し、更に下地のCuまでもSnと反応しCu-Sn化合物層が厚く形成されている。その結果、大きな体積変化が生じボイドが形成され、良好な接続状況を維持することができなくなる。
本発明の実験例7−12について図6、図19を用いて説明する。実装基板5上に、室温から200℃においてCu6Sn5相を含有するSn系はんだペースト11をメタルマスクを用いて印刷で供給した後、リフロー炉を用いてN2気流中で加熱してリード付き電子部品101を搭載した。
接続構造は、実験例7−12と同じである。この電子装置の高温放置試験後のはんだボール/パッド接続部の接続強度を測定した。その結果を表2に示す。初期接続強度の80%以上の強度を有している場合を○、80%未満の強度の場合を×で表記した。比較例3、4において、-40℃(30min.)/200℃(30min.)500サイクルの温度サイクル試験後、初期接続強度の80%以上の強度を維持することを確認した。しかしながら、比較例3、4において、200℃1000hの高温放置試験後では、比較例1、2ともに初期接続強度の80%未満の強度となった。接続断面を観察すると、図16、図17のようなボイド200が接続界面に形成されていた。高温放置により界面反応が進み、化合物層18の成長に伴う体積変化で生じたボイド形成により、接続強度が低下したと考えられる。
本発明の実験例13−18について図7、図11を用いて説明する。Ni系めっきを施したCuフレーム17の上に、室温から200℃においてCu6Sn5相を含有するSn系はんだ箔13を供給しホットプレート上で260℃に加熱し溶融した後、その上に半導体素子102をダイボンディングした。その後、半導体素子上面の電極とリード16をワイヤボンディングし、180℃でトランスファーモールドし電素装置を作製した。
接続構造は、実験例13−18と同じである。温度サイクル試験および高温放置試験後の熱抵抗変動を測定した。その結果を同じく表3に示す。初期から熱抵抗変動が30%以内の場合を○、20%以上の場合を×で表記した。実験例13−18の全てにおいて、-40℃(30min.)/200℃(30min.)500サイクルの温度サイクル試験後、熱抵抗変動が20%以内であることを確認した。しかしながら、比較例5、6において、200℃1000hの高温放置試験後では、熱抵抗変動が20%以上になった。接続断面を観察すると、図16、図17のようなボイド200が接続界面に形成されていた。高温放置により界面反応が進み、化合物層18の成長に伴う体積変化で生じたボイド形成により、大きな熱抵抗変動が生じたと考えられる。
Claims (10)
- 基板上の電極の上にSn系はんだ接続材料を配置する配置工程と、
前記基板及びSn系はんだ接続材料とを加熱し、前記電極と電気的に接続されたSn系はんだ接続部を形成する加熱工程とを有する電子機器の製造方法において、
前記電極上にはNi系層が形成されており、前記配置工程では、前記Sn系はんだ接続材料は、共晶組成よりCu6Sn5相の含有量が多い組成を有しており、当該Ni系層上に配置され、
前記加熱工程では、前記Sn系はんだ接続材料中のCu-Sn化合物である前記Cu6Sn5相が前記Ni系層の表面に析出または移動することによって前記Ni系層の表面を覆い、前記Sn系はんだ接続部と前記Ni系層とが互いに接しないようにするCu6Sn5化合物層を形成することを特徴とする電子装置の製造方法。 - 請求項1記載の電子装置の製造方法であって、
前記Cu-Sn化合物層と前記Ni系層は直接接しており、その間に他の単体の金属層を含まないことを特徴とする電子装置の製造方法。 - 請求項1または請求項2に記載の電子装置の製造方法であって、
前記Cu-Sn化合物層は、前記Cu-Sn化合物又はこれとNi-Sn化合物を主体とした層であることを特徴とする電子装置の製造方法。 - 請求項1乃至3のいずれかに記載の電子装置の製造方法であって、
前記Sn系はんだ接続材料は、はんだボール、はんだペースト、はんだめっきのいずれかの形態で提供されるものであることを特徴とする電子装置の製造方法。 - 請求項1乃至4のいずれかに記載の電子装置の製造方法であって、
前記加熱工程後のSn系はんだ接続部の中には、前記Cu6Sn5相が残存していることを特徴とする電子装置の製造方法。 - 請求項1乃至5のいずれかに記載の電子装置の製造方法であって、
前記Ni系層は、Ni、Ni-P、Ni-Bのいずれかであることを特徴とする電子装置の製造方法。 - 請求項6記載の電子装置の製造方法であって、
前記Ni系層は、めっきにより形成されたものであることを特徴とする電子装置の製造方法。 - 請求項1乃至7のいずれかに記載の電子装置の製造方法であって、
前記Sn系はんだ接続材料は、Sn-Ag-Cu系はんだ、Sn-Zn系はんだ、Sn-Ag-Cu-Bi-In系はんだ、Sn-Ag-Cu-In系はんだ、Sn-Bi系はんだ、Sn-In系はんだのいずれかであることを特徴とする電子装置の製造方法。 - 請求項1乃至8のいずれかに記載の電子装置の製造方法であって、
前記配置工程では、前記Sn系はんだ接続材料上に実装部品が配置され、
前記加熱工程では、前記電極と前記実装部品が前記Cu-Sn化合物及び前記Sn系はんだ接続部を介して電気的に接続されることを特徴とする電子装置の製造方法。 - 請求項9記載の電子装置の製造方法であって、
前記実装部品は、表面実装部品、チップ部品、挿入実装部品のいずれかであることを特徴とする電子装置の製造方法。
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JP5129898B1 (ja) * | 2012-08-02 | 2013-01-30 | 株式会社谷黒組 | 電極溶食防止層を有する部品及びその製造方法 |
US9686871B2 (en) | 2013-03-21 | 2017-06-20 | Tanigurogumi Corporation | Soldering device, soldering method, and substrate and electronic component produced by the soldering device or the soldering method |
WO2015075788A1 (ja) * | 2013-11-20 | 2015-05-28 | 株式会社日立製作所 | 鉛フリーはんだ合金および半導体装置 |
JP6287759B2 (ja) | 2014-10-30 | 2018-03-07 | トヨタ自動車株式会社 | 半導体装置とその製造方法 |
JP6281468B2 (ja) * | 2014-10-30 | 2018-02-21 | トヨタ自動車株式会社 | 半導体装置とその製造方法 |
CN106112162B (zh) * | 2016-07-25 | 2018-04-17 | 江苏科技大学 | 一种用于减少锡铋焊点金属间化合物形成的方法 |
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