TWI233669B - Method for making a semiconductor device - Google Patents

Method for making a semiconductor device Download PDF

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Publication number
TWI233669B
TWI233669B TW093104415A TW93104415A TWI233669B TW I233669 B TWI233669 B TW I233669B TW 093104415 A TW093104415 A TW 093104415A TW 93104415 A TW93104415 A TW 93104415A TW I233669 B TWI233669 B TW I233669B
Authority
TW
Taiwan
Prior art keywords
semiconductor wafer
semiconductor
etching
semiconductor device
manufacturing
Prior art date
Application number
TW093104415A
Other languages
English (en)
Chinese (zh)
Other versions
TW200425428A (en
Inventor
Akira Suzuki
Takashi Noma
Hiroyuki Shinogi
Yukihiro Takao
Shinzo Ishibe
Original Assignee
Sanyo Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co filed Critical Sanyo Electric Co
Publication of TW200425428A publication Critical patent/TW200425428A/zh
Application granted granted Critical
Publication of TWI233669B publication Critical patent/TWI233669B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00Cutting or separating of wafers, substrates or parts of devices
    • EFIXED CONSTRUCTIONS
    • E06DOORS, WINDOWS, SHUTTERS, OR ROLLER BLINDS IN GENERAL; LADDERS
    • E06BFIXED OR MOVABLE CLOSURES FOR OPENINGS IN BUILDINGS, VEHICLES, FENCES OR LIKE ENCLOSURES IN GENERAL, e.g. DOORS, WINDOWS, BLINDS, GATES
    • E06B3/00Window sashes, door leaves, or like elements for closing wall or like openings; Layout of fixed or moving closures, e.g. windows in wall or like openings; Features of rigidly-mounted outer frames relating to the mounting of wing frames
    • E06B3/96Corner joints or edge joints for windows, doors, or the like frames or wings
    • E06B3/964Corner joints or edge joints for windows, doors, or the like frames or wings using separate connection pieces, e.g. T-connection pieces
    • E06B3/968Corner joints or edge joints for windows, doors, or the like frames or wings using separate connection pieces, e.g. T-connection pieces characterised by the way the connecting pieces are fixed in or on the frame members
    • E06B3/9687Corner joints or edge joints for windows, doors, or the like frames or wings using separate connection pieces, e.g. T-connection pieces characterised by the way the connecting pieces are fixed in or on the frame members with screws blocking the connecting piece inside or on the frame member
    • E06B3/9688Mitre joints
    • EFIXED CONSTRUCTIONS
    • E06DOORS, WINDOWS, SHUTTERS, OR ROLLER BLINDS IN GENERAL; LADDERS
    • E06BFIXED OR MOVABLE CLOSURES FOR OPENINGS IN BUILDINGS, VEHICLES, FENCES OR LIKE ENCLOSURES IN GENERAL, e.g. DOORS, WINDOWS, BLINDS, GATES
    • E06B3/00Window sashes, door leaves, or like elements for closing wall or like openings; Layout of fixed or moving closures, e.g. windows in wall or like openings; Features of rigidly-mounted outer frames relating to the mounting of wing frames
    • E06B3/96Corner joints or edge joints for windows, doors, or the like frames or wings
    • E06B3/964Corner joints or edge joints for windows, doors, or the like frames or wings using separate connection pieces, e.g. T-connection pieces
    • E06B3/9647Corner joints or edge joints for windows, doors, or the like frames or wings using separate connection pieces, e.g. T-connection pieces the connecting piece being part of or otherwise linked to the window or door fittings
    • E06B3/9648Mitre joints
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • H10W70/635Through-vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • H10W70/654Top-view layouts
    • H10W70/656Fan-in layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/013Manufacture or treatment of die-attach connectors
    • H10W72/01331Manufacture or treatment of die-attach connectors using blanket deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/923Bond pads having multiple stacked layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9415Dispositions of bond pads relative to the surface, e.g. recessed, protruding

Landscapes

  • Engineering & Computer Science (AREA)
  • Civil Engineering (AREA)
  • Structural Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Dicing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
TW093104415A 2003-02-25 2004-02-23 Method for making a semiconductor device TWI233669B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003046755 2003-02-25
JP2004026534A JP4544876B2 (ja) 2003-02-25 2004-02-03 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW200425428A TW200425428A (en) 2004-11-16
TWI233669B true TWI233669B (en) 2005-06-01

Family

ID=32775226

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093104415A TWI233669B (en) 2003-02-25 2004-02-23 Method for making a semiconductor device

Country Status (6)

Country Link
US (2) US7371693B2 (https=)
EP (1) EP1453090A3 (https=)
JP (1) JP4544876B2 (https=)
KR (1) KR100661042B1 (https=)
CN (1) CN100355036C (https=)
TW (1) TWI233669B (https=)

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US7307348B2 (en) * 2005-12-07 2007-12-11 Micron Technology, Inc. Semiconductor components having through wire interconnects (TWI)
TW200737506A (en) * 2006-03-07 2007-10-01 Sanyo Electric Co Semiconductor device and manufacturing method of the same
US7659612B2 (en) 2006-04-24 2010-02-09 Micron Technology, Inc. Semiconductor components having encapsulated through wire interconnects (TWI)
US7405139B2 (en) 2006-08-03 2008-07-29 International Business Machines Corporation Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch
TWI367557B (en) * 2006-08-11 2012-07-01 Sanyo Electric Co Semiconductor device and manufaturing method thereof
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JP2010103300A (ja) * 2008-10-23 2010-05-06 Sanyo Electric Co Ltd 半導体装置及びその製造方法
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US8212340B2 (en) * 2009-07-13 2012-07-03 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
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JP6265594B2 (ja) * 2012-12-21 2018-01-24 ラピスセミコンダクタ株式会社 半導体装置の製造方法、及び半導体装置
KR101440308B1 (ko) * 2013-02-21 2014-09-18 옵토팩 주식회사 반도체 장치 및 그 제조 방법
US11114402B2 (en) * 2018-02-23 2021-09-07 Semiconductor Components Industries, Llc Semiconductor device with backmetal and related methods
JP7384820B2 (ja) * 2018-11-15 2023-11-21 ローム株式会社 半導体装置
JP7056685B2 (ja) * 2020-05-27 2022-04-19 信越半導体株式会社 シリコンウェーハのエッチング方法
CN112053936B (zh) * 2020-09-22 2024-06-11 粤芯半导体技术股份有限公司 晶圆背面粗糙化控制方法以及功率器件制造方法

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Also Published As

Publication number Publication date
TW200425428A (en) 2004-11-16
US20040229445A1 (en) 2004-11-18
JP2004282035A (ja) 2004-10-07
EP1453090A3 (en) 2008-06-04
US7371693B2 (en) 2008-05-13
KR100661042B1 (ko) 2006-12-26
EP1453090A2 (en) 2004-09-01
CN1591789A (zh) 2005-03-09
US20080171421A1 (en) 2008-07-17
JP4544876B2 (ja) 2010-09-15
CN100355036C (zh) 2007-12-12
KR20040076623A (ko) 2004-09-01
US7981807B2 (en) 2011-07-19

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