TW587060B - Microelectronic mechanical system and method - Google Patents
Microelectronic mechanical system and method Download PDFInfo
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- TW587060B TW587060B TW091118034A TW91118034A TW587060B TW 587060 B TW587060 B TW 587060B TW 091118034 A TW091118034 A TW 091118034A TW 91118034 A TW91118034 A TW 91118034A TW 587060 B TW587060 B TW 587060B
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00444—Surface micromachining, i.e. structuring layers on the substrate
- B81C1/00468—Releasing structures
- B81C1/00484—Processes for releasing structures not provided for in group B81C1/00476
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/00246—Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00333—Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0271—Resonators; ultrasonic resonators
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2203/00—Basic microelectromechanical structures
- B81B2203/01—Suspended structures, i.e. structures allowing a movement
- B81B2203/0136—Comb structures
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
- B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
- B81C2201/0102—Surface micromachining
- B81C2201/0105—Sacrificial layer
- B81C2201/0109—Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
- B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
- B81C2201/0128—Processes for removing material
- B81C2201/013—Etching
- B81C2201/0135—Controlling etch progression
- B81C2201/014—Controlling etch progression by depositing an etch stop layer, e.g. silicon nitride, silicon oxide, metal
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0136—Growing or depositing of a covering layer
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/07—Integrating an electronic processing unit with a micromechanical structure
- B81C2203/0707—Monolithic integration, i.e. the electronic processing unit is formed on or in the same substrate as the micromechanical structure
- B81C2203/0735—Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Micromachines (AREA)
Description
五、發明說明(1) 發明範疇 本發明關於晶圓處理。本發明 之密封方法。 、別關於微電子機械系統 發明背景 微電子機械系統(MEMS)及積體 製造任何數量之微感測器,轉電1之組合使可能 製造麵S之典型方法與製造ICs之°及^勵益/不幸的是, MEMS及ICs通常分別紫造德,_ 去不相谷。因此, 以組合。 W衣&後,隨後再將其在另外步驟中予 除了 MEMS與ICS處理不相容之外 因此’MEMS之活性部分需密封 之^而要在封’ 封MEMS之活性部分之一 土炎切 &制之儲存% i兄中。岔 MEMS之導電引線。或者供一訂製之封裝結構及備有 為盆封|姓槿夕广:者,MEMS在晶圓基板上形成,基板成 ,構之底部。MEMS在基板上形成後,一匹配之蓋 子、、、°構以黏膠或焊接在儲存環境中MEMS之活性部分上。例 如Shoot曰揭不一方法及元件用以密封鈍化— MEMS於半 導體基板上於us專利申請Ν0· 〇9/124,71〇及〇8/744,372中 於7/29/98提出,其標題為密封一密封蓋子於一半導體晶 粒上之方法與元件,二申請之内容均以參考方式併入此 文0 所而要者為利用與標準I c晶圓處理相容之程序以製造 MEMS及其他結構於晶圓基板上之方法,因此,MEMS及丨^^ 可製造在同一晶圓晶片上。此外,所需者為一方法製造 MEMS,其中之MEMS之活性部分密封在一各種適合之儲存環
587060 五、發明說明(2) 境中。 本發明概述 本發明提供一製造密封釋放結構之方法。此釋放結構較 佳為一具有複數個帶狀或束狀之MEMS元件,其亦可有一 ^ 狀結構。本發明之一實施例中,元件包含共振器用以產^ 周期波形(即時脈產生)。在其他實施例中,元件含一 活門以產生及/或傳輸光資訊。在另一實施例中,此元 包合一射頻(RF )產生器以供無線資訊傳輸。 釋放結構在多層結構之層間形成。多層結構較佳 一及第二蝕刻停止層,其可彼此相同或彼此不同,二 牲層位於第一及第二停止層之間。釋放特 ::: 二姓刻停止層巾,多層結構較佳在―⑪晶圓結構弟 :晶圓結構較佳構型為以亦在矽積 路(1C)耦合MEMS元件。 /战之積體電 夕層結構較佳以第一蝕刻停止 , ^ ^ 風 卜 °〇上。第一蝕刻停止層較佳為——. 層,一氮化矽層或盆细人 如^ 一乳化矽 犧牲層。第一犧牲層較佳包含多矽材,❻二::弟 使用。第二蝕刻停止# —,、他材料亦可 放結構之釋放特性對—犧㈣上形n圖案與釋
第 '一钱刻停止層你妥|| pp , JU 了正增彳糸利用任何適當之 :芦㈣之光刻劑在其上之圖案移除前技:η 有間隙及第二敍刻停止層之部分之間及心;下=具
第7頁 五、發明說明(3) 者,第 一 JS -Γ m 以蝕刻。釋放θ可用各向異性以釋放結構特性之正壓縮予 積期間,接徂f構特性之正壓縮,可在第二蝕刻停止層沉 —犧牲層之圖f f釋放結構特性之迅速各向異性生長在第 止層,第-1Γ部分。不論使用何方法以形成第二蝕刻停 結構特性之笛,層係在第二蝕刻停止層之上,將具有釋放 第二犧牲層“層置於第一及第二犧牲層之間。 密封劑層或蓋芦。】矽。在第二犧牲層之上’形成-含層多個純化層’更佳為 在特二:二’多二形f ::刻停止層可由任何 層材料有關之材料。本m刻之材料’與形成犧牲 牲材料之蝕刻$ $ (\中,〃、蝕刻停止材料有關之犧 大於1。:1,更ίί50 t間钮刻之材料之量及厚度)較佳 實驗結果顯示曾達到25。,佳為100:1。為發展本發明, 或多層,任何:==:何特殊姓刻停止層可含一 層展現對犧牲層之蝕刻足夠之抗拒 、要蝕刻如止 在本發明之一實施例中,多声纟 層包含氧化石夕。氧化石夕較 ^ 了 = ^虫刻停止 y夕時,二氧化石夕為較佳實施例僂2發明提及氧 成,即,將矽表面在氧源化矽層可由熱生長形 者,氧化矽層可由化學蒸氣沉 J形成氧化矽層。或 氣源在氧之存在下分解。同理,、:/成,即,一有機矽蒸 第8頁 587060 五、發明說明(4) 氮化梦層可由敎斗P ts ^ A A長或化學沉積方法形成。多晶矽猶从麻 較佳由標準IC處理方、本泌士、 L 7 ^ y犧牲層 ^ a. . , ^ Y - 方法形成,如化學蒸氣沉積,潑濺哎# 水k升化學療虱沉積(PECVD)。在次一層形 賤次電 表面可以清洗或處理。 >儿積 面可用溶劑如"灵2釋;構圖案步驟完成後’沉積表 ^ ^ #j :; ; yr〇iTnl(NMP) ^ ^411 ^ ^ 予以機械平面化此外在次—層形成前,沉積表面可 宰)在多構以釋放結構形成(即,自第二蝕刻停止之圖 Γ签Λ 心於第一及第二犧牲層之間,進出洞或溝、首 =3封劑層之形成,因而將第二犧牲層之區域暴露 直使鞋幻二f進出溝道係指蓋層或密封劑中形成之空穴, 犧牲層下之材料。為簡明計,道 :義:“盍曾及密封劑中之長形及對稱(即,洞,矩 形,方形,橢圓等)之空穴。 矩 狀敉:ί::明’進出溝道可有人何數目之形狀及幾何來 1由==向異性餘刻以有陡壁輪廊。此進出;道較 以絲列=蝕刻方法,及活性離子蝕刻方法之蝕刻技術予 γ適W刻劑處理,其選擇, ;分之實際部☆,俾釋放結構在蓋子層或密封以3 為車: ΐΐ劑包含貴重之氟化物’⑹氙二氟化物。較佳 為,擇性蝕刻第一及第二犧牲層之前 ‘佳 μ之預㈣溶液處理。_刻溶液可防止構㈣ 587060 五、發明說明(5) 清洗^ ^犧牲層之暴露區,移除聚合物及/或協助保證餘 刻未受氧化物形成而中斷。此蝕刻方法較佳為在一室中告
施,其中蝕刻劑為氣體。但適當之液體蝕刻劑亦被任 J 發明之範圍中,貴重之氟化物氣體為液體或溶 溶劑中。 、、田之 本發明之較佳方法中,多層結構係置於約1〇5托壓力之 真=中。一含氙二氟化物晶體之容器經一壓力控制器耦人 至至中(即控制活門)。晶體較佳在室溫之容器内,氙二: 化物之壓力約為4· 〇托。壓力控制器加以調整,使室内一之鼠 壓力升高至50微托。此壓力或另一足夠壓力之提供, 二制之餘刻速度,及一積極之氣二說化物之流動至; 内及極均勻之蝕刻方法。 4ΓΓ:,後’進出溝道可予封住以密封懸浮之釋放 二層及蓋子或密封劑層之間。密封步驟 肉每"日日a處理系統中之單獨處理站實施,或者,室元件 化:::進出溝道可用任何數目之方法密封,包括潑濺, 璃積(CVD),電毁改進化學蒸氣沉積(pecvd)或玻 屬,=人ί。進出溝道可用任何數目材料密封包括,金 道及ί;夕f陶瓷。進出溝道較佳由潑濺一鋁層於進出溝 或化學;法自甚:J學應用日夺’過多之鋁可用適當之機械 忐自盍層或密封劑層除去。 二‘ =i t =另二貫施例,在沉積第二犧牲層於圖案之第 其上。τ 9之則,第二蝕刻停止層應有一反射材料潑濺 、 射材料較佳含鋁。準此,犧牲層被蝕刻除去
587060 五、發明說明(6) 後本;較㈣一 ΐ射上表面適於供光學應用 f ’在密封進出溝道於蓋層或密封=如=基合 I層或密封蓋住之空腔中。吸氣材料:接=別/儿積在由 氣及/或“,因其可導致元件協助降低濕 放結構較佳在真空下密封或貴重氣 此退化。釋 述。 札粒下铪封,如下所詳 本發明提供一在1C晶片上之密封Mem 及利用與標…理相容之技術製造同如其::元件 此方法提供一處理步驟,其 =例如,本發明之 更佳溫度在攝氏550度以下。此外在攝本氏:明〇 = 且 有活性結構之MEMS之方法,該元件係於夂 中。本發明不限於製造MEMS,亦用^ 4 ;種^境 單及複雜之多空^^士構,A可末製造任何數目之簡 其中較佳為内部化多空腔矽基結二:二,應用, 楚,本發明之方法能在單一敍刻ί法將更清 合之釋放結構’及利用本發明之方、製造 本發明詳細說明 本發明提供具有密封釋放結構之元。 器’光學顯示元件,光學傳輪4發 之二型’但其均操作於基本原則,即利用結構之 頻率以提供時序信號至-搞合電路。參考^ ;•本振盛 第11頁 587060 五、發明說明(7) 構102有一組可動之梳形結構1〇ι及1〇1,,其在一組匹配之 轉換器梳1 0 5與1 〇 5 ’之間振盪。振盪器結構丨〇 2如一鐘擺, 有一基本振盪頻率。梳形結構101及1〇1,經一螺釘結構1〇3 及1 y 3’固定在接地板丨09上。作業時,一直流偏壓加至共 振器1 02與接地板1 〇9之間。一AC激勵頻率加至梳形轉換器 105及10 5’ ,造成可動梳形結構1〇1及1〇1,振盪及產生動輸 出電流。此輸出電流由電流至電壓放大器丨〇 7加以放大, 並回輸至共振結構1 〇2。此正回輸迴路使振盪器1〇〇不穩 定,而導致振盪器結構102之持續振盪。第二動輸出電流〜 產生至連接108,其被耦合至一電路以接收振盪器1〇〇 之時序信號。 參考圖2a,顯示一晶圓之平面圖,晶圓結構2〇〇較佳 2^夕不基+板=及,刻停止層2G3。第1刻停止層 ϋ 貫把發明之方法,特別是矽基板2〇1足夠厚可 使犧牲層被钱刻,而未完全餘刻掉石夕基板2〇1。此外,美 成俾第一蝕刻停止層203之形成為不需要。但與 施例中,與矽基板相對可選擇性蝕刻之材貝 :牲層。第-她亭止層2。3較佳包含 ,、作= [其顯現足夠對用以峨:及之 構仍ί =。。\圓:構2°〇之一區251用以作為釋放結 構日日0、·、。構20 0之其他部分可保留以形成 其可搞合至及其可控制在區251形成之釋放結構 587060 五、發明說明(8) 曰曰 此外’任何數目之釋放結構及釋放結構區2 5 1 圓結構20 0上形成。 牡u f考㈣,在區251中’第一犧牲層20 5利用傳統技術在 蝕刻如止層2 0 3上形成。第一犧牲層2 0 5可由任何適舍 :=;該材料對下面之第一㈣停止層選擇性 但較佳含多晶矽。 參^圖2c,第二蝕刻停止層2〇7在第一犧牲層2〇5上形 。第二蝕刻停止層2 07可用相同或不同材料形成與 刻,止層20 3相似。第二蝕刻停止層2〇7較佳包含氧化 :机虱化矽’《,,其組合或任何其他材料,其展現足夠 f對所用蝕刻劑之抗拒。在本發明一實施例中,第一 曰2 0 5在第二犧牲層2 〇 7沉積前蝕刻以提供 21 5 Λ 2 1 5 - ^ ^ ^ # ^ 〇 ^ 撐、、、〇構21 5及21 5,之外,支撐柱216,216,及21 6,,可在各 位置形成,,以提供對隨後步驟形成之釋放結構。支撐柱 21 V 216 ,2 1 6較佳由抗蝕材料構成,其與構成第一蝕 刻停止層20 3及/或停止層2〇7及蓋層211之材料相 所詳述。 Γ 或者,除形成支撐結構215,215,及/或支撐柱216, 216’及216’,,或除形成支撐結構215,215,及/或支撐柱 216,216’ ,及216’,外,第二蝕刻停止層2〇7可被沉積於 區251之面積中而無下面之犧牲層2〇5,第二蝕刻停止層 2 0 7之該部分可直接沉積在及/或連接至第一蝕刻停止層 203及/或基板201,如圖2d所示。第二蝕刻停止層2〇7被施 第13頁 587060 五、發明說明(9) 加圖案及犧牲層2 0 5被蝕刻後,直接沉積在第一蝕刻停止 層2 03之第二蝕刻停止層2〇7之部分提供一結構支撐供已形 成之釋放結構。有任何數目之機構以提供已形成之釋放結 構之貝際支樓,此點被認為在本發明範圍之内。 參考圖2 e,根據本發明之佳實施例,一反射層2 3 3沉積 在第二蝕刻停止層2〇7上,及/或支撐結構215及215,及/或 支撐柱216,216,,及216,,。反射層233較佳包含鋁或其 他反射材料。反射層2 3 3較佳能抗拒用以除去犧牲層之餘 刻劑’但能被利用適當技術包括光致蝕刻及電漿蝕刻而被 蝕刻,其中,在隨後步驟形成之有圖案釋放結構,具有反 射表面適於光學應用。較佳為一組接合墊226,227 ^228 亦在晶圓基板2 0 0上形成,以電耦合釋放結構至包含釋放 結構之積體電路以外之電路。精於此技藝人士應瞭解,反 射層2 3 3可在釋放結構2 〇 4及2 0 6形成後沉積其上。 參考圖2f,反射層233及第二蝕刻停止層2〇7圖案後槿点 釋放結構/特性204及20 6。反射層2 33及第二蝕刻停止声 20 7較佳利用傳統之光致蝕刻技術予以圖案化。\列7如,曰 阻層在反射層233上形成。光阻被圖案及顯影以構 圖案之光阻罩(未示出)。反射層23 3及第二钱刻停止 之部分隨後利用傳統技術除去,剩下有圖案曰 m及反射層233於有圖案之光阻罩之下。有圖案=及 於是自有圖案之結構204及2 06除去,有圖案之結構2罩 206可予密封如下所詳述。 及 或者,第一犧牲層205可用釋放結構(未示出)之正壓力 587060 五、發明說明(10) 蝕刻。釋放結構之正壓力於是提供核,以供釋放結構204 及206之迅速各向異性生長。釋放結構204及206如圖2f所 示為梳形結構。但甚為清楚,其可為梳形結構,帶形結 構,懸桁或任何數目之其他結構包括但不限於_分離^, 支撐結構及/或空腔壁如下所述。當提供一反射層233為較 佳時’當圖案之結構204及206不用以反射光時,如微流體 儿件之情況,形成反射層233之步驟即不需要。線27〇顯示 晶圓結構200之X軸,線271顯示晶圓結構之γ軸。圖2f之曰 圓結構2 7 2之Z軸與圖正交。 圖2g顯示第二犧牲層20 9已以反射層233沉積在釋放結構 204及206後。晶圓結構2〇〇之側剖面圖。圖2g中,γ軸”^ 與所示之圖為正交,Ζ軸2 72在所示圖之平面中。釋放、纟士構 204及20 6係嵌入犧牲層2〇5與2〇9之間,犧牲層2〇5及2^較 2:為Α經:Λ放,構2〇4與206間之間隙而接觸。第二犧牲層 m +成,其與蝕刻層選擇性蝕刻以便構成釋 放、、、口構7L件’較佳包含多晶矽。 /參f圖2h,第二犧牲層2〇9在釋放結構2〇4與2〇6上沉積 後二蓋層211〃沉積在第二犧牲層2〇9上。蓋層211較佳包^ :::;二’氮化矽或其組合,或其他能展現對所用蝕:劑 J几拒之材料。蓋層2 11可由相同或不同材料構 如第一蝕刻停止層203及/或第二蝕刻停止層2〇7_樣。 3a-3f用以說明自圖2h之結構2〇()之部分25〇 放結構之方法。 战在封釋 參考圖3a,一具有釋放結構如MEMS共振器結構丨之元 第15頁 五、發明說明(11) =’較佳由多層結構250所製造。 蝕刻停止層203,J:龢4产A曰门廿 構25 0有一弟一 如前所述。第一蝕列% 圓基板201之區251上形成 刻第一犧牲層之條件下展材枓,其此在蝕 當第一蝕刻犧牲層含多晶時,=一^之材料。例如, 叫,第一犧牲層蝕弟曰-犧牲層蝕刻劑包含 述。第-敍刻層203較佳含 刻條件如下所 為5 0 0-5_埃之範圍。卩夕層或乳化氮層’其厚度 -=二刻Λ止層2°3之頂部形成-第-犧牲層2。5。第 二===,,能對下面之第-崎止 在第時)=…一崎止二 ^ 第犧牲層2 〇 5較佳含多晶矽。哎者第 犧牲細之層厚度約為。.卜3·;微米;圍如下…弟- 蝕3 π Τ Ϊ層2 〇 5之頂部形成一第二蝕刻停止層2 0 7。第-餘刻停止層m以特性206及204圖案與釋/一 Γ=;Γ3可含任何能展現在赖刻第-犧二ΐ 多曰石| ^ ,拒之材料°例如’當第一犧牲層205含 夕日日矽,第一犧牲層含蝕刻劑含Xe 夕之㈣條件說明如下。第二敍刻 佳3乳化矽層或氮化矽層,其厚度為3〇〇_5〇〇〇埃。 立、發明說明(】2) 第二餘刻層2 〇 7上开彡+ ^ 2〇9可含任何材U —第二犧牲層209。第二犧牲層 或第—钱刻/止層:&被Λ面之第二飼刻停止層207及/ 不存在)相對餘刻。"子%) f基板(當第一敍刻停止層 ,氧切或氮切時"7/二二㈣停止層203及207 第二個第一犧扭屏 9車父佳含多晶石夕。或者, 领,磷或其他摻^劑/雜包含/推雜之氧化石夕層,其係與 板201上/推雜’其可使犧牲層209被蝕刻在基 厚度為。.二:;tf 203及207上。第二犧牲侧有-案區208彼此J圍,犧牲層205與209較佳為在圖 —蓋或在結構206與204間之間隙中接觸。 劑層21广較Y入1 專層f1:積在第二犧牲層209上。蓋或密封 含石夕或idr ί及/或鈦)。蓋或密封劑層211亦可 佳為蓋心密封二"係與傳統摻雜劑如硼或磷摻雜。較 巧盖層或检封劑層川包含一氧化 層為單0二米士之間。,精於此技藝人士可知:、=ί述之 結果。此夕曰卜、口 2梦c可形成已知層之夾層已達到相同 固庙i 層較佳形成在二欠—層之頂部時甚為堅 應瞭解,不同厚度之插入層可予插入。 ’’、、 ^考^,進出溝道213與219形成在蓋層211上 字第二犧牲層20 9之區215及217暴露。進出溝道232 ===異性㈣:_出溝道213及219可以任㈣ i ® :匕括濕及/或乾蝕刻貫施。例士σ ’光致抗蝕劑備於 盖層並予暴露及顯影以提供一圖案,供各向異性蝕刻進出 587060 五、發明說明(13) 溝道2 1 3及2 1 9。或者,一儀刻劑可選擇性加於對應進出溝 道2 1 3與2 1 9之餘刻停止層2 11之一部分。例如,適當姓刻 劑之微粒或薄流可利用微注射法加在蓋層或密封劑層2】i 之表面,如由Dongsung Hong於1 9 9 9,6,1 2 (律師文件
No. 0 3 25, 0022 6 )提出之美專利申請號碼6〇/1 41,444所揭示 者’該文以參考方式併入此間。 進出溝道213及219在蓋層211形成後,當第二犧牲層包 含多晶矽時,第二犧牲層209之暴露區215及217可以預|虫 刻溶液乙二醇及氟化銨處理。一適當之預蝕刻溶液乙二醇 及氟化銨可以NOE EtchITM之名稱商購,其為ACSI公司製 造,位於Milpitas,CA 95035。可在暴露之多晶矽區之表 面上形成,如2 1 5及2 1 7。此一氧化物可干擾多晶石夕敍刻, 因此導致不完全之蝕刻。預蝕刻溶液相信可防止及/或禁 止氧化物在暴露區21 5及217之表面上形成,或移除該形成 之氧化物’以避免犧牲層2 0 5及2 0 9之不完全敍刻。 參考圖3c ’進出溝道213及219在蓋層211中形成後,犧 牲層2 0 5及2 0 9被選擇性姓刻以釋放結構2 〇 4及2 〇 6。結構 2 04及206可有不同之形狀。例如,MEMS元件製造中,釋放 結構為梳狀或帶狀結構。製造一微流體元件時,釋放纟士構 提供通路將空腔221與223連接。在製造一電平或加速^計 時,釋結構可為懸垂狀。結構2 〇 4及2 〇 6釋放後,層2 1 1,中 之進出溝道2 13及219被密封,以將結構2〇4及2〇6密封於層 20 3與211’之間。 參考圖3d,本發明另一實施 例中,在密封進出溝道2 13
第18頁 587060 五、發明說明(14) 與2 1 9於層21 1 ’中之前,吸氣材料23 1如鈦或鈦基合金可經 由進出溝道21 3及219沉積在至少一結構空腔221及223。或 者,吸氣材料料/吸氣劑213可在反射層233形成時被沉 積。在另一實施例中,吸氣材料23 1為犧牲層20 5及20 9中 之摻雜劑,其在犧牲層2 0 5及2 0 9之蝕刻期間被釋放。 參考圖3e,空腔221及223及/或結構204及20 6處理後及 備於適當環境後,如下所詳述,進出溝道2 1 3及2 1 9較佳為 被密封。釋放結構2 0 4及2 0 6較佳在真空下密封,但亦可在- 預定之或控制下之氣體及/或液體下密封以供某些應用。 進出溝道2 1 3及2 1 9可由任何方法密封,利用數種材料包括 金屬,聚合物及/或樹脂。較佳為,進出溝道21 3及21 g由 潑錢傳統潑濺之金屬於進出溝道2 1 3及2 1 9上及蓋層2 1 1 上,更佳為潑濺鋁在進出溝道2 13及219及層上以構成層 242 ° 參考圖3f,光學應用時,層242之一部分可被除去,俾 柱狀結構240及241可保留在進出溝道213及219中。蓋層 211可提供一光學視窗,光可經此視窗通過至釋放結構2 〇4 及20 6上之層233。層242之一部分較佳由微打光技術除 去。或者,傳統之光刻技術可用以蝕刻掉層2 4 2之一部 分。 在本發明之一實施例中,層242之一部分被選擇性除 去,故蓋層2 1 1提供一光孔隙(未示出),通過該孔隙,光 玎通過至及或自層/233,其位於釋放結構2〇4及2〇6之上。 圖4為-流程圖3〇〇之方塊圖,說明圖^中多層結構明根
第19頁 587060 五、發明說明(15) _____ 成之步驟。圖3a中之多層結構較佳為由順 m方法而成,如上所述,其中每一結構層 及 异度已加以控制。 J 及 —=圖4 ’步驟3()1中,二氧化石夕層以蒸氣或乾熱生 土板上形成,或由沉積在矽晶 ^ ;。:氧化亀佳以250-5000埃範圍,L:2二 下ί^ 1熱乳化在將基板置於攝氏600 —800度”時之控制 氣沉積(mVD)wH 層以低壓化學蒸 最佳严声Αη ς在第一蝕刻停止層至〇.卜3.0微米之厚度, 佳尽度為0· 5-1· 〇微米之範圍。非曰 學在攝氏45。二:以广 氮化矽沉積後,之後在步驟305中,-由LPCVD沉穑曰s在厂弟一夕日曰矽犧牲層上形成。氮化矽層較佳 750-1250&、厚度為3〇 0 -5 0 0 0埃之範圍,更佳為 石夕貌之孰乂 :此氮化矽元件層可由在銨之存在下之二氣曱 /况之熱分解形成。 乳甲 根據本發明之$ —無 抗蝕刻劑沉積 > 貝⑪| ,在y驟3 0 3,氮化矽層在光 罩),以牡1 沉積,暴露及顯影後(因而形成一餘刻 3 0 3形成之第2 ^構成圖案,或選擇性蝕刻一圖案於步驟 蝕刻區中之、代一、/晶矽層产中,以開始氮化矽在多晶矽層之 後,利用僂t迷生長。氮化矽層較佳沉積為一連續層,之 放結構之Μ说之光抗拒蝕刻罩再加以選擇性蝕刻以構成釋 傅(釋放特性。 在步驟3 0 5 φ ,有圖案之氮化矽層構成後,之後在步驟 嶋
第20頁 587060 五、發明說明(16) 30 7,第二犧牲層在有圖案之氮化矽層上形 層炎於第一及第二犧牲層之間。第二犧牲層 字有圖案 石夕層,其係由LPCVD沉積至〇.卜3 〇埃厚度之亦為多晶 0, 5-1· 0埃之厚度。第二犧牲層較佳由埶分,更佳為 劑形成如前所述。第一及第二多晶石夕層較-有機石夕試 而抗蝕刻劑可通過第一及第二 =接觸點,因 第-及第二多晶飾層之一 接=驟,便將 :,好驟305形成第二多w層之前,有圖^驟3U «之〉儿積表面以溶劑如NMP (需加熱)處理以 ,化矽 根據本發明之方法,表面可在多層结u先,、表面。 間力“乂處理,以除去剩•,因其可導致不何時 第二多晶石夕層形成後,在步驟心缚 二f第一多晶矽層上形成。此蓋層較佳為氧化矽 盍 改進化學蒸氣沉積(PECVD)至厚度為ι〇 —3 〇㈢,以 美1有5二0埃。在PECVD方法中,一有機矽複合物,、如更佳 土有機矽化物(TE0S)在氧源如分子氧之下分解,四乙 化石夕蓋層。步驟310巾,在步驟3〇9之前一夕曰構成氧 於以平面化及/嗖清泱以進供 嗜木— 币一夕日日石夕層可 構成蓋層。“卓備-適…積表面供沉積或 圖5為流程圖4〇〇之方塊圖’言兒明自圖 =凡件之分法。步驟401中,進出溝道在蓋/中層播。構形 進出广道形成後之直徑為〇·4_15微 G。 法在軋切蓋層上形成。反應離子餘刻方法可以實4:決 第21頁 587060 五、發明說明(17) ’將溝有斜壁或直壁,該壁在隨 ::岔:。進出:聋道較佳通過蓋層形成以暴露 : 驟402中,在步驟4〇3之前,犧牲層之暴露區= 二Λ 二醇及氟化銨加以處理,敦化銨中含 重…化敍溶於甲二醇中。犧牲層之暴露區 2—預蝕刻溶液處理,在步驟4〇3中,乡晶矽層以 體鼠化物NgFJNgie,Kr或Ar,其中xq 、重虱 ^ ί:t蝕刻。更佳*,蝕刻劑包含氙二5氟化物二二 於美專利一,⑽ ,刻步雜3完成後,步侧4中,—吸氣材料可 溝道沉積進入姓刻步驟403形成之元件空腔。 機械拋先或光致蝕刻法予以除去。 千 較Γ方為Λ塊隹圖Λ明圖4中步驟403中w晶^ 區在并·驟402中/、道在步驟4〇1形成後,多晶矽層之暴露 έ士構二罟 口以處理,如上所述,之後,在步驟5 0 1中 : Γ托之真空下。步驟5°3中,氣二說化物晶 該室之壓力較佳丄 氟物之控制流提供至室中。 保說二㈣之= :氣:物晶體昇華壓力以確 1微托至1 · 0托,更佳^里二 至之壓力車乂佳維持在0. 更佳為1 · 0被托至1 〇 0微托之範圍,最佳約 587060 五、發明說明(18) 在5 0微托(〇 · 〇 5托)。 圖7說明元件6 0 0之略圖’该元件實施流程圖5 〇 〇所述之 钱刻步驟,如圖5所示。元件60 0較佳與一真空源6〇7柄 ^,其可在室環境60 5吸成真空。元件6〇〇較包括壓力測 里元件6 0 9 ’其可使使用者監視室6 1 〇中之壓力。含银刻劑 源(即氙氟化物之晶體)之容器608經一壓力或流控制器61 3 耦合至室610。容器608可有一壓力測量元件6^厶^ 器608,以使用戶監視容器608之壓力。 # σ 作業時,與前述相似之多層結構620被置於室61〇中。直 空控制瓣開啟後,真空源607吸取一真空,降低室環境6〇5 之壓力較佳至1 〇_5托。在已知條件下,在室溫之下,氙二 齓化物晶體形成XeFz之蒸氣壓力約4· 〇托,如壓力測量元 件611所決定。壓力控制器613調整後改變室環境6〇5之壓 力約為50X10-3托。結構620被蝕刻一足夠時間以 620之空腔621中形成釋放結構623。蝕刻程序 ,^所選之㈣劑,結構62G之物理細節及室結 之 流$動態而定。 行 蝕刻步驟完成後,即可提供一適當之密封環境。準此, ::實施例中’壓力控制瓣613關閉’利用自真空源6〇7之 及力,再建立一低壓力真空。蝕刻結構62〇之進 用潑濺器元件6 3 0之潑濺束6 5 0予以密封。 彳 或:,低壓力真空再建立後’室可用貴重氣體。準 此,貝重氣體源615可經控制活瓣612耦合至控 丨 室環境6051元件620之溝道密封開啟氣體活瓣6i2使
第23頁 587060 五、發明說明(19) 貴重氣體充入。元件6 2 0之溝道於是以聚合物或陶瓷材料 密封,因而捕獲室環境6 0 5 ’之一部分於元件6 2 0之空腔6 2 1 中 〇 以上各例已予詳述以說明本發明之較佳實施例。精於此 技藝人士當瞭解,有許多改變,其仍在本發明之範疇中。 例如,具有多層釋放結構之元件可延伸本發明原理,及利 用有一個以上之圖案層之多層結構而構成。此外,非常清 楚,任何數目之元件,如其具有耦合及未耦合之釋放結構 及有多個空腔結構時,均可利用本發明之方法製造。
第24頁 587060 圖式簡單說明 圖式簡略說明 圖1為略圖說明一MEMS振盈哭。 圖2a-h說明本發明在矽晶圓 視圖及剖面圖。 土板上形成之多層結構之項 之釋放特性 之 圖3a-f為本發明較佳方法 剖面圖。 啤夕層結構形成 圖4為圖3a說明之多層結構形 圖5為圖2a顯示之自多層 方塊圖。 塊圖。 再々成之釋放結構方法之方 圖6為自圖2 b說明之多層处椹徂為μ广 圖。 /層、、、口構供姓刻犧牲層之步驟方塊 圖7為用以蝕刻一本發明方法之 略圖。 ,嘈、、、口構之室裝‘置 元件符號簡單說明: MEMS微電子機械系統 CVD化學蒸氣沉積 1 00振盪器 1 0 2振盛器結構 1 0 5,1 0 5 ’轉換器梳 1 0 9接地板 2 0 1矽基板 203 2 0 4,2 0 6釋放結構 ICs積體電路 卯射頻 PECVD電聚改進化學蒸 1〇1,ΗΓ梳形結構 檟 103,103’螺釘結構 107電壓放大器 1〇8連接 200 ’ 27 2晶圓結構/晶 ,205 ’2〇7 ’2〇9餘刻停止層/犧牲層 2 0 8圖案區 第25頁 587060 圖式簡單說明 211 1 21Γ蓋層/層 213 1 219, 232進 出溝 道 215 5 215’支撐結構 216 5 216’ ,216’ , 支 撐 柱 221 5 2 2 3空腔 226 5 22 7, 228接 合墊 231 吸 氣材料 233 反 射層 240 , 2 4 1柱狀結構 242 層 250 多 層 結 構 251 ’ 217區 270 , 271, 2 7 2線 300 5 4 0 0,5 0 0流程圖 600 元 件/室 結構 605 5 6 0 5 ’室環境 607 真 空源 608 容 器 609 壓 力測量元件 610 室 611 壓力 測 量 元 件 612 控 制活瓣 6 1 3壓 力或流 控 制器/ 壓力控 :制瓣 615 貴 重氣體源 620 多 層結構 621 空 腔 6 2 3釋 放結構 630 潑藏 器 元 件 650 潑 濺束
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Claims (1)
- 587060 六、申請專利範圍 1. 一種自多層結構製造一釋放結構之方法,多層結構包 含第一及第二蝕刻停止層,位於第一及第二蝕刻停止層間 之第一犧牲層,一蓋層及位於該第二餘刻停止層與該蓋層 間之第二犧牲層,蓋層至少有一路徑溝道,其中該第二14 刻停止層包括一釋放結構,該方法包含: a. 在該蓋層中建立一進出開口; b. 經至少一進出開口蝕刻該第一及該第二犧牲層以構成 該釋放結構。 2 ·如申請專利範圍第1項之方法,尚包含在該蝕刻步驟 前,在至少一進出溝道施加預餘刻溶液。 3. 如申請專利範圍第1項之方法,其中該每一第一及第 二蝕刻停止層材料係由選自含矽之氧化物,氮氧化合物及 氮化物之一組。 4. 如申請專利範圍第1項之方法,其中該第一犧牲層及 第二犧牲層含多晶矽。 5. 如申請專利範圍第4項之方法,其中該第一犧牲層及 該第二犧牲層各自具有之厚度為〇. 1-3. 0微米之範圍。 6. 如申請專利範圍第1項之方法,其中該多層結構尚含 一石夕基板。 7. 如申請專利範圍第6項之方法,其中該第一犧牲層, 第二蝕刻停止層,第二犧牲層及蓋層係順序在矽基板上沉 積而成。 8. 如申請專利範圍第1項之方法,其中該進出開口係各 向異性蝕刻該蓋層形成。第27頁 587060 、申請專利範圍9. 如申請專利範圍第丨項之方 4生屏夕〜Γ W ^ Y邊笫及弟二犧 杜增之该餘刻部分係以含貴重氣俨 + ^ 1 π ;, 札版齓化物之蝕刻劑實絲< 10. 如申請專利範圍第1項之方 J "j只知‘ 牲芦夕访幻^十丨* 、 * 其中忒弟一及第二半 M J "卩7刀係以含氙二氟化物蝕刻劑實施。 Η ·如申請專利範圍第i項之 該進出開口 成尚含以检封材料密J 人1日2 ·如申凊專利範圍第1 1項之方法, 3選自含聚合物,金屬及陶瓷之一組 1 3 ·如申晴專利範圍第11項之, 鋁金屬。 其中該密封材料包 其中該密封材料為 1 4·如申請專利範圍第1項之方法 電子機械結構(MEMS)。 其中該釋放結構含微 15. —種製造一龍Μ元件之方法,包含· a.在基板上形成第一犧牲層; ^在邊第一犧牲層上形成含抗蝕材料之mem結構,此meM 、、、°構具有至少一間隙於其中; c•在該MEM結構層上形成一第二犧牲層;及 d ·在該第二犧牲層上形成一蓋層。 1 6·胃如申請專利範圍第;[5項之方法,尚含·· a •提供至少一進出開口通過該蓋層,暴露其下面之該第 一犧牲層之一部分; 上b·蝕刻該第一及第二犧牲層通過至少一進出開口,以自 °亥第及该第二犧牲層釋放該mem結構之一部分。 1 7·如申請專利範圍第丨5項之方法,尚包含第一犧牲層第28頁587060 、申請專利範圍 形之Λ’Λ處理晶圓上形成一底部银刻層。 貴重氣體氟化物之蝕刻劑完成。 八中忒蝕刻係以含 19、如申請專利範圍第16項之方法,纟中 氙二氟化物之蝕刻劑完成。 / d係以含 2〇·如申請灣利範圍第1 6項之方法,$勺八 密封至少一進出開口。 万去,尚包含以密封材料 21·如申請專利範圍第2〇項之方法,並 基板 含金屬、聚合物及陶£之—組。〃中⑴封材料係選自 22· 一種結構用以製造MEMS,包含: 在基板一部分上之蓋層 及 b 放特性結構位於該晶圓結 佩狂何枓嵌入之結構間。 刻。 Λ 9以3貝重氣體氟化物之蝕刻劑作相對蝕 ΐ·::請專利範圍第22項之結構“彳劑含氣二 範圍第22項結構’其中之犧牲材料能以大 26·如申往、t ; f量/時間)選擇性與蓋層作相對蝕刻。 矽層。明利範圍第22項之結構,其中該基板含一晶態 2 7 如申上太 月專利範圍第2 6項之結構,其中之多晶矽層為與 ^δ/υ6〇 “、申請專利範圍 推雜劑摻雜。 其中該摻雜劑包含選 其中該基板尚含位於 其中該钱刻停止層包 2自8_含V:利範圍第 oQ 及蛳一組之元素。 犧4生如好申.請專利範圍第22項之結構 料與該基板間之蝕刻停止声 d U ·如φ ·Χ主由 曰 含材料传H範圍第29項之結構,其中該飯亥π 3!.如申1,直自含:夕之氧化物,氮氧化物及氮化物。 進出開口'。利耗圍第22項之結構,其中該蓋層含複數個 其中該犧牲材料含多 其中該釋放結構所含 .如申睛專利範圍第2 2項之結構 晶石夕。 33.如申請專利範圍第22項之 材料係選自由矽夕ϋ ^ .具甲3釋放結構戶 ^ 自由矽之虱化物,氮氧化物及氮化物之_細 #、g ό明專利範圍第2 2項之結構,其中該蓋層含一;bf·# :“矽之氧化物’氮氧化物及氮化物之一組。材料 ^ 請專利範圍第22項之結構,#中該釋放-槿五 从電子機械結構(MEMS)。 。冓為一 I6.積如/Λ專利範圍第22項之結構’尚包含一積體電路 違積體電路電耦合至該釋放結構。 路’ 3?· 一種形成複數個互聯空腔之結構,包含一多声姓 其含至少一第一蝕刻停止層,第二蝕刻停止層,^。冓, 及多晶矽位於該第一及第二蝕刻停止層之間,及兮二, 刻停止層與該蓋層之間,此結構尚包含在該第二二:蝕 層中之至少一内部通路,以構成複數個互聯之空腔1 τ止 第30頁 587060 六、申請專利範圍.如申請專利範圍第37項之結構,尚包含至少一 之洞,以進出其下之多晶矽 ^ 3 9 ·如申請專利範圍第3 7項之結構 層以釋放結構為圖案,其中至少一 之間。 其中該第二蝕刻停止 内部通路係在釋放結構 40.如中請專利範圍第39項之結構,其中至少 社 為一MEMS振盪器之一部分。 釋放、、Ό構 4 1 ·如申請專利範圍3 9項之結構,其极 視窗,其對一或多個選擇之光波長為透"包含一光學 42. —種MEMS,包含: 勹边明。 a —晶圓結構; b在該晶圓結構上形成之蓋層; c 一釋放結構,含複數個可動之 — 結構與該蓋層之間。 〜構岔封於該晶g 43·如申請專利範圍第42項之MEMS,其 數個密封之溝道。 、中之该盍層尚含複 種材料密封,該材料選自含金屬,聚合物及陶棄45·、如申請專利範圍第44項之MEMS, 溝道係以含鋁之材料密封。 =·如申請專利範圍第42項之MEMS, 部分含一反射材料層。 47·如申請專利範圍第46項之MEMS, 其中該複數個密封之 其中該釋放結構之一 其中該反射材料含第31頁 587060六、申請專利範圍 48·如中請專利範圍第42項之MEMS,其中之該蓋層含—材 料’其係選自含矽之氧化物,氮氧化物及氮化物之一級 49 ·、如申請專利範圍第48項之MEMS,其中之該蓋層有— 度為丨· 0-3· 〇微米之範圍。 予 5 〇 ·、,:如Ρ申晴專利範圍第4 2項之結構,其中該釋放結構包含 才才料^自3石夕之氧化物,氧氮化物及氮化物之一組。 51·如申請專利範圍第50項之MEMS,其中該複數個可動 結構之厚度約在3 0 〇 - 5 0 0 0埃之範圍。 52·如申請專利範圍第42項之MMS,尚包含一抗蝕 該晶‘圓與該釋放結構之間。 位於 53·、,如/申請專利範圍第53項之MEMS,其中該抗蝕層包含之 材料係選自含矽之氧化物,氧氮化物及氮化物之一 5 4 如Φ 士主# 、、此。 • 甲h專利範圍第53項之MEMS,其中該抗蝕層之屋厗 為〇·卜3·〇微米之範圍。 与度 55·如申請專利範圍第42項之MEMS,尚包含在晶圓結構上 之積體電路’此積體電路電耦合至該釋放結構。 56如申請專利範圍第42項之mems,其中該釋放結 共振器梳特性。 野匕各 專利範圍第42項之mems ’其中之該釋放結構含 禝數個帶式特性。 傅各 如申請專利範圍第42項之MEMS,該蓋 學孔隙以通過該蓋層傳輸光。 先第32頁
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- 2002-08-09 TW TW091118034A patent/TW587060B/zh active
- 2002-08-29 EP EP02798102A patent/EP1428255A4/en not_active Withdrawn
- 2002-08-29 JP JP2003527792A patent/JP2005502481A/ja active Pending
- 2002-08-29 WO PCT/US2002/027822 patent/WO2003023849A1/en active Application Filing
- 2002-10-09 US US10/268,257 patent/US7049164B2/en not_active Expired - Lifetime
-
2005
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104555891A (zh) * | 2013-10-21 | 2015-04-29 | 精工爱普生株式会社 | 振子、振子的制造方法、电子装置、电子设备以及移动体 |
CN104555891B (zh) * | 2013-10-21 | 2018-02-02 | 精工爱普生株式会社 | 振子、振子的制造方法、电子装置、电子设备以及移动体 |
Also Published As
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US6991953B1 (en) | 2006-01-31 |
JP2005502481A (ja) | 2005-01-27 |
US20030138986A1 (en) | 2003-07-24 |
US20050221528A1 (en) | 2005-10-06 |
WO2003023849A1 (en) | 2003-03-20 |
US7183637B2 (en) | 2007-02-27 |
US7049164B2 (en) | 2006-05-23 |
EP1428255A1 (en) | 2004-06-16 |
US6930364B2 (en) | 2005-08-16 |
EP1428255A4 (en) | 2005-09-21 |
US20040053434A1 (en) | 2004-03-18 |
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