TW541657B - Semiconductor device and its fabrication method - Google Patents

Semiconductor device and its fabrication method Download PDF

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Publication number
TW541657B
TW541657B TW090128124A TW90128124A TW541657B TW 541657 B TW541657 B TW 541657B TW 090128124 A TW090128124 A TW 090128124A TW 90128124 A TW90128124 A TW 90128124A TW 541657 B TW541657 B TW 541657B
Authority
TW
Taiwan
Prior art keywords
wiring
film
copper
interlayer
layer
Prior art date
Application number
TW090128124A
Other languages
English (en)
Chinese (zh)
Inventor
Takayuki Oshima
Hiroshi Miyazaki
Hideo Aoki
Kazutoshi Ohmori
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW541657B publication Critical patent/TW541657B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/0888—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures wherein via-level dielectrics are compositionally different than trench-level dielectrics

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
TW090128124A 2000-11-29 2001-11-13 Semiconductor device and its fabrication method TW541657B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000362462A JP2002164428A (ja) 2000-11-29 2000-11-29 半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
TW541657B true TW541657B (en) 2003-07-11

Family

ID=18833731

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090128124A TW541657B (en) 2000-11-29 2001-11-13 Semiconductor device and its fabrication method

Country Status (4)

Country Link
US (1) US6812127B2 (https=)
JP (1) JP2002164428A (https=)
KR (1) KR100830666B1 (https=)
TW (1) TW541657B (https=)

Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7271489B2 (en) * 2003-10-15 2007-09-18 Megica Corporation Post passivation interconnection schemes on top of the IC chips
TW544855B (en) * 2001-06-25 2003-08-01 Nec Electronics Corp Dual damascene circuit with upper wiring and interconnect line positioned in regions formed as two layers including organic polymer layer and low-permittivity layer
US7474002B2 (en) * 2001-10-30 2009-01-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having dielectric film having aperture portion
JP2003257970A (ja) * 2002-02-27 2003-09-12 Nec Electronics Corp 半導体装置及びその配線構造
TWI300971B (en) * 2002-04-12 2008-09-11 Hitachi Ltd Semiconductor device
JP3989763B2 (ja) * 2002-04-15 2007-10-10 株式会社半導体エネルギー研究所 半導体表示装置
TWI288443B (en) 2002-05-17 2007-10-11 Semiconductor Energy Lab SiN film, semiconductor device, and the manufacturing method thereof
JP2004014841A (ja) * 2002-06-07 2004-01-15 Fujitsu Ltd 半導体装置及びその製造方法
JP2004031439A (ja) * 2002-06-21 2004-01-29 Renesas Technology Corp 半導体集積回路装置およびその製造方法
CN100352036C (zh) 2002-10-17 2007-11-28 株式会社瑞萨科技 半导体器件及其制造方法
US6917108B2 (en) * 2002-11-14 2005-07-12 International Business Machines Corporation Reliable low-k interconnect structure with hybrid dielectric
JP2004165559A (ja) * 2002-11-15 2004-06-10 Toshiba Corp 半導体装置
JP4489345B2 (ja) * 2002-12-13 2010-06-23 株式会社ルネサステクノロジ 半導体装置の製造方法
JP4454242B2 (ja) 2003-03-25 2010-04-21 株式会社ルネサステクノロジ 半導体装置およびその製造方法
NL1023275C2 (nl) * 2003-04-25 2004-10-27 Cavendish Kinetics Ltd Werkwijze voor het vervaardigen van een micro-mechanisch element.
CN1327508C (zh) * 2003-04-28 2007-07-18 富士通株式会社 半导体装置的制造方法
WO2004105123A1 (ja) * 2003-05-21 2004-12-02 Fujitsu Limited 半導体装置
US7096450B2 (en) * 2003-06-28 2006-08-22 International Business Machines Corporation Enhancement of performance of a conductive wire in a multilayered substrate
TWI285938B (en) * 2003-08-28 2007-08-21 Fujitsu Ltd Semiconductor device
KR100605505B1 (ko) * 2004-06-04 2006-07-31 삼성전자주식회사 버퍼막 패턴을 갖는 반도체 장치들 및 그들의 형성방법들
JP2006024811A (ja) * 2004-07-09 2006-01-26 Sony Corp 半導体装置の製造方法
JP4185478B2 (ja) * 2004-07-23 2008-11-26 長野計器株式会社 歪検出器およびその製造方法
JP2006140404A (ja) * 2004-11-15 2006-06-01 Renesas Technology Corp 半導体装置
JP2006210508A (ja) * 2005-01-26 2006-08-10 Sony Corp 半導体装置およびその製造方法
US7414275B2 (en) * 2005-06-24 2008-08-19 International Business Machines Corporation Multi-level interconnections for an integrated circuit chip
JP2007019188A (ja) * 2005-07-06 2007-01-25 Renesas Technology Corp 半導体集積回路装置およびその製造方法
JP2007123509A (ja) * 2005-10-27 2007-05-17 Seiko Epson Corp 半導体装置およびその製造方法
US20070096170A1 (en) * 2005-11-02 2007-05-03 International Business Machines Corporation Low modulus spacers for channel stress enhancement
US8013342B2 (en) * 2007-11-14 2011-09-06 International Business Machines Corporation Double-sided integrated circuit chips
US7670927B2 (en) * 2006-05-16 2010-03-02 International Business Machines Corporation Double-sided integrated circuit chips
US7602027B2 (en) * 2006-12-29 2009-10-13 Semiconductor Components Industries, L.L.C. Semiconductor component and method of manufacture
DE102007037858B4 (de) 2007-08-10 2012-04-19 Infineon Technologies Ag Halbleiterbauelement mit verbessertem dynamischen Verhalten
TWI419268B (zh) * 2007-09-21 2013-12-11 兆裝微股份有限公司 半導體裝置及其製造方法
US8587124B2 (en) 2007-09-21 2013-11-19 Teramikros, Inc. Semiconductor device having low dielectric insulating film and manufacturing method of the same
US20090079072A1 (en) * 2007-09-21 2009-03-26 Casio Computer Co., Ltd. Semiconductor device having low dielectric insulating film and manufacturing method of the same
JP4666028B2 (ja) * 2008-03-31 2011-04-06 カシオ計算機株式会社 半導体装置
JP5559775B2 (ja) * 2009-04-30 2014-07-23 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8304863B2 (en) 2010-02-09 2012-11-06 International Business Machines Corporation Electromigration immune through-substrate vias
US8354339B2 (en) * 2010-07-20 2013-01-15 International Business Machines Corporation Methods to form self-aligned permanent on-chip interconnect structures
US8642460B2 (en) * 2011-06-08 2014-02-04 International Business Machines Corporation Semiconductor switching device and method of making the same
CN102332425A (zh) * 2011-09-23 2012-01-25 复旦大学 一种提升铜互连技术中抗电迁移特性的方法
US9032615B2 (en) 2012-07-31 2015-05-19 Freescale Semiconductor, Inc. Method for forming an electrical connection between metal layers
US8640072B1 (en) 2012-07-31 2014-01-28 Freescale Semiconductor, Inc. Method for forming an electrical connection between metal layers
TWI613709B (zh) * 2013-02-20 2018-02-01 財團法人工業技術研究院 半導體元件結構及其製造方法與應用其之畫素結構
US10541204B2 (en) * 2015-10-20 2020-01-21 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnection structure and method of forming the same
TWI590350B (zh) * 2016-06-30 2017-07-01 欣興電子股份有限公司 線路重分佈結構的製造方法與線路重分佈結構單元
US9735015B1 (en) * 2016-12-05 2017-08-15 United Microelectronics Corporation Fabricating method of semiconductor structure
KR102307127B1 (ko) * 2017-06-14 2021-10-05 삼성전자주식회사 반도체 소자
US20200312768A1 (en) * 2019-03-27 2020-10-01 Intel Corporation Controlled organic layers to enhance adhesion to organic dielectrics and process for forming such
KR102859459B1 (ko) * 2020-09-02 2025-09-12 삼성전자주식회사 배선 구조체 및 이를 포함하는 반도체 패키지

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3399154B2 (ja) 1995-05-22 2003-04-21 ソニー株式会社 積層絶縁膜のプラズマエッチング方法
JPH09306988A (ja) 1996-03-13 1997-11-28 Sony Corp 多層配線の形成方法
US6048789A (en) 1997-02-27 2000-04-11 Vlsi Technology, Inc. IC interconnect formation with chemical-mechanical polishing and silica etching with solution of nitric and hydrofluoric acids
US6191007B1 (en) 1997-04-28 2001-02-20 Denso Corporation Method for manufacturing a semiconductor substrate
US6171957B1 (en) 1997-07-16 2001-01-09 Mitsubishi Denki Kabushiki Kaisha Manufacturing method of semiconductor device having high pressure reflow process
JPH11111845A (ja) * 1997-10-03 1999-04-23 Toshiba Corp 半導体装置及びその製造方法
US6181012B1 (en) 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
US6355571B1 (en) 1998-11-17 2002-03-12 Applied Materials, Inc. Method and apparatus for reducing copper oxidation and contamination in a semiconductor device
JP2000174019A (ja) * 1998-12-01 2000-06-23 Fujitsu Ltd 半導体装置及びその製造方法
US6177364B1 (en) * 1998-12-02 2001-01-23 Advanced Micro Devices, Inc. Integration of low-K SiOF for damascene structure
US6242349B1 (en) 1998-12-09 2001-06-05 Advanced Micro Devices, Inc. Method of forming copper/copper alloy interconnection with reduced electromigration
JP3974284B2 (ja) 1999-03-18 2007-09-12 株式会社東芝 半導体装置の製造方法
JP4460669B2 (ja) * 1999-03-19 2010-05-12 株式会社東芝 半導体装置
US6211063B1 (en) * 1999-05-25 2001-04-03 Taiwan Semiconductor Manufacturing Company Method to fabricate self-aligned dual damascene structures
JP4108228B2 (ja) * 1999-07-15 2008-06-25 富士通株式会社 半導体装置の製造方法
US6521532B1 (en) 1999-07-22 2003-02-18 James A. Cunningham Method for making integrated circuit including interconnects with enhanced electromigration resistance
US6136680A (en) 2000-01-21 2000-10-24 Taiwan Semiconductor Manufacturing Company Methods to improve copper-fluorinated silica glass interconnects
US6284644B1 (en) * 2000-10-10 2001-09-04 Chartered Semiconductor Manufacturing Ltd. IMD scheme by post-plasma treatment of FSG and TEOS oxide capping layer

Also Published As

Publication number Publication date
US20020100984A1 (en) 2002-08-01
KR100830666B1 (ko) 2008-05-20
US6812127B2 (en) 2004-11-02
JP2002164428A (ja) 2002-06-07
KR20020042458A (ko) 2002-06-05

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