TW425557B - Flash memory vds compensation thechniques to reduce programming variability - Google Patents
Flash memory vds compensation thechniques to reduce programming variability Download PDFInfo
- Publication number
- TW425557B TW425557B TW087102262A TW87102262A TW425557B TW 425557 B TW425557 B TW 425557B TW 087102262 A TW087102262 A TW 087102262A TW 87102262 A TW87102262 A TW 87102262A TW 425557 B TW425557 B TW 425557B
- Authority
- TW
- Taiwan
- Prior art keywords
- source
- volatile memory
- voltage
- bit line
- line
- Prior art date
Links
- 230000015654 memory Effects 0.000 title claims abstract description 378
- 238000000034 method Methods 0.000 claims description 26
- 230000002079 cooperative effect Effects 0.000 claims description 14
- 230000000875 corresponding effect Effects 0.000 claims description 7
- 230000008878 coupling Effects 0.000 claims 2
- 238000010168 coupling process Methods 0.000 claims 2
- 238000005859 coupling reaction Methods 0.000 claims 2
- PCTMTFRHKVHKIS-BMFZQQSSSA-N (1s,3r,4e,6e,8e,10e,12e,14e,16e,18s,19r,20r,21s,25r,27r,30r,31r,33s,35r,37s,38r)-3-[(2r,3s,4s,5s,6r)-4-amino-3,5-dihydroxy-6-methyloxan-2-yl]oxy-19,25,27,30,31,33,35,37-octahydroxy-18,20,21-trimethyl-23-oxo-22,39-dioxabicyclo[33.3.1]nonatriaconta-4,6,8,10 Chemical compound C1C=C2C[C@@H](OS(O)(=O)=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2.O[C@H]1[C@@H](N)[C@H](O)[C@@H](C)O[C@H]1O[C@H]1/C=C/C=C/C=C/C=C/C=C/C=C/C=C/[C@H](C)[C@@H](O)[C@@H](C)[C@H](C)OC(=O)C[C@H](O)C[C@H](O)CC[C@@H](O)[C@H](O)C[C@H](O)C[C@](O)(C[C@H](O)[C@H]2C(O)=O)O[C@H]2C1 PCTMTFRHKVHKIS-BMFZQQSSSA-N 0.000 claims 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims 1
- 239000007787 solid Substances 0.000 claims 1
- 239000011701 zinc Substances 0.000 claims 1
- 229910052725 zinc Inorganic materials 0.000 claims 1
- 238000012360 testing method Methods 0.000 description 13
- 238000001514 detection method Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 8
- 230000008859 change Effects 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 230000004044 response Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 235000015170 shellfish Nutrition 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000009897 systematic effect Effects 0.000 description 3
- 239000000872 buffer Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 241000283973 Oryctolagus cuniculus Species 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/828,873 US5798966A (en) | 1997-03-31 | 1997-03-31 | Flash memory VDS compensation techiques to reduce programming variability |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW425557B true TW425557B (en) | 2001-03-11 |
Family
ID=25252981
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW087102262A TW425557B (en) | 1997-03-31 | 1998-02-18 | Flash memory vds compensation thechniques to reduce programming variability |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US5798966A (enExample) |
| JP (1) | JP4173555B2 (enExample) |
| KR (1) | KR100313746B1 (enExample) |
| CN (1) | CN100392759C (enExample) |
| AU (1) | AU6252398A (enExample) |
| DE (1) | DE19882265B4 (enExample) |
| TW (1) | TW425557B (enExample) |
| WO (1) | WO1998044510A1 (enExample) |
| ZA (1) | ZA981131B (enExample) |
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1997
- 1997-03-31 US US08/828,873 patent/US5798966A/en not_active Expired - Lifetime
-
1998
- 1998-01-28 AU AU62523/98A patent/AU6252398A/en not_active Abandoned
- 1998-01-28 JP JP54160898A patent/JP4173555B2/ja not_active Expired - Fee Related
- 1998-01-28 WO PCT/US1998/001599 patent/WO1998044510A1/en not_active Ceased
- 1998-01-28 CN CNB98803865XA patent/CN100392759C/zh not_active Expired - Fee Related
- 1998-01-28 DE DE19882265T patent/DE19882265B4/de not_active Expired - Fee Related
- 1998-02-11 ZA ZA9801131A patent/ZA981131B/xx unknown
- 1998-02-18 TW TW087102262A patent/TW425557B/zh not_active IP Right Cessation
-
1999
- 1999-09-29 KR KR1019997008899A patent/KR100313746B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| ZA981131B (en) | 1999-08-11 |
| KR100313746B1 (ko) | 2001-11-16 |
| JP2001517350A (ja) | 2001-10-02 |
| DE19882265T1 (de) | 2000-05-25 |
| WO1998044510A1 (en) | 1998-10-08 |
| US5798966A (en) | 1998-08-25 |
| CN1251683A (zh) | 2000-04-26 |
| AU6252398A (en) | 1998-10-22 |
| KR20010005825A (ko) | 2001-01-15 |
| CN100392759C (zh) | 2008-06-04 |
| DE19882265B4 (de) | 2005-02-10 |
| JP4173555B2 (ja) | 2008-10-29 |
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| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |