TW340261B - Semiconductor device and the manufacturing method - Google Patents

Semiconductor device and the manufacturing method

Info

Publication number
TW340261B
TW340261B TW085111351A TW85111351A TW340261B TW 340261 B TW340261 B TW 340261B TW 085111351 A TW085111351 A TW 085111351A TW 85111351 A TW85111351 A TW 85111351A TW 340261 B TW340261 B TW 340261B
Authority
TW
Taiwan
Prior art keywords
film
conductive film
port
capacitor
semiconductor device
Prior art date
Application number
TW085111351A
Other languages
English (en)
Chinese (zh)
Inventor
Mizuki Sekawa
Toshiki Yabu
Takashi Uehara
Takashi Nakabayashi
Kyoji Yamashita
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Application granted granted Critical
Publication of TW340261B publication Critical patent/TW340261B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/82345—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/48—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/957—Making metal-insulator-metal device

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
TW085111351A 1995-09-19 1996-09-17 Semiconductor device and the manufacturing method TW340261B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23956495A JP3415712B2 (ja) 1995-09-19 1995-09-19 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
TW340261B true TW340261B (en) 1998-09-11

Family

ID=17046682

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085111351A TW340261B (en) 1995-09-19 1996-09-17 Semiconductor device and the manufacturing method

Country Status (6)

Country Link
US (3) US5879983A (ja)
EP (1) EP0764986B1 (ja)
JP (1) JP3415712B2 (ja)
KR (1) KR100421520B1 (ja)
DE (1) DE69617849T2 (ja)
TW (1) TW340261B (ja)

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JP3199004B2 (ja) * 1997-11-10 2001-08-13 日本電気株式会社 半導体装置およびその製造方法
US6214690B1 (en) * 1997-12-18 2001-04-10 Advanced Micro Devices, Inc. Method of forming a semiconductor device having integrated electrode and isolation region formation
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US5950090A (en) * 1998-11-16 1999-09-07 United Microelectronics Corp. Method for fabricating a metal-oxide semiconductor transistor
US6218234B1 (en) * 1999-04-26 2001-04-17 Chartered Semiconductor Manufacturing, Ltd. Dual gate and double poly capacitor analog process integration
JP3587100B2 (ja) 1999-09-17 2004-11-10 セイコーエプソン株式会社 不揮発性メモリトランジスタを含む半導体装置の製造方法
JP3383244B2 (ja) * 1999-09-29 2003-03-04 シャープ株式会社 半導体トランジスタ及びその製造方法
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US6548389B2 (en) * 2000-04-03 2003-04-15 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
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EP1535332B1 (en) * 2002-09-02 2012-04-11 Advanced Micro Devices, Inc. Semiconductor device including a field effect transistor and a passive capacitor having reduced leakage current and an improved capacitance per unit area
KR100449256B1 (ko) * 2002-11-28 2004-09-18 주식회사 하이닉스반도체 디램 메모리 셀의 제조방법
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JP4546054B2 (ja) * 2003-08-29 2010-09-15 パナソニック株式会社 半導体装置の製造方法
JP2006040947A (ja) * 2004-07-22 2006-02-09 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP4583878B2 (ja) * 2004-10-29 2010-11-17 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4113199B2 (ja) * 2005-04-05 2008-07-09 株式会社東芝 半導体装置
JP4129009B2 (ja) 2005-05-31 2008-07-30 株式会社東芝 半導体集積回路装置
KR100672160B1 (ko) * 2005-12-28 2007-01-19 주식회사 하이닉스반도체 플래쉬 메모리 소자의 레지스터 형성방법
US7960810B2 (en) * 2006-09-05 2011-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with reliable high-voltage gate oxide and method of manufacture thereof
KR20100076256A (ko) * 2008-12-26 2010-07-06 주식회사 동부하이텍 Ｐｉｐ 커패시터의 제조 방법
JP5556490B2 (ja) * 2010-08-06 2014-07-23 富士通セミコンダクター株式会社 半導体装置の製造方法
JP5418441B2 (ja) * 2010-08-13 2014-02-19 富士通セミコンダクター株式会社 半導体装置
CN102737970B (zh) * 2011-04-01 2015-04-22 无锡华润上华半导体有限公司 半导体器件及其栅介质层制造方法
JP2012248814A (ja) * 2011-05-31 2012-12-13 Toshiba Corp 半導体装置およびその製造方法
CN103311241B (zh) * 2012-03-16 2016-10-05 北大方正集团有限公司 一种双多晶电容和mos管的集成结构及其制造方法
JP5573971B2 (ja) * 2013-01-16 2014-08-20 富士通セミコンダクター株式会社 半導体装置の製造方法

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Also Published As

Publication number Publication date
US6492672B1 (en) 2002-12-10
JP3415712B2 (ja) 2003-06-09
DE69617849T2 (de) 2002-05-16
EP0764986A1 (en) 1997-03-26
EP0764986B1 (en) 2001-12-12
US6124160A (en) 2000-09-26
JPH0982896A (ja) 1997-03-28
US5879983A (en) 1999-03-09
KR100421520B1 (ko) 2004-06-24
DE69617849D1 (de) 2002-01-24

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees