TW339471B - Manufacturing method of fast-flash memory cells - Google Patents

Manufacturing method of fast-flash memory cells

Info

Publication number
TW339471B
TW339471B TW086108329A TW86108329A TW339471B TW 339471 B TW339471 B TW 339471B TW 086108329 A TW086108329 A TW 086108329A TW 86108329 A TW86108329 A TW 86108329A TW 339471 B TW339471 B TW 339471B
Authority
TW
Taiwan
Prior art keywords
zone
formation
layer
voltage transistor
membrane
Prior art date
Application number
TW086108329A
Other languages
English (en)
Inventor
Cho Min-Kuck
Kim Jong-Oh
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Application granted granted Critical
Publication of TW339471B publication Critical patent/TW339471B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
TW086108329A 1996-06-27 1997-06-16 Manufacturing method of fast-flash memory cells TW339471B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960024393A KR100199382B1 (ko) 1996-06-27 1996-06-27 플래쉬 메모리 소자의 제조방법

Publications (1)

Publication Number Publication Date
TW339471B true TW339471B (en) 1998-09-01

Family

ID=19463798

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086108329A TW339471B (en) 1996-06-27 1997-06-16 Manufacturing method of fast-flash memory cells

Country Status (7)

Country Link
US (1) US5888869A (zh)
JP (1) JP2777357B2 (zh)
KR (1) KR100199382B1 (zh)
CN (1) CN1085412C (zh)
DE (1) DE19727397B4 (zh)
GB (1) GB2314678B (zh)
TW (1) TW339471B (zh)

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EP0889520B1 (en) * 1997-07-03 2005-09-28 STMicroelectronics S.r.l. Method of fabrication a non-volatile semiconductor memory device with shielded single polysilicon gate memory part
US6040216A (en) * 1997-08-11 2000-03-21 Mosel Vitelic, Inc. Method (and device) for producing tunnel silicon oxynitride layer
AU735045B2 (en) * 1997-10-30 2001-06-28 Texas Instruments Incorporated A process flow to integrate high and low voltage peripheral transistors with a floating gate array
TW374939B (en) * 1997-12-19 1999-11-21 Promos Technologies Inc Method of formation of 2 gate oxide layers of different thickness in an IC
EP0975022A1 (en) * 1998-07-22 2000-01-26 STMicroelectronics S.r.l. Method for manufacturing electronic devices comprising non-volatile memory cells and LV transistors, with salicided junctions
US6191444B1 (en) * 1998-09-03 2001-02-20 Micron Technology, Inc. Mini flash process and circuit
KR100268894B1 (ko) * 1998-09-29 2000-10-16 김영환 플래쉬 메모리 소자의 제조방법
EP1005079B1 (en) * 1998-11-26 2012-12-26 STMicroelectronics Srl Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitry
US6362049B1 (en) * 1998-12-04 2002-03-26 Advanced Micro Devices, Inc. High yield performance semiconductor process flow for NAND flash memory products
US6180456B1 (en) * 1999-02-17 2001-01-30 International Business Machines Corporation Triple polysilicon embedded NVRAM cell and method thereof
TW445620B (en) * 1999-03-05 2001-07-11 United Microelectronics Corp Method for manufacturing the source line of nonvolatile memory
US6130168A (en) * 1999-07-08 2000-10-10 Taiwan Semiconductor Manufacturing Company Using ONO as hard mask to reduce STI oxide loss on low voltage device in flash or EPROM process
US6159802A (en) * 1999-07-14 2000-12-12 United Microelectronics Corp. Method of forming a stack-gate of a non-volatile memory on a semiconductor wafer
TW415045B (en) * 1999-08-10 2000-12-11 United Microelectronics Corp Manufacture of embedded flash memory
US6177362B1 (en) * 1999-08-17 2001-01-23 United Microelectronics Corp. Fabrication method for gate structure having gate dielectric layers of different thickness
US6238984B1 (en) * 2000-05-05 2001-05-29 United Microelectronics Corp. Integrating high voltage and low voltage device with silicide block mask
DE10110150A1 (de) * 2001-03-02 2002-09-19 Infineon Technologies Ag Verfahren zum Herstellen von metallischen Bitleitungen für Speicherzellenarrays, Verfahren zum Herstellen von Speicherzellenarrays und Speicherzellenarray
US6399443B1 (en) * 2001-05-07 2002-06-04 Chartered Semiconductor Manufacturing Ltd Method for manufacturing dual voltage flash integrated circuit
KR100399350B1 (ko) * 2001-08-09 2003-09-26 삼성전자주식회사 부유 트랩형 소자를 가지는 비휘발성 반도체 메모리 장치및 그 제조방법
KR100407573B1 (ko) * 2001-08-09 2003-11-28 삼성전자주식회사 부유 트랩형 비휘발성 메모리 장치 형성 방법
US6551883B1 (en) * 2001-12-27 2003-04-22 Silicon Integrated Systems Corp. MOS device with dual gate insulators and method of forming the same
KR100437451B1 (ko) * 2002-05-07 2004-06-23 삼성전자주식회사 트랩형 비휘발성 메모리 장치의 제조 방법
US6797568B1 (en) * 2002-11-21 2004-09-28 Lattice Semiconductor Corp. Flash technology transistors and methods for forming the same
JP2004228358A (ja) * 2003-01-23 2004-08-12 Fujitsu Ltd 半導体装置の製造方法
KR100518577B1 (ko) * 2003-05-26 2005-10-04 삼성전자주식회사 원 타임 프로그래머블 메모리 소자 및 이를 포함하는반도체 집적회로와 그 제조방법
KR100557995B1 (ko) * 2003-07-30 2006-03-06 삼성전자주식회사 부유트랩형 비휘발성 메모리 셀을 갖는 반도체 장치 및그의 제조방법
CN100361292C (zh) * 2004-12-30 2008-01-09 旺宏电子股份有限公司 快闪存储单元制造方法
US8642441B1 (en) * 2006-12-15 2014-02-04 Spansion Llc Self-aligned STI with single poly for manufacturing a flash memory device
US7439134B1 (en) * 2007-04-20 2008-10-21 Freescale Semiconductor, Inc. Method for process integration of non-volatile memory cell transistors with transistors of another type
KR100957873B1 (ko) * 2007-12-28 2010-05-13 매그나칩 반도체 유한회사 반도체 소자의 게이트 산화막 형성 방법
CN103367255A (zh) * 2012-03-26 2013-10-23 上海宏力半导体制造有限公司 可多次编程的硅氧化氮氧化硅的制造方法
CN104952734B (zh) * 2015-07-16 2020-01-24 矽力杰半导体技术(杭州)有限公司 半导体结构及其制造方法

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US5183773A (en) * 1989-04-13 1993-02-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device including such input protection transistor
JP2509697B2 (ja) * 1989-04-28 1996-06-26 株式会社東芝 半導体装置およびその製造方法
US5104819A (en) * 1989-08-07 1992-04-14 Intel Corporation Fabrication of interpoly dielctric for EPROM-related technologies
US5223451A (en) * 1989-10-06 1993-06-29 Kabushiki Kaisha Toshiba Semiconductor device wherein n-channel MOSFET, p-channel MOSFET and nonvolatile memory cell are formed in one chip and method of making it
KR930007527B1 (ko) * 1990-09-22 1993-08-12 삼성전자 주식회사 스토리지 셀 어레이와 주변회로를 갖는 불휘발성 반도체 메모리 장치의 제조방법 및 그 구조
US5175120A (en) * 1991-10-11 1992-12-29 Micron Technology, Inc. Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors
KR960012303B1 (ko) * 1992-08-18 1996-09-18 삼성전자 주식회사 불휘발성 반도체메모리장치 및 그 제조방법
US5292681A (en) * 1993-09-16 1994-03-08 Micron Semiconductor, Inc. Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors
US5478767A (en) * 1994-09-30 1995-12-26 United Microelectronics Corporation Method of making a flash EEPROM memory cell comprising polysilicon and textured oxide sidewall spacers
JPH08167705A (ja) * 1994-12-15 1996-06-25 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
US5723355A (en) * 1997-01-17 1998-03-03 Programmable Microelectronics Corp. Method to incorporate non-volatile memory and logic components into a single sub-0.3 micron fabrication process for embedded non-volatile memory

Also Published As

Publication number Publication date
JPH1093055A (ja) 1998-04-10
CN1177212A (zh) 1998-03-25
DE19727397A1 (de) 1998-01-02
DE19727397B4 (de) 2004-08-19
KR980006428A (ko) 1998-03-30
US5888869A (en) 1999-03-30
KR100199382B1 (ko) 1999-06-15
GB9712952D0 (en) 1997-08-20
JP2777357B2 (ja) 1998-07-16
GB2314678B (en) 2001-04-25
GB2314678A (en) 1998-01-07
CN1085412C (zh) 2002-05-22

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MM4A Annulment or lapse of patent due to non-payment of fees