TW277134B - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
TW277134B
TW277134B TW084109018A TW84109018A TW277134B TW 277134 B TW277134 B TW 277134B TW 084109018 A TW084109018 A TW 084109018A TW 84109018 A TW84109018 A TW 84109018A TW 277134 B TW277134 B TW 277134B
Authority
TW
Taiwan
Prior art keywords
address
circuit
memory device
semiconductor memory
bad
Prior art date
Application number
TW084109018A
Other languages
English (en)
Inventor
Tomosuke Makimura
Sachihide Suzuki
Shunichi Sukegawa
Masayuki Hira
Hiroyuki Fujiwara
Original Assignee
Hitachi Seisakusyo Kk
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Seisakusyo Kk, Texas Instruments Inc filed Critical Hitachi Seisakusyo Kk
Application granted granted Critical
Publication of TW277134B publication Critical patent/TW277134B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/804—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout to prevent clustered faults
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
TW084109018A 1995-08-23 1995-08-29 Semiconductor memory device TW277134B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23766495A JP3710002B2 (ja) 1995-08-23 1995-08-23 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW277134B true TW277134B (en) 1996-06-01

Family

ID=17018684

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084109018A TW277134B (en) 1995-08-23 1995-08-29 Semiconductor memory device

Country Status (4)

Country Link
US (1) US5862086A (zh)
JP (1) JP3710002B2 (zh)
KR (1) KR100417056B1 (zh)
TW (1) TW277134B (zh)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3016373B2 (ja) * 1997-04-24 2000-03-06 日本電気株式会社 半導体記憶装置
JP3552882B2 (ja) * 1997-08-22 2004-08-11 富士通株式会社 半導体記憶装置
US6076176A (en) * 1998-03-19 2000-06-13 Digital Equipment Corporation Encoding of failing bit addresses to facilitate multi-bit failure detect using a wired-OR scheme
KR100333720B1 (ko) * 1998-06-30 2002-06-20 박종섭 강유전체메모리소자의리던던시회로
JP2000100195A (ja) * 1998-09-22 2000-04-07 Nec Corp 冗長回路を有する半導体記憶装置
JP2000297078A (ja) * 1999-04-15 2000-10-24 Daicel Chem Ind Ltd テトラゾール類金属塩の製造方法
KR100297193B1 (ko) * 1999-04-27 2001-10-29 윤종용 리던던트 로우 대체 구조를 가지는 반도체 메모리 장치 및 그것의 로우 구동 방법
US6484271B1 (en) 1999-09-16 2002-11-19 Koninklijke Philips Electronics N.V. Memory redundancy techniques
US6275426B1 (en) * 1999-10-18 2001-08-14 Netlogic Microsystems, Inc. Row redundancy for content addressable memory
JP3415541B2 (ja) * 2000-01-31 2003-06-09 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置
EP1126372B1 (en) * 2000-02-14 2005-05-18 STMicroelectronics S.r.l. Non-volatile memory device with configurable row redundancy
JP2011054270A (ja) * 2000-03-24 2011-03-17 Renesas Electronics Corp 半導体記憶装置
US6314030B1 (en) * 2000-06-14 2001-11-06 Micron Technology, Inc. Semiconductor memory having segmented row repair
KR100400312B1 (ko) * 2000-06-28 2003-10-01 주식회사 하이닉스반도체 로오 리페어회로를 가진 반도체 메모리 장치
US6632686B1 (en) * 2000-09-29 2003-10-14 Intel Corporation Silicon on insulator device design having improved floating body effect
KR100400307B1 (ko) 2001-05-09 2003-10-01 주식회사 하이닉스반도체 로오 리페어회로를 가진 반도체 메모리 장치
US6687171B2 (en) * 2002-04-26 2004-02-03 Infineon Technologies Aktiengesellschaft Flexible redundancy for memories
KR100499640B1 (ko) * 2003-04-21 2005-07-07 주식회사 하이닉스반도체 로오 리던던시 회로 및 리페어 방법
JP4062247B2 (ja) * 2003-12-11 2008-03-19 ソニー株式会社 半導体記憶装置
US7120732B2 (en) * 2004-02-24 2006-10-10 International Business Machines Corporation Content addressable memory structure
US7464217B2 (en) * 2004-02-24 2008-12-09 International Business Machines Corporation Design structure for content addressable memory
JP2009087513A (ja) * 2007-10-03 2009-04-23 Nec Electronics Corp 半導体記憶装置、及びメモリセルテスト方法
JP5513730B2 (ja) * 2008-02-08 2014-06-04 ピーエスフォー ルクスコ エスエイアールエル 半導体記憶装置
JP2009187641A (ja) * 2008-02-08 2009-08-20 Elpida Memory Inc 半導体記憶装置及びその制御方法、並びに不良アドレスの救済可否判定方法
JP6190462B2 (ja) * 2013-09-04 2017-08-30 東芝メモリ株式会社 半導体記憶装置
US10375106B1 (en) * 2016-01-13 2019-08-06 National Technology & Engineering Solutions Of Sandia, Llc Backplane filtering and firewalls
KR102050272B1 (ko) 2018-12-28 2019-11-29 오세범 여닫이용 자동 닫힘 장치
KR20200106736A (ko) 2019-03-05 2020-09-15 에스케이하이닉스 주식회사 결함구제회로
US10847207B2 (en) * 2019-04-08 2020-11-24 Micron Technology, Inc. Apparatuses and methods for controlling driving signals in semiconductor devices
US11990175B2 (en) 2022-04-01 2024-05-21 Micron Technology, Inc. Apparatuses and methods for controlling word line discharge

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6120293A (ja) * 1984-07-05 1986-01-29 Mitsubishi Electric Corp 半導体メモリ装置
JPH0817035B2 (ja) * 1988-12-09 1996-02-21 三菱電機株式会社 半導体メモリ装置
US5452251A (en) * 1992-12-03 1995-09-19 Fujitsu Limited Semiconductor memory device for selecting and deselecting blocks of word lines
JP3351595B2 (ja) * 1993-12-22 2002-11-25 株式会社日立製作所 半導体メモリ装置

Also Published As

Publication number Publication date
KR100417056B1 (ko) 2004-06-16
US5862086A (en) 1999-01-19
KR970013336A (ko) 1997-03-29
JP3710002B2 (ja) 2005-10-26
JPH0963295A (ja) 1997-03-07

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees