TW202504100A - 半導體裝置 - Google Patents

半導體裝置 Download PDF

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Publication number
TW202504100A
TW202504100A TW113136387A TW113136387A TW202504100A TW 202504100 A TW202504100 A TW 202504100A TW 113136387 A TW113136387 A TW 113136387A TW 113136387 A TW113136387 A TW 113136387A TW 202504100 A TW202504100 A TW 202504100A
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Taiwan
Prior art keywords
substrate
semiconductor device
layer
bonding layer
circuit element
Prior art date
Application number
TW113136387A
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English (en)
Chinese (zh)
Inventor
青池将之
Original Assignee
日商村田製作所股份有限公司
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Publication of TW202504100A publication Critical patent/TW202504100A/zh

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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H01L2224/1751—Function
    • H01L2224/17515—Bump connectors having different functions
    • H01L2224/17519—Bump connectors having different functions including bump connectors providing primarily thermal dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/80—Heterojunction BJTs
    • H10D10/821—Vertical heterojunction BJTs

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Bipolar Transistors (AREA)
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Families Citing this family (4)

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Publication number Priority date Publication date Assignee Title
JP7516786B2 (ja) 2019-06-21 2024-07-17 株式会社村田製作所 半導体装置及びその製造方法
CN113517209A (zh) * 2020-04-10 2021-10-19 长鑫存储技术有限公司 半导体结构及其形成方法
CN117546291A (zh) * 2021-06-11 2024-02-09 株式会社村田制作所 半导体装置
US20250080063A1 (en) * 2023-09-06 2025-03-06 Wolfspeed, Inc. Transistor with gate layout, device implementing the transistor with output pre-matching, and process of implementing the same

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05190488A (ja) * 1991-07-10 1993-07-30 Nec Corp オーミック電極の製造方法
US7247892B2 (en) * 2000-04-24 2007-07-24 Taylor Geoff W Imaging array utilizing thyristor-based pixel elements
JP4701506B2 (ja) * 2000-09-14 2011-06-15 ソニー株式会社 回路ブロック体の製造方法、配線回路装置の製造方法並びに半導体装置の製造方法
JP2005129825A (ja) 2003-10-27 2005-05-19 Sumitomo Chemical Co Ltd 化合物半導体基板の製造方法
KR100687758B1 (ko) * 2005-12-08 2007-02-27 한국전자통신연구원 이종 접합 바이폴라 트랜지스터 및 그 제조방법
JP2008204968A (ja) * 2007-02-16 2008-09-04 Furukawa Electric Co Ltd:The 半導体パッケージ基板とその製造方法
JP2009190918A (ja) 2008-02-13 2009-08-27 New Japan Radio Co Ltd 窒化物半導体基板の製造方法及び窒化物半導体装置の製造方法
JP2010206020A (ja) * 2009-03-04 2010-09-16 Panasonic Corp 半導体装置
US20100270591A1 (en) * 2009-04-27 2010-10-28 University Of Seoul Industry Cooperation Foundation High-electron mobility transistor
JP2011199267A (ja) * 2010-02-26 2011-10-06 Sumitomo Chemical Co Ltd 電子デバイスおよび電子デバイスの製造方法
US8772817B2 (en) * 2010-12-22 2014-07-08 Cree, Inc. Electronic device submounts including substrates with thermally conductive vias
JP5842457B2 (ja) 2011-01-24 2016-01-13 富士通株式会社 ヒートスプレッダ及びその製造方法、半導体装置、電子装置
CN104160502A (zh) * 2012-03-09 2014-11-19 三菱电机株式会社 半导体模块
JP5667109B2 (ja) 2012-03-13 2015-02-12 日本電信電話株式会社 ヘテロ接合バイポーラトランジスタおよびその製造方法
JP6307832B2 (ja) * 2013-01-22 2018-04-11 三菱マテリアル株式会社 パワーモジュール用基板、ヒートシンク付パワーモジュール用基板、ヒートシンク付パワーモジュール
JP6120704B2 (ja) * 2013-07-03 2017-04-26 三菱電機株式会社 半導体装置
JP6004343B2 (ja) * 2013-09-13 2016-10-05 日本電信電話株式会社 半導体装置の製造方法
JP2015065241A (ja) * 2013-09-24 2015-04-09 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
JP2015144248A (ja) * 2013-12-25 2015-08-06 キヤノン株式会社 半導体装置、及びその製造方法
KR102019914B1 (ko) * 2014-06-11 2019-11-04 엘지이노텍 주식회사 발광 소자
US20160141220A1 (en) * 2014-11-18 2016-05-19 Sumitomo Electric Industries, Ltd. Hetero-bipolar transistor and method for producing the same
JP6071009B2 (ja) * 2014-11-27 2017-02-01 株式会社村田製作所 化合物半導体装置
JP2016171172A (ja) 2015-03-12 2016-09-23 日本電信電話株式会社 ヘテロ接合バイポーラトランジスタおよびその製造方法
JP6415381B2 (ja) * 2015-04-30 2018-10-31 三菱電機株式会社 半導体装置の製造方法
JP6348451B2 (ja) 2015-05-25 2018-06-27 日本電信電話株式会社 ヘテロ接合バイポーラトランジスタ
WO2016209282A1 (en) * 2015-06-26 2016-12-29 Intel Corporation Gan devices on engineered silicon substrates
JP6578368B2 (ja) * 2015-10-29 2019-09-18 京セラ株式会社 発光素子、受発光素子モジュールおよび光学式センサ
JP2018026406A (ja) * 2016-08-08 2018-02-15 株式会社村田製作所 ヘテロ接合バイポーラトランジスタ
US9997590B2 (en) * 2016-10-24 2018-06-12 International Büsiness Machines Corporation FinFET resistor and method to fabricate same
JP2019009409A (ja) 2017-06-28 2019-01-17 株式会社村田製作所 半導体チップ
US10847436B2 (en) * 2017-10-11 2020-11-24 Murata Manufacturing Co., Ltd. Power amplifier module
JP2019075536A (ja) 2017-10-11 2019-05-16 株式会社村田製作所 パワーアンプモジュール
JP2019102724A (ja) * 2017-12-06 2019-06-24 株式会社村田製作所 半導体素子
JP7516786B2 (ja) 2019-06-21 2024-07-17 株式会社村田製作所 半導体装置及びその製造方法

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