TW201448058A - 半導體裝置之製造方法 - Google Patents

半導體裝置之製造方法 Download PDF

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Publication number
TW201448058A
TW201448058A TW103102113A TW103102113A TW201448058A TW 201448058 A TW201448058 A TW 201448058A TW 103102113 A TW103102113 A TW 103102113A TW 103102113 A TW103102113 A TW 103102113A TW 201448058 A TW201448058 A TW 201448058A
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Taiwan
Prior art keywords
semiconductor device
sealing resin
resin layer
manufacturing
substrate
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Application number
TW103102113A
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English (en)
Inventor
Sensho Usami
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Ps4 Luxco Sarl
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Publication of TW201448058A publication Critical patent/TW201448058A/zh

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    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/26Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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Abstract

製造成為標本之半導體裝置,並測定標本之彎曲。基於測定值而決定從密封樹脂層所除去之部位。在製造半導體裝置的過程中,於形成密封樹脂層之後,將除去部位除去。

Description

半導體裝置之製造方法
本發明,係有關於半導體裝置之形狀,特別是有關於對起因於構成半導體裝置的構件間之熱膨脹係數之差異所導致的彎曲而造成的增高化作抑制。
一般而言,BGA(Ball Grid Array)型之半導體裝置,例如係如同在專利文獻1中所示一般,在配線基板之其中一面上搭載半導體晶片,並以將前述半導體晶片作覆蓋的方式而將配線基板之其中一面藉由密封樹脂來作覆蓋,而構成之。
通常,構成半導體裝置之配線基板、半導體晶片、密封樹脂,係相互具有相異之熱膨脹係數。起因於此熱膨脹係數之差異,在半導體裝置處係會產生彎曲。在產生有凸狀之彎曲的半導體裝置處,中央部會相較於周邊部而更加突出,相反的,在產生有凹狀之彎曲的半導體裝置處,周邊部會相較於中央部而更加突出。不論是在何者的情況,具有起因於構成構件之熱膨脹係數的差異所導致 之彎曲的實際之半導體裝置,係會成為具備有相較於不存在有彎曲之理想狀態的半導體裝置而更加突出之部位。此種突出部之存在,係會產生使半導體裝置之全高度增高的作用,而成為使半導體裝置實質性增高化的其中一個重要原因。
近年來,對於攜帶機器等之小型化、薄型化係有所要求,針對被組入至此種機器中之半導體裝置,亦係要求有小型化、薄型化。在此種情況下,若是於半導體裝置處產生有大的彎曲,則半導體裝置之安裝後的全高度係會變高,其結果,會有導致變得無法組入至攜帶機器中並使製造良率惡化的事態之虞。
藉由使半導體裝置之各構成構件的熱膨脹係數盡可能地相一致,係能夠某種程度地對於彎曲之量作抑制。但是,就算如此,也仍存在有極限,並且係成為對於半導體裝置之材料的組合造成限制。
作為記載有相關於本發明之發明的文獻,係可列舉出專利文獻2。在該文獻中,係揭示有:為了防止半導體裝置之角部的碎裂、缺損,而將半導體裝置之各角隅部分的4個場所設為凹部形狀之技術。在該文獻中,係並未針對半導體裝置之彎曲作考慮。又,在該文獻中,為了於密封樹脂處形成凹部,係追加有新的工程。
作為記載有相關於本發明之技術的文獻,係可列舉出專利文獻1、2。
[先前技術文獻] [專利文獻]
專利文獻1:日本特開2012-169398號公報
專利文獻2:日本特開2002-100702號公報
本發明,係為有鑑於此種狀況而進行者,本發明所欲解決之課題,係在於防止起因於在半導體裝置處所產生之彎曲等的形狀變形而導致半導體裝置之一部分有所突出並造成半導體裝置增高化。
為了解決上述課題,本發明,係作為其中一種形態,而提供一種半導體裝置之製造方法,其特徵為,包含有:製造成為標本之半導體裝置之標本製造階段;和測定關連於前述標本之彎曲的測定值之標本測定階段;和基於前述測定值,而對於在將前述半導體裝置載置於基板上時而位置在前述基板之相反側處的將前述半導體裝置之其中一面作覆蓋的密封樹脂層來決定進行除去之除去部位的除去部位決定階段;和身為製造前述半導體裝置之階段,並且包含有在形成前述密封樹脂層後而將前述除去部位除去的工程之製造階段。
若依據本發明,則由於係基於成為標本之半導體裝置的測定結果,來制定包含有從半導體裝置而突出的部位之除去部位並將其除去,因此,係能夠防止殘留有突出部位之半導體裝置之增高化的情況。
1、20‧‧‧標本
2、21‧‧‧配線基板
3、22、62、102‧‧‧半導體晶片
4、23、41、75、81、91‧‧‧密封樹脂層
5、24‧‧‧焊錫球
6、25‧‧‧基板
7、26‧‧‧基準面
8、27‧‧‧除去部位
11、31‧‧‧突出部位
12、13、32、33‧‧‧非突出部位
40、60、80、90、100‧‧‧半導體裝置
42a、42b、42c、42d、82、93‧‧‧第1凹部
43、92‧‧‧第2凹部
44‧‧‧配線基板
45、101‧‧‧接著構件
46‧‧‧半導體晶片
47、69‧‧‧焊錫球
48、68‧‧‧焊墊
49、64‧‧‧電極焊墊
50、65‧‧‧連接焊墊
51‧‧‧打線
63‧‧‧底部填充材
66‧‧‧突塊
67‧‧‧連接用焊墊
70‧‧‧配線母基板
71‧‧‧製品形成區域
72‧‧‧框部
73‧‧‧切割線
74‧‧‧定位孔
[圖1]用以對於本發明之半導體裝置的製造方法作說明之流程圖。
[圖2]用以針對在藉由本發明之半導體製造裝置之製造方法來製造出作為最終目的物之半導體裝置之前所製造的彎曲為凹狀之標本1作說明之圖。
[圖3]用以針對除去部位8之其中一例作說明之圖。
[圖4]用以針對除去部位8之其中一例作說明之圖。
[圖5]用以針對在藉由本發明之半導體製造裝置之製造方法來製造出作為最終目的物之半導體裝置之前所製造的彎曲為凸狀之標本20作說明之圖。
[圖6]用以針對除去部位27之其中一例作說明之圖。
[圖7]用以針對除去部位27之其中一例作說明之圖。
[圖8]對實施例1之半導體裝置40的概略構成作展示之平面圖。
[圖9]對圖8之A-A’間的概略構成作展示之剖面圖。
[圖10]對圖8之B-B’間的概略構成作展示之剖面 圖。
[圖11]對於將實施例1之半導體裝置40在其他之半導體裝置上作了封裝層積的構造作展示之剖面圖。
[圖12]用以對於半導體裝置40的製造方法作說明之圖。
[圖13]從上方而俯視圖12(a)之工程的配線母基板70之圖。
[圖14]從上方而俯視圖12(b)之工程的配線母基板70之圖。
[圖15]從上方而俯視圖12(e)之工程的配線母基板70之圖。
[圖16]對實施例2之半導體裝置80的概略構成作展示之平面圖。
[圖17]對圖16之E-E’間的概略構成作展示之剖面圖。
[圖18]對圖16之F-F’間的概略構成作展示之剖面圖。
[圖19]對實施例3之半導體裝置90的概略構成作展示之平面圖。
[圖20]對圖19之G-G’間的概略構成作展示之剖面圖。
[圖21]對圖19之H-H’間的概略構成作展示之剖面圖。
[圖22]係為實施例4之半導體裝置100的A-A’剖面 圖。
[圖23]係為實施例4之半導體裝置100的B-B’剖面圖。
針對身為本發明之其中一種實施形態的半導體裝置之製造方法作說明。在本發明之製造方法中,係在製造身為最終目的物之製品的半導體裝置之前,先製造該半導體裝置之標本,並對於標本進行測定,而取得關連於彎曲之大小和方向的測定值。起因於彎曲,載置於基板上之標本半導體裝置的表面、更詳細而言,密封樹脂層之一部分,係會成為超過既定之基準面。當將此超過基準面之部位稱作突出部位時,在本方法中,係將包含有密封樹脂層之突出部位的部位,制定為除去部位,並在製造作為製品之半導體裝置的過程中,將除去部位除去。
若是參考圖1,則在製造出最終作為製品的半導體裝置之前,係先製造成為標本之半導體裝置(步驟S1)。如圖2中所示一般,標本1,係由配線基板2、和被載置於配線基板2之上之半導體晶片3、和覆蓋配線基板2和半導體晶片3之密封樹脂層4、和用以載置配線基板2之基板6、以及將配線基板2和基板6作連接之焊錫球5,而構成之。標本1之製造方法,係與一般性之半導體裝置之製造方法相同。配線基板2、半導體晶片3、密封樹脂層4之材料,係互為相異,因此,熱膨脹係數亦互 為相異。起因於此熱膨脹係數之差異和配線基板2、半導體晶片3、密封樹脂層4之尺寸、形狀等,如圖2中所示一般,標本1係在基板6之上產生有凹狀之彎曲。為了易於理解本發明,圖2,係將實際之半導體裝置的彎曲作了變形。
接著,藉由實際對於標本1進行測定,而測定出彎曲之大小、方向等的關連於變形之值(步驟S2)。
接著,基於藉由步驟S2所取得之設定值和既定之基準面7,而求取出突出部位(步驟S3)。基準面7,例如,係為當將身為最終目的物之半導體裝置藉由焊錫球而載置於基板上時的半導體裝置之從基板表面起的高度。當如同標本1一般而產生有凹狀之彎曲的情況時,標本1之周緣部,特別是當標本1為矩形時,會如同圖3、4中所示一般,密封樹脂層4之四角隅的上側係會成為三角錐狀之突出部位11。
接著,基於突出部位11而制定除去部位8(步驟S4)。除去部位8之形狀,係只要為包含有突出部位11者即可。例如,圖3之除去部位8,係為作為將該圖中之代表突出部位11的直角三角形之左側的斜線作為中心軸並以相同之直角三角形的右側之斜線作為半徑所得到的假想性之圓柱的一部分,而將突出部位11從密封樹脂層4除去者。又,圖4之除去部位8,係為作為將該圖中之在代表突出部位11的直角三角形之左側的斜線之 延長線上具有中心的假想性之球體的一部分,而將突出部位11從密封樹脂層4除去者。
在如此這般而制定出除去部位8之後,係製造作為最終生成物之半導體裝置。在其之製造過程中,將除去部位8除去(步驟S5)。
上述之說明,雖係針對半導體裝置彎曲為凹狀的情況來作了說明,但是,相反的,就算是當半導體裝置彎曲為凸狀的情況時,亦能夠適用本發明。如圖5中所示一般,假設標本20係為彎曲為凸狀者。與標本1相同的,標本20,係由配線基板21、半導體晶片22、密封樹脂層23、焊錫球24、基板25所成。標本20,由於係成為凸狀,因此其之中央部係成為較基準面26而更高。除去部位27,係只要為包含有突出部位31之形狀即可,例如,係可如同圖6中所示一般,設為以包含有突出部位31之圓柱狀來將密封樹脂層23之一部分作除去者,亦可如同圖7中所示一般,設為以包含有突出部位31之球體的一部分來將密封樹脂層23之一部分作除去者。
[實施例1]
作為實施例1,針對圖8之半導體裝置40作說明。半導體裝置40,係為基於上述之半導體裝置之製造方法所製造者,並對應於具有凹狀之彎曲的標本1。如圖8中所示一般,若是對於設置在未圖示之基板上的狀態作俯視,則半導體裝置40,係在將其之表面作覆蓋的密 封樹脂層41之表面的四角隅處,作為相當於上述之除去部位8者,而被形成有第1凹部42a、42b、42c、42d。又,在密封樹脂層41之略中央位置處,係被形成有構成像是公司名稱、製品名稱等的辨識用之記號部(在圖中,係作為例子而記載有「XXX」)之第2凹部43。半導體裝置40,係經由並排在圖中以點線所描繪的圓的位置處之焊錫球,而被載置在未圖示之基板上。
如同圖9之A-A剖面圖以及圖10之B-B剖面圖所示一般,半導體裝置40,係具備有將藉由接著構件45而接著在配線基板44上的半導體晶片46以密封樹脂層41來作覆蓋的構造。半導體晶片46,例如係為記憶體晶片。在配線基板44之下面,係被設置有與焊錫球47之配置相對應的焊墊48。半導體晶片46之電極焊墊49和配線基板44之連接焊墊50之間,係藉由打線51而作連接。
如同由圖9、10而可清楚得知一般,半導體裝置40係具有凹狀之彎曲。如圖10中所示一般,相較於其他之方向,特別是在配線基板44之對角線上,彎曲係為大,在對應於密封樹脂層41之四角隅的位置處之高度係成為最大。因此,當如同半導體裝置40一般而具有凹狀之彎曲的情況時,係能夠藉由在密封樹脂層41之四角隅處形成第1凹部42a~42d,係能夠將半導體裝置40之最大高度降低。第1凹部42a~42d,係以較第2凹部43而更深之深度來形成。例如,第1凹部42a~42d係以10 ~60μm之深度來形成,第2凹部43係以5~30μm之深度來形成。
在實施例1中,半導體裝置40係彎曲為凹狀,藉由在密封樹脂層41之表面的頂點位置處形成第1凹部42a~42d,係能夠將半導體裝置之全體高度降低,而亦能夠將安裝後之全體高度降低。又,藉由將密封樹脂層41之角部的樹脂量減少,係能夠將彎曲量降低。進而,在量產半導體裝置40時,係能夠對於在各個半導體裝置40間之彎曲的變動作抑制。藉由此,係能夠降低在將半導體裝置40組入至攜帶資訊處理裝置等之其他裝置中時的安裝不良之發生率,而能夠使組裝良率提昇。
另外,在形成第2凹部43時,如圖9中所示一般,係以避開成為連接半導體晶片46和配線基板44之打線51的正上方之位置而形成在表面上為理想。藉由形成於此種位置,在藉由雷射標記而形成記號部時,係能夠防止打線51從密封樹脂層41而露出。
如圖11中所示一般,係亦可將半導體裝置40層積在其他之半導體裝置60上。半導體裝置60,係在配線基板61和半導體晶片42之間的空隙中,填充有底部填充材63。半導體晶片62,例如係為邏輯晶片,半導體晶片62,係被覆晶安裝於配線基板61上。半導體晶片62之電極焊墊64和配線基板61之連接焊墊65,係藉由突塊66而作連接。在配線基板61之上面,係具備有連接用焊墊67。焊錫球47,係被形成於半導體裝置40之焊墊 48和半導體裝置60之連接用焊墊67之間。進而,在配線基板61之下面,係具備有焊墊68。藉由在焊墊68之下形成焊錫球69,而將半導體裝置60(以及被載置於其上之半導體裝置40)載置在未圖示之其他的配線基板等之上。
與半導體裝置40相異,在半導體裝置60處,由於係並未被形成有密封樹脂層,因此相較於半導體裝置40,彎曲係為小。如圖11中所示一般,將彎曲為大之半導體裝置40搭載於彎曲為小之半導體裝置60之上。因此,在搭載半導體裝置40時,係以將焊錫球47之直徑設為半導體晶片62之安裝高度以上為理想。
接著,參考圖12,針對半導體裝置40之製造方法作說明。
首先,準備如同圖12(a)中所示一般之配線母基板70。在後續之說明中,係將載置半導體晶片之側的配線母基板70之面稱作上面,並將其之相反側的搭載焊錫球之側之面稱作下面。配線母基板70,係由各別與1個的半導體裝置相對應之製品形成區域71和框部72所成。在製品形成區域71彼此之間、製品形成區域71和框部72之間,係被制定有切割線73。在配線母基板70之下面,係被形成有焊墊48。若是從上面側而對於此時之配線母基板70作觀察,則係成為如同圖13一般。藉由切割線73,配線母基板70之上面係被分割成4×6個的矩形狀之製品形成區域71。在製品形成區域71的各個處,係 被形成有連接焊墊50。在框部72處,係被設置有定位孔74。
接著,如圖12(b)中所示一般,在各個製品形成區域71處,塗布接著構件45,並於其上載置半導體晶片46。之後,在半導體晶片46之各個處,將電極焊墊49和連接焊墊50藉由打線51來作連接。若是從上面側而對於此時之配線母基板70作觀察,則係成為如同圖14一般。
接著,如同圖12(c)中所示一般,藉由將熱硬化性之環氧樹脂等作了加壓、熔融的密封樹脂層75,而覆蓋配線母基板70之上面側,並如同圖12(d)中所示一般地藉由加熱等來使其反應並硬化。
接著,進行記號形成工程。在記號形成工程中,係如同圖12(e)中所示一般,例如藉由使用雷射標記裝置來在密封樹脂層75之表面上進行標記,而整批地形成第1凹部42a~42d、第2凹部43。於後,當並不需要對於第1凹部42a~42d相互作區分時,係將其稱為第1凹部42。
雷射標記裝置之雷射,例如係使用YV04雷射(釩酸釔)。藉由對於密封樹脂層75之樹脂表面照射雷射光並將樹脂表面作5~30μm程度之削去,被削去之凹凸係會產生光的散射,藉由與模封樹脂表面之間的對比,記號係成為能夠辨識。藉由將雷射光通過既定之圖案的遮罩來照射至密封樹脂層75處,或者是藉由以雷射光來在 密封樹脂層75上描繪既定之圖案,係能夠在密封樹脂層75之表面上形成所期望之凹部。
如圖15中所示一般,在配線母基板70處之區劃出製品形成區域71的切割線73所相互交叉之位置處,藉由雷射標記而作為略圓形狀之凹部來形成第1凹部42。第1凹部42,係較第2凹部43更深,例如以具有10~60μm程度之深度的方式來形成。
又,在記號形成工程中,與第1凹部42之形成同時地,而在配線母基板70之複數之製品形成區域71的各個處,作為第2凹部43,形成公司名稱、製品名稱等之辨識用記號。第2凹部43,係藉由將各個的半導體裝置40之密封樹脂層41的表面藉由雷射標記來作切削而形成之。考慮到此事,在決定形成第2凹部43之位置時,係以對於第2凹部43之下的構造作考慮為理想。例如,對於將配線基板44和半導體晶片46藉由打線51來作連接一事作考慮,係以在密封樹脂層41之表面上而避開相當於打線51之上方的位置地來形成第2凹部43為理想。藉由此,係能夠避免起因於以雷射標記來對於樹脂表面進行研削一事而導致打線51從密封樹脂層41之表面露出的情形。
接著,如圖12(f)中所示一般,在配線母基板70之下面的焊墊48處,搭載焊錫球47。
最後,在基板切割工程中,如圖12(g)中所示一般,藉由將密封樹脂層75接著於切割膠帶上,而將 密封樹脂層75和配線母基板70支持於切割膠帶上。之後,使用切割刃來將配線母基板70以及密封樹脂層75沿著切割線73而縱橫地切斷,來將各個製品形成區域71之每一者相互分離,藉由此而得到個別的半導體裝置40。
如此這般所製造出之半導體裝置40,係如圖8中所示一般,成為在密封樹脂層41之表面略中央處,作為第2凹部43而被形成有辨識用記號,並在密封樹脂層41之表面的四角隅處,作為第1凹部42而被形成有較第2凹部43更深並且相當於圓周之四分之一的圓弧狀之凹部。
當起因於密封樹脂層41、半導體晶片46、配線基板44之熱膨脹率互為相異等的理由,而產生有半導體裝置40之中央部凹陷並且周邊部翹起之所謂凹狀之彎曲時,若是將半導體裝置40載置在基板等之上,則會成為產生有使其之四角隅部成為最高一般的彎曲,但是,由於係作為第1凹部42而對於變高的部份作了研削,因此係能夠防止起因於凹狀之彎曲所導致的半導體裝置之全高度變高的情形。
又,第1凹部42之形成,係在記號形成工程中與第2凹部43之形成一同整批地進行。第2凹部43、亦即是辨識用記號之形成,係為在先前技術之半導體裝置的製造中亦有所進行之工程。故而,係並不需要僅為了形成第1凹部42之目的而追加新的工程,僅需對於既存之工程作部分的變更,便能夠形成第1凹部42。
[實施例2]
針對身為本發明之實施例2的半導體裝置80作說明。在上述之實施例1中,係在具有凹狀之彎曲的半導體裝置40之表面的四角隅處,作為第1凹部42而形成將四分之一之圓弧作為底面的柱狀之凹部。本實施例之半導體裝置80,係同樣具備有凹狀之彎曲,而對應於實施形態中之標本1,但是,第1凹部之形狀係為相異。
如圖16中所示一般,半導體裝置80,係將沿著密封樹脂層81之周緣部所形成的階差作為第1凹部82。作為相當於在實施形態中所作了說明之除去部位8者,在實施例1中,係在密封樹脂層81之四角隅處分別形成了凹部42a~42d,但是,在實施例2中,係除了密封樹脂層81之四角隅以外,亦在密封樹脂層81之外周的直線部處形成凹部。關於第2凹部43、半導體晶片46、焊錫球47等之與實施例1相同之物,係附加相同的元件符號並省略其說明。
於此,對關連於實施例1之圖9和關連於實施例2之圖17作比較並進行說明。在實施例1中,由於係僅於四角隅處被形成有第1凹部42,因此,係並無法避免起因於在與半導體裝置40之外周的邊相平行之方向(例如圖8之A-A’方向)上的彎曲而導致密封樹脂層41之邊的部份變高的情形。相對於此,在實施例2中,由於係沿著半導體裝置80之外周之邊而形成階差,因此係能 夠避免起因於E-E’方向之彎曲、鞍狀之彎曲而導致密封樹脂層81之邊的部份變高的情形。
進而,如同藉由對關連於實施例1之圖10和關連於實施例2之圖18作比較而可得知一般,半導體裝置80,由於係與半導體裝置40同樣的而於其之四角隅處具備有凹部,因此,與實施例1相同的,針對圖16之F-F’方向、半導體裝置80之對角線方向的彎曲,亦能夠避免增高化。
另外,半導體裝置80之製造方法,係與半導體裝置40之製造方法略相同。在實施例1中,雖係在切割線73之交點處形成圓狀之凹部並製造出半導體裝置40,但是,在實施例2中,係並不被限定於切割線73之交點,而亦沿著切割線73來形成帶狀之凹部,於此點上,兩者係為相異。
[實施例3]
針對身為本發明之實施例3的半導體裝置90作說明。實施例1、2,係以具有凹狀之彎曲的半導體裝置作為前提。相對於此,半導體裝置90係具備有凸狀之彎曲,而對應於實施形態之標本20。起因於凸狀之彎曲,密封樹脂層91之中央部的高度係相對性變高,周邊部之高度係相對性變低。
如圖19中所示一般,與實施例1、2相同地,半導體裝置90係具備有第1以及第2凹部,但是各 凹部之位置係為相異。作為相當於在實施形態中所作了說明的除去部位8之凹部,在密封樹脂層91之表面的略中央處形成第1凹部92。又,將代表半導體裝置90之辨識用記號等的第2凹部93,形成在密封樹脂層91之表面的半導體裝置90之端部和第1凹部92之間。關於與實施例1、2相同之構成要素,係附加相同之元件符號並省略其說明。在形成第1凹部92時,如同圖20中所示一般,係以避開打線51之上方地來形成為理想。此係為了避免打線51從第1凹部92而露出的情形之故。
起因於密封樹脂層91之凸狀的彎曲,原本密封樹脂層91之中央部分的高度係會變得最高,其結果,係使半導體裝置90之高度增加,但是,藉由形成第1凹部92,係能夠避免起因於凸狀之彎曲所導致的半導體裝置90之增高化。
[實施例4]
在上述之實施形態以及實施例中,係列舉出在1個製品形成區域中搭載1個半導體晶片並藉由密封樹脂層來作覆蓋的構造之半導體裝置為例而作了說明,但是,亦可對於在1個製品形成區域中搭載複數之半導體晶片並藉由密封樹脂層來作覆蓋的構造之半導體裝置,而適用本發明。作為實施例4,針對在1個製品形成區域中層積搭載2個半導體晶片並藉由密封樹脂層來作覆蓋的構造之半導體裝置100作說明。
實施例4,雖係為對於與實施例1同樣的而具有凹狀之彎曲之半導體裝置來適用本發明的例子,但是,在實施例1中,係為在配線基板44之上搭載有1個的半導體晶片46者,相對於此,本實施例之半導體裝置100,係為在半導體晶片46之上塗布接著構件101並更進而搭載有其他的半導體晶片102者。
從上方而俯視半導體裝置100的模樣,係與圖8中所示之半導體裝置40相同。於圖22中,對相當於圖8之A-A’剖面的剖面圖作展示,於圖23中,對相當於B-B’剖面的剖面圖作展示。特別是如同根據圖23而可得知一般,在本實施例中,係藉由在起因於沿著半導體裝置100之對角線方向所產生的凹狀之彎曲而變為最高的位置、亦即是在密封樹脂層41之表面的四角隅處,分別形成第1凹部42a~42d,而防止半導體裝置100之增高化。
以上,雖係基於實施例來對於由本發明者所進行之發明作了說明,但是,本發明係並不被限定於上述實施例,當然的,在不脫離其要旨的範圍內,係可作各種之變更。
例如,作為在實施形態中之所謂除去部位8的例子,雖係列舉出針對彎曲為凹狀之半導體裝置而藉由在切割線之交點處形成圓形之凹部並沿著切割線來作切斷而於半導體裝置之四角隅處形成有中心角為90度之圓弧形之凹部者(實施例1)、和針對同樣彎曲為凹狀之半導 體裝置而藉由沿著切割線來形成帶狀之凹部並沿著切割線來作切斷而形成為沿著半導體裝置之四邊來以帶狀之凹部作包圍者(實施例2)、以及在彎曲為凸狀之半導體裝置的略中央處形成圓形之凹部者,但是,本發明係並不被限定為此些之例。本發明之其中一種形態,係在於:當起因於密封樹脂層、半導體晶片、配線基板之間的熱膨脹係數、形狀之差異等而導致在半導體裝置處產生有彎曲時,藉由製造出該半導體裝置之標本,並特定出起因於彎曲而使標本之高度成為最高的位置,再將包含有該位置之部分較理想為與使用雷射標記裝置等來研削出辨識記號之工程同時地而進行研削,來防止成為最終生成物之半導體裝置的增高化。故而,形成相當於除去部位之第1凹部的位置,係應當包含有在對於標本進行了測定時之實際上最為增高化的場所,而並不應視為被限定於上述之形狀或位置者。
上述之實施形態的一部分或者是全部,係亦可如同下述之附記一般地來記載,但是,係並不被限定於此些之內容。
(附記1)
一種半導體裝置,其特徵為:係由配線基板、和被搭載於前述配線基板之其中一面上之半導體晶片、和以覆蓋前述半導體晶片的方式而被形成於前述配線基板之其中一面上的密封樹脂層,所構成者,前述密封樹脂層,係於與 前述配線基板相反側處具備有表面,前述表面係被構成為朝向既定之方向而彎曲,在應成為朝向前述既定之方向而彎曲的前述表面之頂點的部位處,係被形成有凹部。
(附記2)
如附記1所記載之半導體裝置,其中,前述密封樹脂層之表面,係被構成為會彎曲為凹狀,前述凹部,係被形成在前述密封樹脂層之前述表面的端部之部位處。
(附記3)
如附記1所記載之半導體裝置,其中,前述密封樹脂層之表面,係被構成為會彎曲為凸狀,前述凹部,係被形成在前述密封樹脂層之前述表面的略中央之部位處。
(附記4)
如附記2所記載之半導體裝置,其中,前述凹部,係沿著前述密封樹脂層之前述表面的外緣而被一體性地形成。
(附記5)
如附記1所記載之半導體裝置,其中,在前述密封樹脂層之前述表面上,係被形成有記號部,前述記號部,係被形成在避開了前述凹部的位置處。
(附記6)
如附記5所記載之半導體裝置,其中,前述配線基板和前述半導體晶片,係藉由複數之打線而被作電性連接,前述凹部和記號部,係被形成在避開了位置於前述複數之打線之上方處的前述密封樹脂層之表面的部位之位置處。
(附記7)
一種半導體裝置,其特徵為:係具備有:配線基板、和被搭載於前述配線基板之其中一面上之半導體晶片、和以覆蓋前述半導體晶片的方式而被形成於配線基板之其中一面上的密封樹脂層、和被形成在前述密封樹脂層之表面上之第1凹部、以及被形成在前述密封樹脂層之表面上並且距離前述表面之深度為較前述第1凹部而更大之第2凹部。
(附記8)
如附記7所記載之半導體裝置,其中,前述第1凹部係被形成於前述密封樹脂層之前述表面的成為略中央之部位處,前述第2凹部係被形成於前述密封樹脂層之前述表面的成為端部之部位處
(附記9)
如附記7所記載之半導體裝置,其中,前述第2凹部係被形成於前述密封樹脂層之前述表面的成為略中央之部 位處,前述第1凹部係被形成於前述密封樹脂層之前述表面的與第1凹部相異之部位處。
(附記10)
如附記8所記載之半導體裝置,其中,前述第2凹部,係沿著前述密封樹脂層之前述表面的外緣而被一體性地形成。
(附記11)
如附記7所記載之半導體裝置,其中,前述第1凹部,係為被形成在前述密封樹脂層之前述表面上的記號部。
(附記12)
如附記7所記載之半導體裝置,其中,前述配線基板和前述半導體晶片,係藉由複數之打線而被作電性連接,前述第1凹部和第2凹部,係被形成在避開了位置於前述複數之打線之上方處的前述密封樹脂層之表面的部位之位置處。
另外,本申請案,係以來自2013年1月22日申請之日本特許出願第2013-9285號的優先權作為基礎,並主張其利益,且將其揭示內容全部作為參考文獻而包含於本案中。

Claims (7)

  1. 一種半導體裝置之製造方法,其特徵為,包含有:製造成為標本之半導體裝置之標本製造階段;和測定關連於前述標本之彎曲的測定值之標本測定階段;和基於前述測定值,而對於在將前述半導體裝置載置於基板上時而位置在前述基板之相反側處的將前述半導體基板之其中一面作覆蓋的密封樹脂層來決定進行除去之除去部位的除去部位決定階段;和身為製造前述半導體裝置之階段,並且包含有在形成前述密封樹脂層後而將前述除去部位除去的工程之製造階段。
  2. 如申請專利範圍第1項所記載之半導體裝置之製造方法,其中,前述標本以及前述半導體裝置,係均具備有配線基板、半導體晶片以及密封樹脂層,前述標本之配線基板、半導體晶片以及密封樹脂層,和前述半導體裝置之配線基板、半導體晶片以及密封樹脂層,係均為由同一材料所成,或者是均為由至少熱膨脹係數為相同之材料所成。
  3. 如申請專利範圍第1項所記載之半導體裝置之製造方法,其中,前述除去部位,係包含有身為當將前述標本載置於前述基板上時從前述基板起之高度會超過預先所制定之高度的前述密封樹脂層之部位的突出部位。
  4. 如申請專利範圍第1項所記載之半導體裝置之製造方法,其中,前述製造階段,係包含有:準備具有藉由切割線而作了區劃的複數之製品區域的配線基板之工程;和在前述複數之製品區域的各個處而搭載一乃至複數之半導體晶片之工程;和以將前述複數之製品區域整批作覆蓋的方式,而在前述配線基板上形成密封樹脂層之工程;和藉由雷射記號而從前述密封樹脂層來將前述除去部位除去之工程;和藉由沿著前述切割線而將前述配線基板和前述密封樹脂層切斷,來將各個製品區域之每一者相互分離之工程。
  5. 如申請專利範圍第4項所記載之半導體裝置之製造方法,其中,係於前述將除去部位除去之工程的前後,或者是與該工程並行地,而在與前述密封樹脂層之前述複數之製品區域相對應的部份處,分別藉由雷射記號而形成記號部。
  6. 如申請專利範圍第1項所記載之半導體裝置之製造方法,其中,前述彎曲係為凹狀,前述除去部位,係包含前述密封樹脂層之外緣。
  7. 如申請專利範圍第1項所記載之半導體裝置之製造方法,其中,前述彎曲係為凸狀,前述除去部位,係包含前述密封樹脂層之略中心。
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