JP5672242B2 - 電子部品の製造方法 - Google Patents
電子部品の製造方法 Download PDFInfo
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- JP5672242B2 JP5672242B2 JP2011547463A JP2011547463A JP5672242B2 JP 5672242 B2 JP5672242 B2 JP 5672242B2 JP 2011547463 A JP2011547463 A JP 2011547463A JP 2011547463 A JP2011547463 A JP 2011547463A JP 5672242 B2 JP5672242 B2 JP 5672242B2
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- rotary blade
- grinding
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- coating layer
- electronic component
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- 238000004519 manufacturing process Methods 0.000 title claims description 29
- 239000000758 substrate Substances 0.000 claims description 99
- 239000011247 coating layer Substances 0.000 claims description 73
- 238000000034 method Methods 0.000 claims description 27
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 15
- 230000002093 peripheral effect Effects 0.000 claims description 15
- 239000010410 layer Substances 0.000 claims description 13
- 239000012212 insulator Substances 0.000 claims description 5
- 239000004020 conductor Substances 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims description 3
- 239000011347 resin Substances 0.000 description 16
- 229920005989 resin Polymers 0.000 description 16
- 239000000919 ceramic Substances 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B19/00—Single-purpose machines or devices for particular grinding operations not covered by any other main group
- B24B19/02—Single-purpose machines or devices for particular grinding operations not covered by any other main group for grinding grooves, e.g. on shafts, in casings, in tubes, homokinetic joint elements
- B24B19/028—Single-purpose machines or devices for particular grinding operations not covered by any other main group for grinding grooves, e.g. on shafts, in casings, in tubes, homokinetic joint elements for microgrooves or oil spots
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
- B24B7/20—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
- B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
- B24B7/228—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B3/00—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form
- B32B3/26—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form characterised by a particular shape of the outline of the cross-section of a continuous layer; characterised by a layer with cavities or internal voids ; characterised by an apertured layer
- B32B3/30—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form characterised by a particular shape of the outline of the cross-section of a continuous layer; characterised by a layer with cavities or internal voids ; characterised by an apertured layer characterised by a layer formed with recesses or projections, e.g. hollows, grooves, protuberances, ribs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01005—Boron [B]
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- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
- Y10T428/2457—Parallel ribs and/or grooves
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
- Y10T428/24612—Composite web or sheet
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Mechanical Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Dispersion Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Dicing (AREA)
- Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Grinding Of Cylindrical And Plane Surfaces (AREA)
Description
まず、図2に示す集合基板10を作製する。図2(a)は集合基板10の平面図である。図2(b)は、図2(a)の線B−Bに沿って見た側面図である。
次いで、図3の断面図に示すように、研削装置の台座2の上面2aに集合基板10を載置し、台座2の吸引穴3から真空引きすることにより、集合基板10を台座2に吸着固定する。
次いで、回転刃6を上方に退避させ、回転刃6に対して台座2を回転した後、回転刃6を下ろして台座2に近づけ、図5に示すように、第1の予備研削と同様に、第2の予備研削を行い、第1の溝17が形成されている被覆層16に、さらに第2の溝18を形成する。回転刃6の移動は、回転刃保持部7の昇降により行う。
次いで、回転刃6を上方に退避させ、回転刃6に対して台座2を回転した後、回転刃6を下ろして台座2に近づけ、図6に示すように、本研削を行い、被覆層16の第1の溝17及び第2の溝18に沿って削り残された部分16pを除去し、被覆層16に平坦な上面16cを形成する。
L ≦ W −(D1+D2) ・・・(1)
を満たすようにする。
次いで、集合基板10を、電子部品11の個片に分割する。
L ≦ W −(D1+D2) ・・・(2)
を満たすようにする。
6 回転刃
6c 回転中心軸
7 回転刃保持部
10 集合基板
11 電子部品
12 基板
14,15 部品
16 被覆層
17 第1の溝(凹部)
18 第2の溝(凹部)
19 溝(第1の溝)
Claims (7)
- 基板上に被覆層が形成された集合基板を分割して電子部品を製造する電子部品の製造方法において、
回転刃を用いて、前記回転刃の幅よりも大きいピッチで、前記回転刃を回転駆動させながら前記回転刃を前記集合基板の前記被覆層に食い込ませた状態で前記回転刃の回転中心軸に対して直角方向に前記集合基板に沿って前記回転刃を前記集合基板に対して相対移動させて前記被覆層を除去する研削加工を繰り返すことにより、前記被覆層に、第1の方向に延在する複数の第1の溝を前記第1の方向に対して直角方向に間隔を設けて形成する第1の予備研削工程と、
前記第1の予備研削工程の後に、前記回転刃を用いて、前記回転刃の幅と同じ又は該幅より小さいピッチで、前記第1の方向と異なる第2の方向に前記研削加工を繰り返すことにより、少なくとも前記被覆層の前記第1の溝の側面に沿う部分を除去して前記被覆層を薄くする本研削工程と、
を備えたことを特徴とする、電子部品の製造方法。 - 前記第1の予備工程の後かつ前記本研削工程の前に、又は前記第1の予備工程の前に、
前記回転刃を用いて、前記回転刃の幅よりも大きいピッチで、前記第1の方向及び前記第2の方向とは異なる第3の方向又は前記第2の方向に前記研削加工を繰り返すことにより、前記被覆層に、前記第3の方向又は前記第2の方向に延在する複数の第2の溝を前記第3の方向又は前記第2の方向に対して直角方向に間隔を設けて形成する第2の予備研削工程をさらに備えたことを特徴とする、請求項1に記載の電子部品の製造方法。 - 前記回転刃は、外周端部に面取り加工されており、
前記本研削工程において、前記回転刃を用いて、前記回転刃の面取り加工された前記外周端部以外の外周面の前記回転軸方向の長さと同じ又は該長さより小さいピッチで、前記第2の方向に前記研削加工を繰り返すことを特徴とする、請求項1又は2に記載の電子部品の製造方法。 - 前記研削加工の前記ピッチが、後の工程ほど小さくなることを特徴とする、請求項1乃至3に記載の電子部品の製造方法。
- 前記基板は、絶縁体と導体とを交互に積層して形成した積層体であることを特徴とする、請求項1乃至4のいずれか一つに記載の電子部品の製造方法。
- 請求項1乃至5の製造方法により作製された電子部品。
- 請求項1乃至5の製造方法に用いる研削装置であって、
前記回転刃を保持する回転刃保持部と、
前記回転刃保持部に対して回転可能である、前記集合基板を保持する台座と、
を備えた電子部品の研削装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011547463A JP5672242B2 (ja) | 2009-12-24 | 2010-12-09 | 電子部品の製造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009291903 | 2009-12-24 | ||
JP2009291903 | 2009-12-24 | ||
PCT/JP2010/072132 WO2011077962A1 (ja) | 2009-12-24 | 2010-12-09 | 電子部品の製造方法 |
JP2011547463A JP5672242B2 (ja) | 2009-12-24 | 2010-12-09 | 電子部品の製造方法 |
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Publication Number | Publication Date |
---|---|
JPWO2011077962A1 JPWO2011077962A1 (ja) | 2013-05-02 |
JP5672242B2 true JP5672242B2 (ja) | 2015-02-18 |
Family
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JP2011547463A Active JP5672242B2 (ja) | 2009-12-24 | 2010-12-09 | 電子部品の製造方法 |
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---|---|
US (1) | US9005736B2 (ja) |
JP (1) | JP5672242B2 (ja) |
CN (1) | CN102668042B (ja) |
WO (1) | WO2011077962A1 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9497862B2 (en) * | 2011-01-30 | 2016-11-15 | Nantong Fujitsu Microelectronics Co., Ltd. | Packaging structure |
JP6091879B2 (ja) * | 2012-12-18 | 2017-03-08 | 株式会社ディスコ | サファイアウェーハの加工方法 |
US9418907B2 (en) | 2013-01-22 | 2016-08-16 | Ps5 Luxco S.A.R.L. | Method for manufacturing semiconductor device |
JP2014165324A (ja) * | 2013-02-25 | 2014-09-08 | Disco Abrasive Syst Ltd | パッケージ基板の加工方法 |
JP6200765B2 (ja) * | 2013-10-24 | 2017-09-20 | 株式会社ディスコ | パッケージ基板の加工方法 |
CN103612203B (zh) * | 2013-11-11 | 2016-01-20 | 宁波欣龙机械科技有限公司 | 一种精磨导条的高效靠模夹具 |
JP7015668B2 (ja) * | 2017-10-11 | 2022-02-03 | 株式会社ディスコ | 板状物の分割装置 |
CN110634806A (zh) * | 2018-06-21 | 2019-12-31 | 美光科技公司 | 半导体装置组合件和其制造方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11186301A (ja) * | 1997-12-25 | 1999-07-09 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
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