JP2021072361A - 樹脂基板の加工方法 - Google Patents
樹脂基板の加工方法 Download PDFInfo
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- JP2021072361A JP2021072361A JP2019197881A JP2019197881A JP2021072361A JP 2021072361 A JP2021072361 A JP 2021072361A JP 2019197881 A JP2019197881 A JP 2019197881A JP 2019197881 A JP2019197881 A JP 2019197881A JP 2021072361 A JP2021072361 A JP 2021072361A
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- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000003825 pressing Methods 0.000 abstract description 10
- 238000010438 heat treatment Methods 0.000 abstract description 7
- 238000001816 cooling Methods 0.000 abstract description 2
- 238000004806 packaging method and process Methods 0.000 abstract description 2
- 239000002184 metal Substances 0.000 description 32
- 238000005520 cutting process Methods 0.000 description 23
- 238000003672 processing method Methods 0.000 description 23
- 238000003754 machining Methods 0.000 description 9
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
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Abstract
Description
本発明の実施形態1に係る樹脂基板の加工方法を図面に基づいて説明する。図1は、実施形態1に係る樹脂基板の加工方法の加工対象のパッケージ基板の側面図である。図2は、図1に示されたパッケージ基板の表面側の平面図である。図3は、図1に示されたパッケージ基板の裏面側の平面図である。図4は、実施形態1に係る樹脂基板の加工方法の流れを示すフローチャートである。
図5は、図4に示された樹脂基板の加工方法の反り形状形成ステップにおいて、複数の曲面形成用基板間にパッケージ基板を配置した状態を模式的に示す側面図である。図6は、図5に示された複数の曲面形成用基板の凸面にパッケージ基板の金属基板の表面を密着させた状態でパッケージ基板を加熱する状態を模式的に一部断面で示す側面図である。図7は、図4に示された樹脂基板の加工方法の反り形状形成ステップ後のパッケージ基板の側面図である。
図8は、図4に示された樹脂基板の加工方法の載置ステップを示す平面図である。図9は、図4に示された樹脂基板の加工方法の載置ステップを示す側面図である。載置ステップST2は、研削加工を行う加工装置である研削装置30のチャックテーブル31の保持面32に、パッケージ基板1の凹面28となった金属基板2の表面25を対面させて載置するステップである。
図10は、図4に示された樹脂基板の加工方法の吸引保持ステップにおいて、保持面上のパッケージ基板の上方に押圧部材を配置した側面図である。図11は、図4に示された樹脂基板の加工方法の吸引保持ステップにおいて、保持面上にパッケージ基板を吸引保持した側面図である。
図12は、図4に示された樹脂基板の加工方法の加工ステップを示す側面図である。加工ステップST4は、研削装置30が、チャックテーブル31で吸引保持したパッケージ基板1の裏面26側から所定の加工である研削加工を行うステップである。
2 金属基板(基板)
3 デバイスチップ
4 モールド樹脂
10 曲面形成用基板
11 凸面
25 表面(一方の面)
26 裏面(他方の面)
28 凹面
31,51 チャックテーブル
32,52 保持面
ST1 反り形状形成ステップ
ST2 載置ステップ
ST3 吸引保持ステップ
ST4 加工ステップ
Claims (2)
- 基板に搭載されたデバイスチップがモールド樹脂で被覆された樹脂基板の加工方法であって、
凸状の曲面を有する曲面形成用基板の凸面に樹脂基板の一方の面を密着させるよう押圧した状態で樹脂基板を加熱し、更に冷却して、樹脂基板の該一方の面側が凹面となる反りを樹脂基板に形成する反り形状形成ステップと、
チャックテーブルの保持面に、樹脂基板の凹面となった該一方の面を対面させて載置する載置ステップと、
樹脂基板の反って凸面になった他方の面の中央付近を該保持面に向かって押圧し、樹脂基板の反りを該保持面に沿って矯正しつつ、該チャックテーブルで樹脂基板を吸引保持する吸引保持ステップと、
該チャックテーブルで吸引保持した樹脂基板の該他方の面側から所定の加工を行う加工ステップと、を備える樹脂基板の加工方法。 - 該反り形状形成ステップでは、積み重ねられた複数の該曲面形成用基板の間に樹脂基板が挟まれた状態で加熱され冷却される請求項1に記載の樹脂基板の加工方法。
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JP2019197881A JP7313259B2 (ja) | 2019-10-30 | 2019-10-30 | 樹脂基板の加工方法 |
KR1020200125919A KR20210052226A (ko) | 2019-10-30 | 2020-09-28 | 수지 기판의 가공 방법 |
TW109137577A TW202118001A (zh) | 2019-10-30 | 2020-10-29 | 樹脂基板之加工方法 |
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JP2019197881A JP7313259B2 (ja) | 2019-10-30 | 2019-10-30 | 樹脂基板の加工方法 |
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JP2021072361A true JP2021072361A (ja) | 2021-05-06 |
JP7313259B2 JP7313259B2 (ja) | 2023-07-24 |
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KR (1) | KR20210052226A (ja) |
TW (1) | TW202118001A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023149950A1 (en) * | 2022-02-04 | 2023-08-10 | Tokyo Electron Limited | In-situ lithography pattern enhancement with localized stress treatment tuning using heat zones |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003158143A (ja) * | 2001-11-22 | 2003-05-30 | Sony Corp | 薄型半導体装置のモールド方法及びそのモールド金型 |
JP2012178422A (ja) * | 2011-02-25 | 2012-09-13 | Fujikura Ltd | 半導体装置の製造方法及び半導体装置の製造装置並びに基板保持治具 |
US20140235007A1 (en) * | 2013-02-15 | 2014-08-21 | Samsung Electronics Co., Ltd. | Method of manufacturing semiconductor light emitting device and chemical vapor deposition apparatus |
JP2015154061A (ja) * | 2014-02-19 | 2015-08-24 | 住友電気工業株式会社 | 半導体装置の製造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP5465042B2 (ja) | 2010-03-01 | 2014-04-09 | 株式会社ディスコ | パッケージ基板の加工方法 |
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2019
- 2019-10-30 JP JP2019197881A patent/JP7313259B2/ja active Active
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2020
- 2020-09-28 KR KR1020200125919A patent/KR20210052226A/ko active Search and Examination
- 2020-10-29 TW TW109137577A patent/TW202118001A/zh unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003158143A (ja) * | 2001-11-22 | 2003-05-30 | Sony Corp | 薄型半導体装置のモールド方法及びそのモールド金型 |
JP2012178422A (ja) * | 2011-02-25 | 2012-09-13 | Fujikura Ltd | 半導体装置の製造方法及び半導体装置の製造装置並びに基板保持治具 |
US20140235007A1 (en) * | 2013-02-15 | 2014-08-21 | Samsung Electronics Co., Ltd. | Method of manufacturing semiconductor light emitting device and chemical vapor deposition apparatus |
JP2015154061A (ja) * | 2014-02-19 | 2015-08-24 | 住友電気工業株式会社 | 半導体装置の製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023149950A1 (en) * | 2022-02-04 | 2023-08-10 | Tokyo Electron Limited | In-situ lithography pattern enhancement with localized stress treatment tuning using heat zones |
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Publication number | Publication date |
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KR20210052226A (ko) | 2021-05-10 |
JP7313259B2 (ja) | 2023-07-24 |
TW202118001A (zh) | 2021-05-01 |
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