TW200943539A - Non-volatile semiconductor storage device and method of manufacturing the same - Google Patents

Non-volatile semiconductor storage device and method of manufacturing the same

Info

Publication number
TW200943539A
TW200943539A TW097141653A TW97141653A TW200943539A TW 200943539 A TW200943539 A TW 200943539A TW 097141653 A TW097141653 A TW 097141653A TW 97141653 A TW97141653 A TW 97141653A TW 200943539 A TW200943539 A TW 200943539A
Authority
TW
Taiwan
Prior art keywords
storage device
semiconductor storage
volatile semiconductor
manufacturing
same
Prior art date
Application number
TW097141653A
Other languages
English (en)
Other versions
TWI389305B (zh
Inventor
Masaru Kito
Ryota Katsumata
Masaru Kidoh
Hiroyasu Tanaka
Yoshiaki Fukuzumi
Hideaki Aochi
Yasuyuki Matsuoka
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW200943539A publication Critical patent/TW200943539A/zh
Application granted granted Critical
Publication of TWI389305B publication Critical patent/TWI389305B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
TW097141653A 2007-10-29 2008-10-29 非揮發性半導體儲存元件及其製造方法 TWI389305B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007280091A JP5148242B2 (ja) 2007-10-29 2007-10-29 不揮発性半導体記憶装置、及びその製造方法

Publications (2)

Publication Number Publication Date
TW200943539A true TW200943539A (en) 2009-10-16
TWI389305B TWI389305B (zh) 2013-03-11

Family

ID=40581716

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097141653A TWI389305B (zh) 2007-10-29 2008-10-29 非揮發性半導體儲存元件及其製造方法

Country Status (4)

Country Link
US (2) US8148789B2 (zh)
JP (1) JP5148242B2 (zh)
KR (1) KR101012247B1 (zh)
TW (1) TWI389305B (zh)

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US8569829B2 (en) 2009-12-28 2013-10-29 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
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JP5779301B1 (ja) * 2014-03-04 2015-09-16 ユニサンティス エレクトロニクス シンガポール プライベート リミテッドＵｎｉｓａｎｔｉｓ Ｅｌｅｃｔｒｏｎｉｃｓ Ｓｉｎｇａｐｏｒｅ Ｐｔｅ Ｌｔｄ． 柱状半導体メモリ装置及びその製造方法
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US20180331117A1 (en) 2017-05-12 2018-11-15 Sandisk Technologies Llc Multilevel memory stack structure with tapered inter-tier joint region and methods of making thereof
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Also Published As

Publication number Publication date
US20090108333A1 (en) 2009-04-30
KR101012247B1 (ko) 2011-02-08
JP2009111049A (ja) 2009-05-21
US20120135595A1 (en) 2012-05-31
KR20090043463A (ko) 2009-05-06
US8426276B2 (en) 2013-04-23
US8148789B2 (en) 2012-04-03
JP5148242B2 (ja) 2013-02-20
TWI389305B (zh) 2013-03-11

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