TW200733571A - Analog-to-digital conversion circuit - Google Patents

Analog-to-digital conversion circuit

Info

Publication number
TW200733571A
TW200733571A TW095149379A TW95149379A TW200733571A TW 200733571 A TW200733571 A TW 200733571A TW 095149379 A TW095149379 A TW 095149379A TW 95149379 A TW95149379 A TW 95149379A TW 200733571 A TW200733571 A TW 200733571A
Authority
TW
Taiwan
Prior art keywords
analog
conversion circuit
digital conversion
power consumption
area
Prior art date
Application number
TW095149379A
Other languages
English (en)
Chinese (zh)
Other versions
TWI339023B (enExample
Inventor
Kiyoshi Makigawa
Koichi Ono
Takeshi Ohkawa
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of TW200733571A publication Critical patent/TW200733571A/zh
Application granted granted Critical
Publication of TWI339023B publication Critical patent/TWI339023B/zh

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/36Analogue value compared with reference values simultaneously only, i.e. parallel type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • H03M1/0643Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the spatial domain
    • H03M1/0646Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the spatial domain by analogue redistribution among corresponding nodes of adjacent cells, e.g. using an impedance network connected among all comparator outputs in a flash converter
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/36Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H03M1/362Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
    • H03M1/365Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider the voltage divider being a single resistor string

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
TW095149379A 2006-01-13 2006-12-28 Analog-to-digital conversion circuit TW200733571A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006006134A JP4702066B2 (ja) 2006-01-13 2006-01-13 アナログ/デジタル変換回路

Publications (2)

Publication Number Publication Date
TW200733571A true TW200733571A (en) 2007-09-01
TWI339023B TWI339023B (enExample) 2011-03-11

Family

ID=37806088

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095149379A TW200733571A (en) 2006-01-13 2006-12-28 Analog-to-digital conversion circuit

Country Status (7)

Country Link
US (1) US7405691B2 (enExample)
EP (1) EP1811671B1 (enExample)
JP (1) JP4702066B2 (enExample)
KR (1) KR20070076429A (enExample)
CN (1) CN101001084B (enExample)
DE (1) DE602007002205D1 (enExample)
TW (1) TW200733571A (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4788532B2 (ja) * 2006-09-04 2011-10-05 ソニー株式会社 フォールディング回路およびアナログ−デジタル変換器
KR100877695B1 (ko) 2007-03-23 2009-01-09 인하대학교 산학협력단 주파수 특성 향상을 위한 가변 특성의 평준화 저항 회로
JP4908314B2 (ja) * 2007-05-29 2012-04-04 ルネサスエレクトロニクス株式会社 A/d変換器
US7817073B2 (en) * 2007-06-15 2010-10-19 Micron Technology, Inc. Integrators for delta-sigma modulators
CN101640538A (zh) * 2008-08-01 2010-02-03 扬智科技股份有限公司 模拟数字转换器
JP2010124449A (ja) * 2008-10-21 2010-06-03 Renesas Electronics Corp アナログデジタル変換回路
KR101584785B1 (ko) * 2009-01-21 2016-01-13 삼성전자주식회사 아날로그-디지털 컨버터 및 이를 포함하는 전자 시스템
JP2010258577A (ja) * 2009-04-22 2010-11-11 Renesas Electronics Corp 補間型a/d変換器
JP5257219B2 (ja) * 2009-04-23 2013-08-07 ソニー株式会社 Ad変換器
US8183903B2 (en) * 2009-12-03 2012-05-22 Semtech Corporation Signal interpolation methods and circuits
KR101199574B1 (ko) * 2010-11-02 2012-11-12 한국과학기술원 아날로그 디지털 변환기
CN102035528B (zh) * 2010-11-30 2012-10-03 四川和芯微电子股份有限公司 高速动态比较锁存器
JP5757000B2 (ja) * 2011-10-21 2015-07-29 富士通株式会社 半導体集積回路、閾値設定方法、及び通信装置
CN102594268B (zh) * 2012-03-16 2015-06-17 中国科学院微电子研究所 折叠信号放大器
US8975949B2 (en) * 2013-03-14 2015-03-10 Samsung Electronics Co., Ltd. Integrated clock gater (ICG) using clock cascode complimentary switch logic
JP6506144B2 (ja) * 2015-09-09 2019-04-24 ラピスセミコンダクタ株式会社 半導体装置
CN105356880B (zh) * 2015-11-23 2018-07-06 南阳理工学院 一路模数采集通道采集双路传感器数据的电路
US9722623B1 (en) * 2016-12-19 2017-08-01 Stmicroelectronics International N.V. Analog-to-digital converter with dynamic element matching
CN109980926B (zh) * 2019-04-30 2024-05-14 苏州易美新思新能源科技有限公司 一种多通道串联电源
JP2021150806A (ja) * 2020-03-19 2021-09-27 キオクシア株式会社 半導体集積回路及び受信装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3522445A (en) * 1966-08-24 1970-08-04 Bunker Ramo Threshold and majority gate elements and logical arrangements thereof
US5029305A (en) * 1988-12-21 1991-07-02 Texas Instruments Incorporated Method and apparatus for error correction in thermometer code arrays
JP3229135B2 (ja) * 1994-09-14 2001-11-12 三菱電機株式会社 アナログ/デジタル変換装置
US6407692B1 (en) 1997-01-22 2002-06-18 Broadcom Corporation Analog to digital converter
JP3450649B2 (ja) 1997-06-04 2003-09-29 株式会社東芝 アナログ/デジタル変換装置
US6091353A (en) * 1998-07-15 2000-07-18 International Business Machines Corporation Bias circuit for flash analog to digital converter circuits
JP4144086B2 (ja) 1998-12-14 2008-09-03 ソニー株式会社 アナログ/ディジタル変換装置
CN1285174C (zh) * 2001-06-18 2006-11-15 三洋电机株式会社 模-数转换电路
US6822600B1 (en) * 2004-02-13 2004-11-23 National Semiconductor Corporation Amplifier array termination
WO2006000987A1 (en) 2004-06-24 2006-01-05 Koninklijke Philips Electronics N.V. Device for converting analog signals to digital signals with non-uniform accuracy

Also Published As

Publication number Publication date
CN101001084A (zh) 2007-07-18
EP1811671B1 (en) 2009-09-02
KR20070076429A (ko) 2007-07-24
EP1811671A1 (en) 2007-07-25
US20070188366A1 (en) 2007-08-16
DE602007002205D1 (de) 2009-10-15
JP2007189519A (ja) 2007-07-26
TWI339023B (enExample) 2011-03-11
JP4702066B2 (ja) 2011-06-15
CN101001084B (zh) 2010-06-23
US7405691B2 (en) 2008-07-29

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees