TW200733333A - Flip-chip mounting substrate and flip-chip mounting method - Google Patents

Flip-chip mounting substrate and flip-chip mounting method

Info

Publication number
TW200733333A
TW200733333A TW095148367A TW95148367A TW200733333A TW 200733333 A TW200733333 A TW 200733333A TW 095148367 A TW095148367 A TW 095148367A TW 95148367 A TW95148367 A TW 95148367A TW 200733333 A TW200733333 A TW 200733333A
Authority
TW
Taiwan
Prior art keywords
flip
chip mounting
central
solder resist
mounting substrate
Prior art date
Application number
TW095148367A
Other languages
English (en)
Chinese (zh)
Inventor
Yasushi Araki
Seiji Sato
Masatoshi Nakamura
Takashi Ozawa
Original Assignee
Shinko Electric Ind Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Ind Co filed Critical Shinko Electric Ind Co
Publication of TW200733333A publication Critical patent/TW200733333A/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H10W70/65—
    • H10W72/90—
    • H10W74/137—
    • H10W90/701—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/099—Coating over pads, e.g. solder resist partly over pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H10W72/012—
    • H10W72/01223—
    • H10W72/072—
    • H10W72/07236—
    • H10W72/20—
    • H10W72/241—
    • H10W72/251—
    • H10W72/252—
    • H10W72/287—
    • H10W72/29—
    • H10W74/012—
    • H10W74/15—
    • H10W90/724—

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
TW095148367A 2005-12-22 2006-12-22 Flip-chip mounting substrate and flip-chip mounting method TW200733333A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005369714 2005-12-22
JP2006332444A JP4971769B2 (ja) 2005-12-22 2006-12-08 フリップチップ実装構造及びフリップチップ実装構造の製造方法

Publications (1)

Publication Number Publication Date
TW200733333A true TW200733333A (en) 2007-09-01

Family

ID=38192649

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095148367A TW200733333A (en) 2005-12-22 2006-12-22 Flip-chip mounting substrate and flip-chip mounting method

Country Status (3)

Country Link
US (2) US7847417B2 (enExample)
JP (1) JP4971769B2 (enExample)
TW (1) TW200733333A (enExample)

Cited By (2)

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CN103972204A (zh) * 2013-02-06 2014-08-06 矽品精密工业股份有限公司 封装基板、半导体封装件及其制法
TWI699840B (zh) * 2017-10-23 2020-07-21 美商應用材料股份有限公司 形成扇出互連結構與互連結構的方法

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US8350384B2 (en) 2009-11-24 2013-01-08 Stats Chippac, Ltd. Semiconductor device and method of forming electrical interconnect with stress relief void
US7659633B2 (en) 2004-11-10 2010-02-09 Stats Chippac, Ltd. Solder joint flip chip interconnection having relief structure
US8076232B2 (en) * 2008-04-03 2011-12-13 Stats Chippac, Ltd. Semiconductor device and method of forming composite bump-on-lead interconnection
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US8129841B2 (en) 2006-12-14 2012-03-06 Stats Chippac, Ltd. Solder joint flip chip interconnection
USRE44500E1 (en) 2003-11-10 2013-09-17 Stats Chippac, Ltd. Semiconductor device and method of forming composite bump-on-lead interconnection
US8216930B2 (en) 2006-12-14 2012-07-10 Stats Chippac, Ltd. Solder joint flip chip interconnection having relief structure
US9029196B2 (en) 2003-11-10 2015-05-12 Stats Chippac, Ltd. Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
US8574959B2 (en) 2003-11-10 2013-11-05 Stats Chippac, Ltd. Semiconductor device and method of forming bump-on-lead interconnection
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US8409978B2 (en) 2010-06-24 2013-04-02 Stats Chippac, Ltd. Semiconductor device and method of forming vertically offset bond on trace interconnect structure on leadframe
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TWI474451B (zh) * 2011-09-15 2015-02-21 南茂科技股份有限公司 覆晶封裝結構及其形成方法
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JP2013093538A (ja) * 2011-10-04 2013-05-16 Ngk Spark Plug Co Ltd 配線基板及びその製造方法
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US10867950B2 (en) 2014-06-27 2020-12-15 Sony Corporation Semiconductor device with a gap control electrode and method of manufacturing the semiconductor device
US20160343646A1 (en) * 2015-05-21 2016-11-24 Qualcomm Incorporated High aspect ratio interconnect for wafer level package (wlp) and integrated circuit (ic) package
JP6626349B2 (ja) * 2016-01-20 2019-12-25 ローム株式会社 半導体集積回路装置およびその製造方法
JP6874910B2 (ja) * 2018-07-31 2021-05-19 株式会社村田製作所 樹脂基板、および樹脂基板の製造方法
US11626336B2 (en) * 2019-10-01 2023-04-11 Qualcomm Incorporated Package comprising a solder resist layer configured as a seating plane for a device
WO2021179185A1 (zh) * 2020-03-10 2021-09-16 华为技术有限公司 芯片堆叠结构、制作方法及电子设备
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103972204A (zh) * 2013-02-06 2014-08-06 矽品精密工业股份有限公司 封装基板、半导体封装件及其制法
TWI699840B (zh) * 2017-10-23 2020-07-21 美商應用材料股份有限公司 形成扇出互連結構與互連結構的方法
US11699651B2 (en) 2017-10-23 2023-07-11 Applied Materials, Inc. Fan-out interconnect integration processes and structures
US12074106B2 (en) 2017-10-23 2024-08-27 Applied Materials, Inc. Fan-out interconnect integration processes and structures

Also Published As

Publication number Publication date
US20070145553A1 (en) 2007-06-28
JP4971769B2 (ja) 2012-07-11
US8669665B2 (en) 2014-03-11
US20090250812A1 (en) 2009-10-08
US7847417B2 (en) 2010-12-07
JP2007194598A (ja) 2007-08-02

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