TW200719396A - Pattern verification method, program thereof, and manufacturing method of semiconductor device - Google Patents

Pattern verification method, program thereof, and manufacturing method of semiconductor device

Info

Publication number
TW200719396A
TW200719396A TW095131144A TW95131144A TW200719396A TW 200719396 A TW200719396 A TW 200719396A TW 095131144 A TW095131144 A TW 095131144A TW 95131144 A TW95131144 A TW 95131144A TW 200719396 A TW200719396 A TW 200719396A
Authority
TW
Taiwan
Prior art keywords
pattern
program
manufacturing
semiconductor device
pattern verification
Prior art date
Application number
TW095131144A
Other languages
English (en)
Inventor
Ryuji Ogawa
Koji Hashimoto
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW200719396A publication Critical patent/TW200719396A/zh

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
TW095131144A 2005-08-25 2006-08-24 Pattern verification method, program thereof, and manufacturing method of semiconductor device TW200719396A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005244448A JP4744980B2 (ja) 2005-08-25 2005-08-25 パターン検証方法、そのプログラム、半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW200719396A true TW200719396A (en) 2007-05-16

Family

ID=37805827

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095131144A TW200719396A (en) 2005-08-25 2006-08-24 Pattern verification method, program thereof, and manufacturing method of semiconductor device

Country Status (3)

Country Link
US (3) US20070050741A1 (zh)
JP (1) JP4744980B2 (zh)
TW (1) TW200719396A (zh)

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TWI448916B (zh) * 2009-07-30 2014-08-11 United Microelectronics Corp 修正佈局圖案的方法
TWI493369B (zh) * 2008-04-24 2015-07-21 Synopsys Inc 產生用來執行基於圖案剪輯之自動佈局驗證的基於圖案剪輯之熱點資料庫之方法及系統以及非暫時性電腦可讀取的儲存媒體

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JP2014229635A (ja) * 2013-05-17 2014-12-08 株式会社東芝 半導体検査方法および半導体検査装置
CN103309149B (zh) * 2013-06-08 2016-03-23 上海华力微电子有限公司 光学临近效应修正方法
JP6418786B2 (ja) * 2013-07-10 2018-11-07 キヤノン株式会社 パターンの作成方法、プログラムおよび情報処理装置
JP6399751B2 (ja) * 2013-12-25 2018-10-03 キヤノン株式会社 マスクパターン作成方法、プログラム、マスク製造方法、露光方法及び物品製造方法
US20170061046A1 (en) * 2015-09-01 2017-03-02 Kabushiki Kaisha Toshiba Simulation device of semiconductor device and simulation method of semiconductor device
US20170068757A1 (en) * 2015-09-08 2017-03-09 Kabushiki Kaisha Toshiba Simulation device for semiconductor device, and short-circuit determination method for semiconductor device
US9881121B2 (en) 2015-09-09 2018-01-30 Toshiba Memory Corporation Verification method of mask pattern, manufacturing method of a semiconductor device and nontransitory computer readable medium storing a mask pattern verification program
US9977325B2 (en) * 2015-10-20 2018-05-22 International Business Machines Corporation Modifying design layer of integrated circuit (IC)
US9983566B2 (en) * 2015-12-03 2018-05-29 The Boeing Company Part inspection system and method
JP6808684B2 (ja) * 2018-06-14 2021-01-06 キヤノン株式会社 情報処理装置、判定方法、プログラム、リソグラフィシステム、および物品の製造方法
JP7214440B2 (ja) * 2018-11-01 2023-01-30 三菱重工エンジニアリング株式会社 検証処理装置、検証処理方法及びプログラム
CN109491217B (zh) * 2018-12-29 2020-11-24 上海华力集成电路制造有限公司 基于图形参数空间调整光刻模型覆盖特殊结构的方法
TWI743807B (zh) * 2020-05-27 2021-10-21 力晶積成電子製造股份有限公司 用於光學鄰近修正的重定位方法
CN114114852B (zh) * 2021-11-30 2024-01-23 上海华力集成电路制造有限公司 Opc修正中通孔层断线热点评估方法

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TWI448916B (zh) * 2009-07-30 2014-08-11 United Microelectronics Corp 修正佈局圖案的方法

Also Published As

Publication number Publication date
JP2007057948A (ja) 2007-03-08
US7987435B2 (en) 2011-07-26
US20110294263A1 (en) 2011-12-01
JP4744980B2 (ja) 2011-08-10
US20100031224A1 (en) 2010-02-04
US8127265B2 (en) 2012-02-28
US20070050741A1 (en) 2007-03-01

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