TW200719396A - Pattern verification method, program thereof, and manufacturing method of semiconductor device - Google Patents
Pattern verification method, program thereof, and manufacturing method of semiconductor deviceInfo
- Publication number
- TW200719396A TW200719396A TW095131144A TW95131144A TW200719396A TW 200719396 A TW200719396 A TW 200719396A TW 095131144 A TW095131144 A TW 095131144A TW 95131144 A TW95131144 A TW 95131144A TW 200719396 A TW200719396 A TW 200719396A
- Authority
- TW
- Taiwan
- Prior art keywords
- pattern
- program
- manufacturing
- semiconductor device
- pattern verification
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005244448A JP4744980B2 (ja) | 2005-08-25 | 2005-08-25 | パターン検証方法、そのプログラム、半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200719396A true TW200719396A (en) | 2007-05-16 |
Family
ID=37805827
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095131144A TW200719396A (en) | 2005-08-25 | 2006-08-24 | Pattern verification method, program thereof, and manufacturing method of semiconductor device |
Country Status (3)
Country | Link |
---|---|
US (3) | US20070050741A1 (zh) |
JP (1) | JP4744980B2 (zh) |
TW (1) | TW200719396A (zh) |
Cited By (2)
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---|---|---|---|---|
TWI448916B (zh) * | 2009-07-30 | 2014-08-11 | United Microelectronics Corp | 修正佈局圖案的方法 |
TWI493369B (zh) * | 2008-04-24 | 2015-07-21 | Synopsys Inc | 產生用來執行基於圖案剪輯之自動佈局驗證的基於圖案剪輯之熱點資料庫之方法及系統以及非暫時性電腦可讀取的儲存媒體 |
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CN104882442B (zh) * | 2005-04-26 | 2018-09-11 | 瑞萨电子株式会社 | 半导体装置及其制造方法和半导体制造用掩模、光接近处理方法 |
US7565633B2 (en) * | 2007-01-03 | 2009-07-21 | International Business Machines Corporation | Verifying mask layout printability using simulation with adjustable accuracy |
JP2010521035A (ja) * | 2007-03-09 | 2010-06-17 | メンター グラフィックス コーポレイション | レイアウト設計データの増分分析 |
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JP5764364B2 (ja) | 2011-03-31 | 2015-08-19 | 株式会社ニューフレアテクノロジー | 半導体装置の製造方法、描画装置、プログラム及びパターン転写装置 |
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US8683394B2 (en) * | 2012-01-31 | 2014-03-25 | Mentor Graphics Corporation | Pattern matching optical proximity correction |
US8806391B2 (en) * | 2012-07-31 | 2014-08-12 | United Microelectronics Corp. | Method of optical proximity correction according to complexity of mask pattern |
US8977988B2 (en) | 2013-04-09 | 2015-03-10 | United Microelectronics Corp. | Method of optical proximity correction for modifying line patterns and integrated circuits with line patterns modified by the same |
JP2014229635A (ja) * | 2013-05-17 | 2014-12-08 | 株式会社東芝 | 半導体検査方法および半導体検査装置 |
CN103309149B (zh) * | 2013-06-08 | 2016-03-23 | 上海华力微电子有限公司 | 光学临近效应修正方法 |
JP6418786B2 (ja) * | 2013-07-10 | 2018-11-07 | キヤノン株式会社 | パターンの作成方法、プログラムおよび情報処理装置 |
JP6399751B2 (ja) * | 2013-12-25 | 2018-10-03 | キヤノン株式会社 | マスクパターン作成方法、プログラム、マスク製造方法、露光方法及び物品製造方法 |
US20170061046A1 (en) * | 2015-09-01 | 2017-03-02 | Kabushiki Kaisha Toshiba | Simulation device of semiconductor device and simulation method of semiconductor device |
US20170068757A1 (en) * | 2015-09-08 | 2017-03-09 | Kabushiki Kaisha Toshiba | Simulation device for semiconductor device, and short-circuit determination method for semiconductor device |
US9881121B2 (en) | 2015-09-09 | 2018-01-30 | Toshiba Memory Corporation | Verification method of mask pattern, manufacturing method of a semiconductor device and nontransitory computer readable medium storing a mask pattern verification program |
US9977325B2 (en) * | 2015-10-20 | 2018-05-22 | International Business Machines Corporation | Modifying design layer of integrated circuit (IC) |
US9983566B2 (en) * | 2015-12-03 | 2018-05-29 | The Boeing Company | Part inspection system and method |
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JP3583559B2 (ja) * | 1996-09-30 | 2004-11-04 | 株式会社ルネサステクノロジ | 光近接効果補正方法 |
JP3406506B2 (ja) * | 1997-03-24 | 2003-05-12 | シャープ株式会社 | フォトマスクのパターン補正方法およびフォトマスクのパターン補正装置 |
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JP2000162758A (ja) * | 1998-11-30 | 2000-06-16 | Matsushita Electric Ind Co Ltd | 光学的近接効果補正方法 |
JP4352498B2 (ja) * | 1999-03-26 | 2009-10-28 | ソニー株式会社 | パターン露光方法とこれに用いる処理装置 |
JP4163829B2 (ja) * | 1999-11-09 | 2008-10-08 | 松下電器産業株式会社 | マスクパターン補正方法及びそれを用いたフォトマスク |
JP3892205B2 (ja) * | 2000-04-14 | 2007-03-14 | 松下電器産業株式会社 | レイアウトコンパクション方法 |
JP2002311561A (ja) * | 2001-04-11 | 2002-10-23 | Sony Corp | パターン形成方法、パターン処理装置および露光マスク |
US20030014146A1 (en) * | 2001-07-12 | 2003-01-16 | Kabushiki Kaisha Toshiba | Dangerous process/pattern detection system and method, danger detection program, and semiconductor device manufacturing method |
JP2003092237A (ja) | 2001-07-12 | 2003-03-28 | Toshiba Corp | 危険プロセス/パターン検出システム、危険プロセス/パターン検出方法、危険検出プログラム、及び半導体装置の製造方法 |
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JP3871949B2 (ja) * | 2002-03-27 | 2007-01-24 | 株式会社東芝 | マスクデータ作成装置及びマスクデータ作成方法 |
JP2003322945A (ja) * | 2002-05-01 | 2003-11-14 | Mitsubishi Electric Corp | レイアウトパターンデータの補正装置 |
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JP4068531B2 (ja) * | 2003-08-20 | 2008-03-26 | 株式会社東芝 | Opcを用いたパターン寸法の補正方法及び検証方法、マスクの作成方法及び半導体装置の製造方法、並びに該補正方法を実行するシステム及びプログラム |
JP4068541B2 (ja) * | 2003-09-25 | 2008-03-26 | 株式会社東芝 | 集積回路パターン検証装置と検証方法 |
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US7313781B2 (en) * | 2004-05-28 | 2007-12-25 | Kabushiki Kaisha Toshiba | Image data correction method, lithography simulation method, image data correction system, program, mask and method of manufacturing a semiconductor device |
JP4266189B2 (ja) * | 2004-07-09 | 2009-05-20 | 株式会社東芝 | 半導体集積回路パターンの検証方法、フォトマスクの作成方法、半導体集積回路装置の製造方法、及び半導体集積回路パターンの検証方法を実現するためのプログラム |
US7530048B2 (en) * | 2005-04-09 | 2009-05-05 | Cadence Design Systems, Inc. | Defect filtering optical lithography verification process |
US7343582B2 (en) * | 2005-05-26 | 2008-03-11 | International Business Machines Corporation | Optical proximity correction using progressively smoothed mask shapes |
US7353472B2 (en) * | 2005-08-12 | 2008-04-01 | International Business Machines Corporation | System and method for testing pattern sensitive algorithms for semiconductor design |
-
2005
- 2005-08-25 JP JP2005244448A patent/JP4744980B2/ja not_active Expired - Fee Related
-
2006
- 2006-08-18 US US11/505,917 patent/US20070050741A1/en not_active Abandoned
- 2006-08-24 TW TW095131144A patent/TW200719396A/zh unknown
-
2009
- 2009-09-02 US US12/585,073 patent/US7987435B2/en not_active Expired - Fee Related
-
2011
- 2011-06-09 US US13/067,567 patent/US8127265B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI493369B (zh) * | 2008-04-24 | 2015-07-21 | Synopsys Inc | 產生用來執行基於圖案剪輯之自動佈局驗證的基於圖案剪輯之熱點資料庫之方法及系統以及非暫時性電腦可讀取的儲存媒體 |
TWI448916B (zh) * | 2009-07-30 | 2014-08-11 | United Microelectronics Corp | 修正佈局圖案的方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2007057948A (ja) | 2007-03-08 |
US7987435B2 (en) | 2011-07-26 |
US20110294263A1 (en) | 2011-12-01 |
JP4744980B2 (ja) | 2011-08-10 |
US20100031224A1 (en) | 2010-02-04 |
US8127265B2 (en) | 2012-02-28 |
US20070050741A1 (en) | 2007-03-01 |
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