SG162654A1 - Method for bonding two substrates - Google Patents
Method for bonding two substratesInfo
- Publication number
- SG162654A1 SG162654A1 SG200906052-6A SG2009060526A SG162654A1 SG 162654 A1 SG162654 A1 SG 162654A1 SG 2009060526 A SG2009060526 A SG 2009060526A SG 162654 A1 SG162654 A1 SG 162654A1
- Authority
- SG
- Singapore
- Prior art keywords
- bonding
- substrates
- steps
- processed
- applying
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title abstract 5
- 230000004913 activation Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Adhesives Or Adhesive Processes (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP08291226A EP2200077B1 (en) | 2008-12-22 | 2008-12-22 | Method for bonding two substrates |
Publications (1)
Publication Number | Publication Date |
---|---|
SG162654A1 true SG162654A1 (en) | 2010-07-29 |
Family
ID=40674178
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200906052-6A SG162654A1 (en) | 2008-12-22 | 2009-09-11 | Method for bonding two substrates |
Country Status (7)
Country | Link |
---|---|
US (2) | US20100155882A1 (ja) |
EP (1) | EP2200077B1 (ja) |
JP (1) | JP5453647B2 (ja) |
KR (1) | KR20100073974A (ja) |
CN (1) | CN101764052B (ja) |
SG (1) | SG162654A1 (ja) |
TW (1) | TWI402170B (ja) |
Families Citing this family (25)
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---|---|---|---|---|
FR2935536B1 (fr) | 2008-09-02 | 2010-09-24 | Soitec Silicon On Insulator | Procede de detourage progressif |
FR2938202B1 (fr) * | 2008-11-07 | 2010-12-31 | Soitec Silicon On Insulator | Traitement de surface pour adhesion moleculaire |
FR2961630B1 (fr) | 2010-06-22 | 2013-03-29 | Soitec Silicon On Insulator Technologies | Appareil de fabrication de dispositifs semi-conducteurs |
US8310021B2 (en) * | 2010-07-13 | 2012-11-13 | Honeywell International Inc. | Neutron detector with wafer-to-wafer bonding |
US8338266B2 (en) | 2010-08-11 | 2012-12-25 | Soitec | Method for molecular adhesion bonding at low pressure |
FR2963848B1 (fr) | 2010-08-11 | 2012-08-31 | Soitec Silicon On Insulator | Procede de collage par adhesion moleculaire a basse pression |
FR2964193A1 (fr) | 2010-08-24 | 2012-03-02 | Soitec Silicon On Insulator | Procede de mesure d'une energie d'adhesion, et substrats associes |
US8564085B2 (en) * | 2011-07-18 | 2013-10-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | CMOS image sensor structure |
US9540545B2 (en) * | 2011-09-02 | 2017-01-10 | Schlumberger Technology Corporation | Plasma treatment in fabricating directional drilling assemblies |
FR2980916B1 (fr) * | 2011-10-03 | 2014-03-28 | Soitec Silicon On Insulator | Procede de fabrication d'une structure de type silicium sur isolant |
SG186759A1 (en) * | 2012-01-23 | 2013-02-28 | Ev Group E Thallner Gmbh | Method and device for permanent bonding of wafers, as well as cutting tool |
JP5664592B2 (ja) * | 2012-04-26 | 2015-02-04 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
FR2990054B1 (fr) * | 2012-04-27 | 2014-05-02 | Commissariat Energie Atomique | Procede de collage dans une atmosphere de gaz presentant un coefficient de joule-thomson negatif. |
US8669135B2 (en) | 2012-08-10 | 2014-03-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | System and method for fabricating a 3D image sensor structure |
CN103117235A (zh) * | 2013-01-31 | 2013-05-22 | 上海新傲科技股份有限公司 | 等离子体辅助键合方法 |
CN103560105A (zh) * | 2013-11-22 | 2014-02-05 | 上海新傲科技股份有限公司 | 边缘光滑的半导体衬底的制备方法 |
DE102014100773A1 (de) * | 2014-01-23 | 2015-07-23 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements |
CN104916535B (zh) * | 2014-03-13 | 2018-02-06 | 中芯国际集成电路制造(上海)有限公司 | 一种激光诱导热生长氧化硅的方法 |
FR3029352B1 (fr) * | 2014-11-27 | 2017-01-06 | Soitec Silicon On Insulator | Procede d'assemblage de deux substrats |
TWI608573B (zh) * | 2016-10-27 | 2017-12-11 | Crystalwise Tech Inc | Composite substrate bonding method |
JP6334777B2 (ja) * | 2017-05-01 | 2018-05-30 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
CN107946185A (zh) * | 2017-11-22 | 2018-04-20 | 德淮半导体有限公司 | 晶圆键合方法 |
JP6583897B1 (ja) * | 2018-05-25 | 2019-10-02 | ▲らん▼海精研股▲ふん▼有限公司 | セラミック製静電チャックの製造方法 |
CN109545766B (zh) * | 2018-11-14 | 2020-08-21 | 长江存储科技有限责任公司 | 三维存储器及其制造方法 |
WO2024157663A1 (ja) * | 2023-01-27 | 2024-08-02 | 日本碍子株式会社 | 接合体の製造方法および接合方法 |
Family Cites Families (50)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5223001A (en) * | 1991-11-21 | 1993-06-29 | Tokyo Electron Kabushiki Kaisha | Vacuum processing apparatus |
KR0126455B1 (ko) * | 1992-05-18 | 1997-12-24 | 가나이 쯔또무 | 수지재료의 접착강도 측정방법 |
JPH0799295A (ja) * | 1993-06-07 | 1995-04-11 | Canon Inc | 半導体基体の作成方法及び半導体基体 |
US5696327A (en) * | 1994-11-23 | 1997-12-09 | Regents Of The University Of Minnesota | Method and apparatus for separating a thin film from a substrate |
US5668045A (en) * | 1994-11-30 | 1997-09-16 | Sibond, L.L.C. | Process for stripping outer edge of BESOI wafers |
US6113721A (en) * | 1995-01-03 | 2000-09-05 | Motorola, Inc. | Method of bonding a semiconductor wafer |
US5937312A (en) * | 1995-03-23 | 1999-08-10 | Sibond L.L.C. | Single-etch stop process for the manufacture of silicon-on-insulator wafers |
GB2343550A (en) * | 1997-07-29 | 2000-05-10 | Silicon Genesis Corp | Cluster tool method and apparatus using plasma immersion ion implantation |
WO1999010927A1 (en) * | 1997-08-29 | 1999-03-04 | Farrens Sharon N | In situ plasma wafer bonding method |
US6221774B1 (en) * | 1998-04-10 | 2001-04-24 | Silicon Genesis Corporation | Method for surface treatment of substrates |
US6117695A (en) * | 1998-05-08 | 2000-09-12 | Lsi Logic Corporation | Apparatus and method for testing a flip chip integrated circuit package adhesive layer |
US6008113A (en) * | 1998-05-19 | 1999-12-28 | Kavlico Corporation | Process for wafer bonding in a vacuum |
JP3635200B2 (ja) * | 1998-06-04 | 2005-04-06 | 信越半導体株式会社 | Soiウェーハの製造方法 |
FR2784800B1 (fr) * | 1998-10-20 | 2000-12-01 | Commissariat Energie Atomique | Procede de realisation de composants passifs et actifs sur un meme substrat isolant |
JP3321455B2 (ja) * | 1999-04-02 | 2002-09-03 | 株式会社アークテック | 電極引張試験方法、その装置及び電極引張試験用の基板/プローブ支持装置並びに電極プローブ接合装置 |
US20020187595A1 (en) * | 1999-08-04 | 2002-12-12 | Silicon Evolution, Inc. | Methods for silicon-on-insulator (SOI) manufacturing with improved control and site thickness variations and improved bonding interface quality |
US6616332B1 (en) * | 1999-11-18 | 2003-09-09 | Sensarray Corporation | Optical techniques for measuring parameters such as temperature across a surface |
JP4822577B2 (ja) * | 2000-08-18 | 2011-11-24 | 東レエンジニアリング株式会社 | 実装方法および装置 |
AU2001293125A1 (en) * | 2000-09-27 | 2002-04-08 | Strasbaugh, Inc. | Tool for applying resilient tape to chuck used for grinding or polishing wafers |
JP4093793B2 (ja) * | 2002-04-30 | 2008-06-04 | 信越半導体株式会社 | 半導体ウエーハの製造方法及びウエーハ |
FR2874455B1 (fr) * | 2004-08-19 | 2008-02-08 | Soitec Silicon On Insulator | Traitement thermique avant collage de deux plaquettes |
US6958255B2 (en) * | 2002-08-08 | 2005-10-25 | The Board Of Trustees Of The Leland Stanford Junior University | Micromachined ultrasonic transducers and method of fabrication |
JP4556158B2 (ja) * | 2002-10-22 | 2010-10-06 | 株式会社Sumco | 貼り合わせsoi基板の製造方法および半導体装置 |
US6790748B2 (en) * | 2002-12-19 | 2004-09-14 | Intel Corporation | Thinning techniques for wafer-to-wafer vertical stacks |
US7176528B2 (en) * | 2003-02-18 | 2007-02-13 | Corning Incorporated | Glass-based SOI structures |
US7399681B2 (en) * | 2003-02-18 | 2008-07-15 | Corning Incorporated | Glass-based SOI structures |
JP4066889B2 (ja) * | 2003-06-09 | 2008-03-26 | 株式会社Sumco | 貼り合わせ基板およびその製造方法 |
EP1662549B1 (en) * | 2003-09-01 | 2015-07-29 | SUMCO Corporation | Method for manufacturing bonded wafer |
FR2860842B1 (fr) * | 2003-10-14 | 2007-11-02 | Tracit Technologies | Procede de preparation et d'assemblage de substrats |
EP1679740A4 (en) * | 2003-10-27 | 2009-09-02 | Sumitomo Electric Industries | GALLIUM NITRIDE SEMICONDUCTOR SUBSTRATE AND PROCESS FOR PRODUCING THE SAME |
JP4744855B2 (ja) * | 2003-12-26 | 2011-08-10 | 日本碍子株式会社 | 静電チャック |
JP2005229005A (ja) * | 2004-02-16 | 2005-08-25 | Bondotekku:Kk | 真空中での超音波接合方法及び装置 |
CN100554905C (zh) * | 2004-03-05 | 2009-10-28 | 加利福尼亚大学董事会 | 用于超薄膜分离和纳米电子器件制造的玻璃改性应力波 |
TW200614372A (en) * | 2004-03-26 | 2006-05-01 | Sekisui Chemical Co Ltd | Method and apparatus for forming oxynitride film and nitride film, oxynitride film, nitride film and base material |
US7442992B2 (en) * | 2004-05-19 | 2008-10-28 | Sumco Corporation | Bonded SOI substrate, and method for manufacturing the same |
JP4918229B2 (ja) * | 2005-05-31 | 2012-04-18 | 信越半導体株式会社 | 貼り合わせウエーハの製造方法 |
JP5122731B2 (ja) * | 2005-06-01 | 2013-01-16 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
JP4107316B2 (ja) * | 2005-09-02 | 2008-06-25 | 株式会社日立プラントテクノロジー | 基板貼合装置 |
US7705342B2 (en) * | 2005-09-16 | 2010-04-27 | University Of Cincinnati | Porous semiconductor-based evaporator having porous and non-porous regions, the porous regions having through-holes |
KR100755368B1 (ko) * | 2006-01-10 | 2007-09-04 | 삼성전자주식회사 | 3차원 구조를 갖는 반도체 소자의 제조 방법들 및 그에의해 제조된 반도체 소자들 |
JP4721435B2 (ja) * | 2006-04-06 | 2011-07-13 | 本田技研工業株式会社 | 接着部の剥離検査方法 |
US20080044984A1 (en) * | 2006-08-16 | 2008-02-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Methods of avoiding wafer breakage during manufacture of backside illuminated image sensors |
US7473909B2 (en) * | 2006-12-04 | 2009-01-06 | Axcelis Technologies, Inc. | Use of ion induced luminescence (IIL) as feedback control for ion implantation |
FR2912839B1 (fr) * | 2007-02-16 | 2009-05-15 | Soitec Silicon On Insulator | Amelioration de la qualite de l'interface de collage par nettoyage froid et collage a chaud |
JP5143477B2 (ja) * | 2007-05-31 | 2013-02-13 | 信越化学工業株式会社 | Soiウエーハの製造方法 |
FR2935537B1 (fr) * | 2008-08-28 | 2010-10-22 | Soitec Silicon On Insulator | Procede d'initiation d'adhesion moleculaire |
FR2935536B1 (fr) * | 2008-09-02 | 2010-09-24 | Soitec Silicon On Insulator | Procede de detourage progressif |
WO2010057068A2 (en) * | 2008-11-16 | 2010-05-20 | Suss Microtec, Inc. | Method and apparatus for wafer bonding with enhanced wafer mating |
US8338266B2 (en) * | 2010-08-11 | 2012-12-25 | Soitec | Method for molecular adhesion bonding at low pressure |
FR2964193A1 (fr) * | 2010-08-24 | 2012-03-02 | Soitec Silicon On Insulator | Procede de mesure d'une energie d'adhesion, et substrats associes |
-
2008
- 2008-12-22 EP EP08291226A patent/EP2200077B1/en active Active
-
2009
- 2009-09-09 US US12/556,381 patent/US20100155882A1/en not_active Abandoned
- 2009-09-11 TW TW098130779A patent/TWI402170B/zh active
- 2009-09-11 SG SG200906052-6A patent/SG162654A1/en unknown
- 2009-09-18 JP JP2009217024A patent/JP5453647B2/ja active Active
- 2009-10-09 CN CN2009102057446A patent/CN101764052B/zh active Active
- 2009-10-12 KR KR1020090096805A patent/KR20100073974A/ko active Search and Examination
-
2012
- 2012-08-29 US US13/598,469 patent/US20120322229A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
JP5453647B2 (ja) | 2014-03-26 |
TWI402170B (zh) | 2013-07-21 |
EP2200077B1 (en) | 2012-12-05 |
JP2010149180A (ja) | 2010-07-08 |
EP2200077A1 (en) | 2010-06-23 |
KR20100073974A (ko) | 2010-07-01 |
CN101764052B (zh) | 2013-01-23 |
CN101764052A (zh) | 2010-06-30 |
TW201024090A (en) | 2010-07-01 |
US20120322229A1 (en) | 2012-12-20 |
US20100155882A1 (en) | 2010-06-24 |
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