FR2963848B1 - Procede de collage par adhesion moleculaire a basse pression - Google Patents

Procede de collage par adhesion moleculaire a basse pression

Info

Publication number
FR2963848B1
FR2963848B1 FR1056566A FR1056566A FR2963848B1 FR 2963848 B1 FR2963848 B1 FR 2963848B1 FR 1056566 A FR1056566 A FR 1056566A FR 1056566 A FR1056566 A FR 1056566A FR 2963848 B1 FR2963848 B1 FR 2963848B1
Authority
FR
France
Prior art keywords
low pressure
molecular adhesion
pressure molecular
collage
collage process
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1056566A
Other languages
English (en)
Other versions
FR2963848A1 (fr
Inventor
Marcel Broekaart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1056566A priority Critical patent/FR2963848B1/fr
Priority to TW103113917A priority patent/TW201428859A/zh
Priority to TW100122921A priority patent/TWI527131B/zh
Priority to JP2011146293A priority patent/JP5419929B2/ja
Priority to SG2011048584A priority patent/SG178659A1/en
Priority to EP11173513.0A priority patent/EP2418678B1/fr
Priority to US13/192,312 priority patent/US8338266B2/en
Priority to KR1020110076876A priority patent/KR101238679B1/ko
Priority to CN201110229518.9A priority patent/CN102376623B/zh
Priority to FR1250663A priority patent/FR2969378A1/fr
Publication of FR2963848A1 publication Critical patent/FR2963848A1/fr
Application granted granted Critical
Publication of FR2963848B1 publication Critical patent/FR2963848B1/fr
Priority to US13/718,624 priority patent/US20130105932A1/en
Priority to US14/067,453 priority patent/US8871611B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Micromachines (AREA)
  • Pressure Sensors (AREA)
  • Lining Or Joining Of Plastics Or The Like (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
FR1056566A 2010-08-11 2010-08-11 Procede de collage par adhesion moleculaire a basse pression Expired - Fee Related FR2963848B1 (fr)

Priority Applications (12)

Application Number Priority Date Filing Date Title
FR1056566A FR2963848B1 (fr) 2010-08-11 2010-08-11 Procede de collage par adhesion moleculaire a basse pression
TW103113917A TW201428859A (zh) 2010-08-11 2011-06-29 以低壓力進行分子黏附鍵結所製之三度空間複合構造
TW100122921A TWI527131B (zh) 2010-08-11 2011-06-29 以低壓力進行分子黏附鍵結之方法
JP2011146293A JP5419929B2 (ja) 2010-08-11 2011-06-30 低圧での分子接着接合方法
SG2011048584A SG178659A1 (en) 2010-08-11 2011-07-01 Method for molecular adhesion bonding at low pressure
EP11173513.0A EP2418678B1 (fr) 2010-08-11 2011-07-12 Procédé pour la liaison par adhésion moléculaire à basse pression
US13/192,312 US8338266B2 (en) 2010-08-11 2011-07-27 Method for molecular adhesion bonding at low pressure
KR1020110076876A KR101238679B1 (ko) 2010-08-11 2011-08-02 저압에서의 분자 접착 접합 방법
CN201110229518.9A CN102376623B (zh) 2010-08-11 2011-08-09 低压下的分子粘附键合方法
FR1250663A FR2969378A1 (fr) 2010-08-11 2012-01-24 Structure composite tridimensionnelle comportant plusieurs couches de microcomposants en alignement
US13/718,624 US20130105932A1 (en) 2010-08-11 2012-12-18 Method for molecular adhesion bonding at low pressure
US14/067,453 US8871611B2 (en) 2010-08-11 2013-10-30 Method for molecular adhesion bonding at low pressure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1056566A FR2963848B1 (fr) 2010-08-11 2010-08-11 Procede de collage par adhesion moleculaire a basse pression

Publications (2)

Publication Number Publication Date
FR2963848A1 FR2963848A1 (fr) 2012-02-17
FR2963848B1 true FR2963848B1 (fr) 2012-08-31

Family

ID=43617963

Family Applications (2)

Application Number Title Priority Date Filing Date
FR1056566A Expired - Fee Related FR2963848B1 (fr) 2010-08-11 2010-08-11 Procede de collage par adhesion moleculaire a basse pression
FR1250663A Pending FR2969378A1 (fr) 2010-08-11 2012-01-24 Structure composite tridimensionnelle comportant plusieurs couches de microcomposants en alignement

Family Applications After (1)

Application Number Title Priority Date Filing Date
FR1250663A Pending FR2969378A1 (fr) 2010-08-11 2012-01-24 Structure composite tridimensionnelle comportant plusieurs couches de microcomposants en alignement

Country Status (7)

Country Link
EP (1) EP2418678B1 (fr)
JP (1) JP5419929B2 (fr)
KR (1) KR101238679B1 (fr)
CN (1) CN102376623B (fr)
FR (2) FR2963848B1 (fr)
SG (1) SG178659A1 (fr)
TW (2) TW201428859A (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2978297A1 (fr) * 2011-07-23 2013-01-25 Soitec Silicon On Insulator Reduction d'interferences mecaniques dans un systeme de collage de substrats a basse pression
FR2992772B1 (fr) * 2012-06-28 2014-07-04 Soitec Silicon On Insulator Procede de realisation de structure composite avec collage de type metal/metal
FR2997224B1 (fr) * 2012-10-18 2015-12-04 Soitec Silicon On Insulator Procede de collage par adhesion moleculaire
DE112014007212A5 (de) * 2014-12-23 2017-08-24 Ev Group E. Thallner Gmbh Verfahren und Vorrichtung zur Vorfixierung von Substraten
EP3417477B1 (fr) 2016-02-16 2020-01-29 EV Group E. Thallner GmbH Procédé de collage de substrats
FR3079532B1 (fr) * 2018-03-28 2022-03-25 Soitec Silicon On Insulator Procede de fabrication d'une couche monocristalline de materiau ain et substrat pour croissance par epitaxie d'une couche monocristalline de materiau ain
CN110767589B (zh) * 2019-10-31 2021-11-19 长春长光圆辰微电子技术有限公司 一种soi硅片对准键合的方法
CN112635362B (zh) * 2020-12-17 2023-12-22 武汉新芯集成电路制造有限公司 晶圆键合方法及晶圆键合系统

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3720515B2 (ja) * 1997-03-13 2005-11-30 キヤノン株式会社 基板処理装置及びその方法並びに基板の製造方法
EP0886306A1 (fr) * 1997-06-16 1998-12-23 IMEC vzw Procédé d'adhésion de substrates à basse température
EP1052687B1 (fr) * 1998-02-02 2016-06-29 Nippon Steel & Sumitomo Metal Corporation Procede de fabrication d'un substrat soi.
US6008113A (en) * 1998-05-19 1999-12-28 Kavlico Corporation Process for wafer bonding in a vacuum
JP2000199883A (ja) * 1998-10-29 2000-07-18 Fujitsu Ltd 反射型プロジェクタ装置
US6958255B2 (en) * 2002-08-08 2005-10-25 The Board Of Trustees Of The Leland Stanford Junior University Micromachined ultrasonic transducers and method of fabrication
WO2006038030A2 (fr) * 2004-10-09 2006-04-13 Applied Microengineering Limited Dispositif pour l'assemblage de plaquettes
JP2009094164A (ja) * 2007-10-04 2009-04-30 Toshiba Corp インバータ装置における電力用半導体素子
JP5354900B2 (ja) * 2007-12-28 2013-11-27 株式会社半導体エネルギー研究所 半導体基板の作製方法
FR2931014B1 (fr) * 2008-05-06 2010-09-03 Soitec Silicon On Insulator Procede d'assemblage de plaques par adhesion moleculaire
JP2010021326A (ja) * 2008-07-10 2010-01-28 Sumco Corp 貼り合わせウェーハの製造方法
FR2935537B1 (fr) * 2008-08-28 2010-10-22 Soitec Silicon On Insulator Procede d'initiation d'adhesion moleculaire
EP2200077B1 (fr) * 2008-12-22 2012-12-05 Soitec Procédé pour la liaison de deux substrats
JP5668275B2 (ja) * 2009-04-08 2015-02-12 株式会社Sumco Ｓｏｉウェーハの製造方法及び貼り合わせ装置

Also Published As

Publication number Publication date
TW201214583A (en) 2012-04-01
FR2969378A1 (fr) 2012-06-22
FR2963848A1 (fr) 2012-02-17
KR101238679B1 (ko) 2013-03-04
SG178659A1 (en) 2012-03-29
EP2418678A3 (fr) 2012-02-29
KR20120015266A (ko) 2012-02-21
JP2012039095A (ja) 2012-02-23
CN102376623B (zh) 2014-07-02
JP5419929B2 (ja) 2014-02-19
EP2418678A2 (fr) 2012-02-15
TWI527131B (zh) 2016-03-21
TW201428859A (zh) 2014-07-16
CN102376623A (zh) 2012-03-14
EP2418678B1 (fr) 2014-10-15

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Legal Events

Date Code Title Description
CD Change of name or company name

Owner name: SOITEC, FR

Effective date: 20120907

PLFP Fee payment

Year of fee payment: 6

ST Notification of lapse

Effective date: 20170428