SG129385A1 - Packaging for high speed integrated circuits - Google Patents

Packaging for high speed integrated circuits

Info

Publication number
SG129385A1
SG129385A1 SG200604689A SG200604689A SG129385A1 SG 129385 A1 SG129385 A1 SG 129385A1 SG 200604689 A SG200604689 A SG 200604689A SG 200604689 A SG200604689 A SG 200604689A SG 129385 A1 SG129385 A1 SG 129385A1
Authority
SG
Singapore
Prior art keywords
lead
pad
adjacent
packaging
high speed
Prior art date
Application number
SG200604689A
Other languages
English (en)
Inventor
Sehat Sutardja
Original Assignee
Marvell World Trade Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/248,985 external-priority patent/US20070018292A1/en
Application filed by Marvell World Trade Ltd filed Critical Marvell World Trade Ltd
Publication of SG129385A1 publication Critical patent/SG129385A1/en

Links

Classifications

    • H—ELECTRICITY
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H01L23/4952—Additional leads the additional leads being a bump or a wire
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
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Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
SG200604689A 2005-07-22 2006-07-13 Packaging for high speed integrated circuits SG129385A1 (en)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US70170105P 2005-07-22 2005-07-22
US72227205P 2005-09-30 2005-09-30
US11/248,985 US20070018292A1 (en) 2005-07-22 2005-10-12 Packaging for high speed integrated circuits
US11/472,904 US7884451B2 (en) 2005-07-22 2006-06-22 Packaging for high speed integrated circuits
US11/472,697 US20070096277A1 (en) 2005-07-22 2006-06-22 Packaging for high speed integrated circuits
US11/472,953 US20070018289A1 (en) 2005-07-22 2006-06-22 Packaging for high speed integrated circuits
US11/473,702 US7638870B2 (en) 2005-07-22 2006-06-23 Packaging for high speed integrated circuits
US11/474,198 US20070018294A1 (en) 2005-07-22 2006-06-23 Packaging for high speed integrated circuits
US11/473,631 US20070018293A1 (en) 2005-07-22 2006-06-23 Packaging for high speed integrated circuits

Publications (1)

Publication Number Publication Date
SG129385A1 true SG129385A1 (en) 2007-02-26

Family

ID=37398828

Family Applications (2)

Application Number Title Priority Date Filing Date
SG200604688A SG129384A1 (en) 2005-07-22 2006-07-13 Packaging for high speed integrated circuits
SG200604689A SG129385A1 (en) 2005-07-22 2006-07-13 Packaging for high speed integrated circuits

Family Applications Before (1)

Application Number Title Priority Date Filing Date
SG200604688A SG129384A1 (en) 2005-07-22 2006-07-13 Packaging for high speed integrated circuits

Country Status (3)

Country Link
EP (3) EP1746648A3 (ja)
JP (3) JP5110814B2 (ja)
SG (2) SG129384A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8446735B2 (en) 2008-12-26 2013-05-21 International Business Machines Corporation Semiconductor package

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008218776A (ja) * 2007-03-06 2008-09-18 Renesas Technology Corp 半導体装置
US9200973B2 (en) * 2012-06-28 2015-12-01 Intel Corporation Semiconductor package with air pressure sensor
JP6190295B2 (ja) 2014-03-12 2017-08-30 株式会社東芝 半導体チップ、および半導体パッケージ
CN115085706A (zh) * 2021-03-11 2022-09-20 台达电子企业管理（上海）有限公司 开关模块

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3110339A (en) 1962-01-02 1963-11-12 Lawrence K Fickel Ventilated pneumatic tire structure and method of fabricating the tire
US3627901A (en) * 1969-12-19 1971-12-14 Texas Instruments Inc Composite electronic device package-connector unit
JPS5754354A (ja) * 1980-09-18 1982-03-31 Matsushita Electronics Corp Handotaishusekikairosochi
JPS6018944A (ja) 1983-07-12 1985-01-31 Nec Ic Microcomput Syst Ltd 半導体集積回路装置のリ−ドフレ−ム
JPS61127635U (ja) * 1985-01-26 1986-08-11
JPS62140446A (ja) * 1985-12-16 1987-06-24 Toshiba Corp 樹脂封止型半導体装置
JPS63102233U (ja) * 1986-12-22 1988-07-02
JPH03261152A (ja) * 1990-03-10 1991-11-21 Nec Corp 半導体集積回路装置
JP2654291B2 (ja) * 1991-12-18 1997-09-17 川崎製鉄株式会社 半導体装置用パッケージのリード配線
JPH05235245A (ja) * 1992-02-26 1993-09-10 Hitachi Ltd 半導体集積回路装置
JPH05243472A (ja) * 1992-02-27 1993-09-21 Nec Ic Microcomput Syst Ltd 半導体集積回路
JP2985479B2 (ja) * 1992-03-04 1999-11-29 株式会社日立製作所 半導体メモリおよび半導体メモリモジュール
US5214845A (en) * 1992-05-11 1993-06-01 Micron Technology, Inc. Method for producing high speed integrated circuits
JPH0645504A (ja) * 1992-07-21 1994-02-18 Miyazaki Oki Electric Co Ltd 半導体装置
JPH06204390A (ja) * 1993-01-07 1994-07-22 Fujitsu Ltd 半導体装置
JPH06342858A (ja) * 1993-06-02 1994-12-13 Sumitomo Electric Ind Ltd ハイブリッド集積回路
JPH0745781A (ja) * 1993-07-28 1995-02-14 Dainippon Printing Co Ltd 半導体装置及びそれに用いる多層リードフレーム
JPH0786446A (ja) * 1993-09-14 1995-03-31 Toshiba Corp Ｉｃパッケージ
JPH08274215A (ja) * 1995-03-31 1996-10-18 Matsushita Electric Works Ltd 半導体パッケージ
US5646368A (en) * 1995-11-30 1997-07-08 International Business Machines Corporation Printed circuit board with an integrated twisted pair conductor
JP3301577B2 (ja) * 1996-02-22 2002-07-15 日本特殊陶業株式会社 電子部品用パッケージ
JPH1074791A (ja) * 1996-08-30 1998-03-17 Sumitomo Metal Ind Ltd 半導体装置
JP2859223B2 (ja) * 1996-10-29 1999-02-17 日本電気アイシーマイコンシステム株式会社 半導体装置
JPH10247717A (ja) * 1997-03-04 1998-09-14 Matsushita Electron Corp 半導体装置
JP3480291B2 (ja) * 1998-01-08 2003-12-15 日立電線株式会社 半導体装置及び電子装置
JPH11289042A (ja) * 1998-01-23 1999-10-19 Toshiba Electronic Engineering Corp Ｉｃパッケ―ジ及びこれを使用した回路装置
US6509632B1 (en) * 1998-01-30 2003-01-21 Micron Technology, Inc. Method of fabricating a redundant pinout configuration for signal enhancement in an IC package
JP2001094032A (ja) * 1999-09-21 2001-04-06 Matsushita Electronics Industry Corp 半導体装置
US6538336B1 (en) * 2000-11-14 2003-03-25 Rambus Inc. Wirebond assembly for high-speed integrated circuits
JP2002299645A (ja) * 2001-03-29 2002-10-11 Furukawa Electric Co Ltd:The 光モジュール用リードフレームおよび光モジュール
US6894398B2 (en) * 2001-03-30 2005-05-17 Intel Corporation Insulated bond wire assembly for integrated circuits
JP2003068780A (ja) * 2001-08-30 2003-03-07 Matsushita Electric Ind Co Ltd 半導体装置
US6652318B1 (en) * 2002-05-24 2003-11-25 Fci Americas Technology, Inc. Cross-talk canceling technique for high speed electrical connectors
US6910092B2 (en) * 2001-12-10 2005-06-21 International Business Machines Corporation Chip to chip interface for interconnecting chips
JP2004063688A (ja) * 2002-07-26 2004-02-26 Mitsubishi Electric Corp 半導体装置及び半導体アセンブリモジュール
CN1723557A (zh) * 2002-12-10 2006-01-18 皇家飞利浦电子股份有限公司 高密度封装的互连电源和地线条及其方法
JP2004221962A (ja) * 2003-01-15 2004-08-05 Seiko Epson Corp Ｐｌｌ回路
US6828514B2 (en) * 2003-01-30 2004-12-07 Endicott Interconnect Technologies, Inc. High speed circuit board and method for fabrication
JP4137059B2 (ja) * 2003-02-14 2008-08-20 株式会社ルネサステクノロジ 電子装置および半導体装置
US6812580B1 (en) * 2003-06-09 2004-11-02 Freescale Semiconductor, Inc. Semiconductor package having optimized wire bond positioning
TWI224386B (en) * 2003-07-22 2004-11-21 Via Tech Inc Multi-row wire bonding structure for high frequency integrated circuit
US6992377B2 (en) * 2004-02-26 2006-01-31 Freescale Semiconductor, Inc. Semiconductor package with crossing conductor assembly and method of manufacture
JP3913228B2 (ja) * 2004-04-12 2007-05-09 松下電器産業株式会社 樹脂封止型半導体装置及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8446735B2 (en) 2008-12-26 2013-05-21 International Business Machines Corporation Semiconductor package

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EP1746648A3 (en) 2008-09-03
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JP5149493B2 (ja) 2013-02-20
JP2007059884A (ja) 2007-03-08
SG129384A1 (en) 2007-02-26
EP1746649A3 (en) 2008-09-10
EP1746648A2 (en) 2007-01-24
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JP4764277B2 (ja) 2011-08-31
EP1746650A3 (en) 2008-09-10

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