SG11201807496XA - Offset compensation for ferroelectric memory cell sensing - Google Patents
Offset compensation for ferroelectric memory cell sensingInfo
- Publication number
- SG11201807496XA SG11201807496XA SG11201807496XA SG11201807496XA SG11201807496XA SG 11201807496X A SG11201807496X A SG 11201807496XA SG 11201807496X A SG11201807496X A SG 11201807496XA SG 11201807496X A SG11201807496X A SG 11201807496XA SG 11201807496X A SG11201807496X A SG 11201807496XA
- Authority
- SG
- Singapore
- Prior art keywords
- international
- memory cell
- ferroelectric memory
- offset
- pct
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/221—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using ferroelectric capacitors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2273—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2275—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/067,838 US9552864B1 (en) | 2016-03-11 | 2016-03-11 | Offset compensation for ferroelectric memory cell sensing |
| PCT/US2017/021884 WO2017156444A1 (en) | 2016-03-11 | 2017-03-10 | Offset compensation for ferroelectric memory cell sensing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG11201807496XA true SG11201807496XA (en) | 2018-09-27 |
Family
ID=57794978
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG11201807496XA SG11201807496XA (en) | 2016-03-11 | 2017-03-10 | Offset compensation for ferroelectric memory cell sensing |
Country Status (8)
| Country | Link |
|---|---|
| US (4) | US9552864B1 (zh) |
| EP (1) | EP3427266B1 (zh) |
| JP (1) | JP6844823B2 (zh) |
| KR (1) | KR102188584B1 (zh) |
| CN (1) | CN108885891B (zh) |
| SG (1) | SG11201807496XA (zh) |
| TW (2) | TWI668690B (zh) |
| WO (1) | WO2017156444A1 (zh) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10192606B2 (en) * | 2016-04-05 | 2019-01-29 | Micron Technology, Inc. | Charge extraction from ferroelectric memory cell using sense capacitors |
| US9715919B1 (en) * | 2016-06-21 | 2017-07-25 | Micron Technology, Inc. | Array data bit inversion |
| US10290341B2 (en) | 2017-02-24 | 2019-05-14 | Micron Technology, Inc. | Self-reference for ferroelectric memory |
| US10504909B2 (en) * | 2017-05-10 | 2019-12-10 | Micron Technology, Inc. | Plate node configurations and operations for a memory array |
| US10304514B2 (en) | 2017-07-05 | 2019-05-28 | Micron Technology, Inc. | Self-reference sensing for memory cells |
| US10475498B2 (en) * | 2017-07-18 | 2019-11-12 | Micron Technology, Inc. | Self-boost, source following, and sample-and-hold for accessing memory cells |
| US10163481B1 (en) * | 2017-07-20 | 2018-12-25 | Micron Technology, Inc. | Offset cancellation for latching in a memory device |
| US10529410B2 (en) | 2017-12-18 | 2020-01-07 | Micron Technology, Inc. | Techniques for accessing an array of memory cells to reduce parasitic coupling |
| US10403347B2 (en) * | 2018-01-29 | 2019-09-03 | Micron Technology, Inc. | Apparatuses and methods for accessing ferroelectric memory including providing reference voltage level |
| US10667621B2 (en) * | 2018-04-19 | 2020-06-02 | Micron Technology, Inc. | Multi-stage memory sensing |
| US11127449B2 (en) | 2018-04-25 | 2021-09-21 | Micron Technology, Inc. | Sensing a memory cell |
| US10607676B2 (en) * | 2018-04-25 | 2020-03-31 | Micron Technology, Inc. | Sensing a memory cell |
| US10446214B1 (en) * | 2018-08-13 | 2019-10-15 | Micron Technology, Inc. | Sense amplifier with split capacitors |
| US11360704B2 (en) | 2018-12-21 | 2022-06-14 | Micron Technology, Inc. | Multiplexed signal development in a memory device |
| US10923180B2 (en) * | 2018-12-26 | 2021-02-16 | Micron Technology, Inc. | Sensing techniques using a charge transfer device |
| US10699783B1 (en) * | 2018-12-26 | 2020-06-30 | Micron Technology | Sensing techniques using a moving reference |
| US10818343B2 (en) * | 2018-12-26 | 2020-10-27 | Micron Technology, Inc. | Techniques for charging a sense component |
| CN109541380B (zh) * | 2019-01-18 | 2020-04-24 | 云南电网有限责任公司电力科学研究院 | 一种可控电压源接地电流全补偿扰动选线方法及装置 |
| CN109541379B (zh) * | 2019-01-18 | 2020-09-01 | 云南电网有限责任公司电力科学研究院 | 可控电压源接地电流全补偿的选线方法及装置 |
| US10726917B1 (en) * | 2019-01-23 | 2020-07-28 | Micron Technology, Inc. | Techniques for read operations |
| CN109813997B (zh) * | 2019-04-02 | 2021-02-02 | 云南电网有限责任公司电力科学研究院 | 一种可控电流源接地电流全补偿输出电流计算方法及系统 |
| US10692557B1 (en) * | 2019-04-11 | 2020-06-23 | Micron Technology, Inc. | Reference voltage management |
| US10892022B1 (en) * | 2019-08-28 | 2021-01-12 | Micron Technology, Inc. | Responding to power loss |
| CN112863584A (zh) * | 2019-11-28 | 2021-05-28 | 长鑫存储技术有限公司 | 一次可编程存储器的读写电路 |
| US11004493B1 (en) * | 2019-12-05 | 2021-05-11 | Micron Technology, Inc. | Differential amplifier sensing schemes for non-switching state compensation |
| US10998029B1 (en) * | 2020-01-17 | 2021-05-04 | Micron Technology, Inc. | Low voltage ferroelectric memory cell sensing |
| US11152049B1 (en) | 2020-06-08 | 2021-10-19 | Micron Technology, Inc. | Differential sensing for a memory device |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1009311B (zh) * | 1986-11-13 | 1990-08-22 | 西安交通大学 | 铁电体电滞回线计算机测试方法 |
| US5237533A (en) * | 1991-12-20 | 1993-08-17 | National Semiconductor Corporation | High speed switched sense amplifier |
| JPH07134899A (ja) * | 1993-11-11 | 1995-05-23 | Sony Corp | センスアンプ |
| US5487030A (en) * | 1994-08-26 | 1996-01-23 | Hughes Aircraft Company | Ferroelectric interruptible read memory |
| JPH09185890A (ja) * | 1996-01-08 | 1997-07-15 | Hitachi Ltd | 強誘電体記憶装置 |
| DE19832994C2 (de) * | 1998-07-22 | 2003-02-13 | Infineon Technologies Ag | Ferroelektrische Speicheranordnung |
| JP4031904B2 (ja) * | 2000-10-31 | 2008-01-09 | 富士通株式会社 | データ読み出し回路とデータ読み出し方法及びデータ記憶装置 |
| JP4138228B2 (ja) * | 2000-11-20 | 2008-08-27 | 株式会社東芝 | 半導体メモリ |
| KR100448921B1 (ko) | 2002-05-21 | 2004-09-16 | 삼성전자주식회사 | 고속 강유전체 메모리 장치 및 그것의 기입 방법 |
| US6920060B2 (en) | 2002-08-14 | 2005-07-19 | Intel Corporation | Memory device, circuits and methods for operating a memory device |
| EP1622162B1 (en) * | 2003-04-10 | 2009-11-18 | Fujitsu Microelectronics Limited | Ferroelectric memory and method for reading its data |
| JP4157528B2 (ja) * | 2004-03-08 | 2008-10-01 | 富士通株式会社 | 半導体メモリ |
| US7227769B2 (en) * | 2004-03-08 | 2007-06-05 | Fujitsu Limited | Semiconductor memory |
| JP4647313B2 (ja) | 2005-01-06 | 2011-03-09 | 富士通セミコンダクター株式会社 | 半導体メモリ |
| JP4452631B2 (ja) * | 2005-01-21 | 2010-04-21 | パトレネラ キャピタル リミテッド， エルエルシー | メモリ |
| EP1909289A1 (en) | 2005-06-28 | 2008-04-09 | Spansion LLC | Semiconductor device and control method thereof |
| KR100748556B1 (ko) * | 2005-11-23 | 2007-08-10 | 삼성전자주식회사 | 강유전체 메모리 장치 및 그것의 구동방법 |
| JP4374549B2 (ja) * | 2005-12-20 | 2009-12-02 | セイコーエプソン株式会社 | 強誘電体メモリ装置、電子機器および強誘電体メモリ装置の駆動方法 |
| JP4305960B2 (ja) * | 2005-12-28 | 2009-07-29 | セイコーエプソン株式会社 | 強誘電体メモリ装置 |
| JP2008176830A (ja) * | 2007-01-16 | 2008-07-31 | Matsushita Electric Ind Co Ltd | 半導体微少電流判定方法および手段、半導体メモリ |
| KR100866705B1 (ko) | 2007-07-04 | 2008-11-03 | 주식회사 하이닉스반도체 | 강유전체 소자를 적용한 반도체 메모리 장치 |
| JP2009123299A (ja) * | 2007-11-16 | 2009-06-04 | Nec Electronics Corp | 半導体記憶装置 |
| KR101004514B1 (ko) * | 2008-06-09 | 2010-12-31 | 주식회사 하이닉스반도체 | Ｒｆｉｄ 장치 |
| JP2009301658A (ja) * | 2008-06-13 | 2009-12-24 | Seiko Epson Corp | 強誘電体記憶装置、強誘電体記憶装置の駆動方法および電子機器 |
| JP2010027143A (ja) * | 2008-07-18 | 2010-02-04 | Toshiba Corp | 半導体記憶装置 |
| CN104766633A (zh) * | 2008-12-30 | 2015-07-08 | E·孔法洛涅里 | 具有扩展工作温度范围的非易失性存储器 |
| US8373124B2 (en) * | 2009-12-24 | 2013-02-12 | Seiko Epson Corporation | Infrared detection circuit, sensor device, and electronic instrument |
| US9165960B2 (en) * | 2013-01-04 | 2015-10-20 | Industrial Technology Research Institute | Pixel circuit, active sensing array, sensing device and driving method thereof |
-
2016
- 2016-03-11 US US15/067,838 patent/US9552864B1/en active Active
- 2016-12-13 US US15/377,767 patent/US9858978B2/en active Active
-
2017
- 2017-03-10 WO PCT/US2017/021884 patent/WO2017156444A1/en active Application Filing
- 2017-03-10 EP EP17764219.6A patent/EP3427266B1/en active Active
- 2017-03-10 CN CN201780016652.6A patent/CN108885891B/zh active Active
- 2017-03-10 TW TW107115887A patent/TWI668690B/zh active
- 2017-03-10 JP JP2018546778A patent/JP6844823B2/ja active Active
- 2017-03-10 SG SG11201807496XA patent/SG11201807496XA/en unknown
- 2017-03-10 KR KR1020187028494A patent/KR102188584B1/ko active IP Right Grant
- 2017-03-10 TW TW106108080A patent/TWI627628B/zh active
- 2017-12-15 US US15/844,154 patent/US10438642B2/en active Active
-
2019
- 2019-08-08 US US16/536,050 patent/US10600467B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| TW201802805A (zh) | 2018-01-16 |
| US10600467B2 (en) | 2020-03-24 |
| US9552864B1 (en) | 2017-01-24 |
| KR20180114954A (ko) | 2018-10-19 |
| TW201842500A (zh) | 2018-12-01 |
| US20170263302A1 (en) | 2017-09-14 |
| US9858978B2 (en) | 2018-01-02 |
| US20180108393A1 (en) | 2018-04-19 |
| CN108885891B (zh) | 2022-06-21 |
| US20200035285A1 (en) | 2020-01-30 |
| JP2019511804A (ja) | 2019-04-25 |
| US10438642B2 (en) | 2019-10-08 |
| KR102188584B1 (ko) | 2020-12-09 |
| JP6844823B2 (ja) | 2021-03-17 |
| WO2017156444A1 (en) | 2017-09-14 |
| TWI627628B (zh) | 2018-06-21 |
| EP3427266A1 (en) | 2019-01-16 |
| TWI668690B (zh) | 2019-08-11 |
| EP3427266B1 (en) | 2022-06-22 |
| CN108885891A (zh) | 2018-11-23 |
| EP3427266A4 (en) | 2019-11-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| SG11201807496XA (en) | Offset compensation for ferroelectric memory cell sensing | |
| SG11201808666PA (en) | Charge extraction from ferroelectric memory cell | |
| SG11201810128WA (en) | Charge mirror-based sensing for ferroelectric memory | |
| SG11201811095UA (en) | Multi-level storage in ferroelectric memory | |
| SG11201810132WA (en) | Ferroelectric memory cell recovery | |
| SG11201811065SA (en) | Memory cell imprint avoidance | |
| SG11201900341WA (en) | Apparatuses including multi-level memory cells and methods of operation of same | |
| SG11201900816TA (en) | A hybrid memory device | |
| SG11201902707WA (en) | Apparatuses including memory cells and methods of operation of same | |
| SG11201811063QA (en) | Array data bit inversion | |
| SG11201807164XA (en) | Circuit arrangement, method of forming and operating the same | |
| SG11201908050TA (en) | Multiple plate line architecture for multideck memory array | |
| SG11201807493WA (en) | Ground reference scheme for a memory cell | |
| SG11201805648PA (en) | Crypto multiple security asset creation and redemption platform | |
| SG11201906878SA (en) | Multiple gate-induced drain leakage current generator | |
| SG11201907679TA (en) | Business verification method and apparatus | |
| SG11201903787YA (en) | Exploiting input data sparsity in neural network compute units | |
| SG11201901180WA (en) | Systems and methods for providing identity assurance for decentralized applications | |
| SG11201900116RA (en) | Communication flow for verification and identification check | |
| SG11201809795VA (en) | Memory access techniques in memory devices with multiple partitions | |
| SG11201811465WA (en) | Semiconductor package and method of forming the same | |
| SG11201807962QA (en) | Thermal insulation for three-dimensional memory arrays | |
| SG11201900375YA (en) | Link error correction in memory system | |
| SG11201901168UA (en) | Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory | |
| SG11201906413XA (en) | Exposure apparatus |