SG11201810128WA - Charge mirror-based sensing for ferroelectric memory - Google Patents

Charge mirror-based sensing for ferroelectric memory

Info

Publication number
SG11201810128WA
SG11201810128WA SG11201810128WA SG11201810128WA SG11201810128WA SG 11201810128W A SG11201810128W A SG 11201810128WA SG 11201810128W A SG11201810128W A SG 11201810128WA SG 11201810128W A SG11201810128W A SG 11201810128WA SG 11201810128W A SG11201810128W A SG 11201810128WA
Authority
SG
Singapore
Prior art keywords
international
charge
boise
idaho
pct
Prior art date
Application number
SG11201810128WA
Inventor
Xinwei Guo
Daniele Vimercati
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of SG11201810128WA publication Critical patent/SG11201810128WA/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225Auxiliary circuits
    • G11C11/2273Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/221Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using ferroelectric capacitors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225Auxiliary circuits
    • G11C11/2275Writing or programming circuits or methods

Abstract

INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property 1111111011111111101 1111111111111111111111101011011111111111H1111111111111110111111 Organization International Bureau (10) International Publication Number (43) International Publication Date .....0\"\"\" WO 2017/209858 Al 07 December 2017 (07.12.2017) WIP0 I PCT (51) International Patent Classification: (74) Agent: HARRIS, Philip W.; Holland & Hart LLP, P.O. Gl1C 11/22 (2006.01) Box 11583, Salt Lake City, Utah 84147 (US). (21) International Application Number: (81) Designated States (unless otherwise indicated, for every PCT/US2017/029099 kind of national protection available): AE, AG, AL, AM, (22) International Filing Date: AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, 24 April 2017 (24.04.2017) CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, (25) Filing Language: English HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, (26) Publication Language: English KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, (30) Priority Data: PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, 15/173,310 03 June 2016 (03.06.2016) US SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (71) Applicant: MICRON TECHNOLOGY, INC. [US/US]; 8000 S. Federal Way, Boise, Idaho 83716-9632 (US). (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, (72) Inventors: GUO, Xinwei; 8000 S. Federal Way, Boise, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, Idaho 83716-9632 (US). VIMERCATI, Daniele; 8000 S. UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, Federal Way, Boise, Idaho 83716-9632 (US). TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, — MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, = (54) Title: CHARGE MIRROR-BASED SENSING FOR FERROELECTRIC MEMORY 225-b = =555 575-n \j_ 535 lc/ 565 0 0 = 0 575 -•\ j_ • b 560 550 540 _ _ _ Al __ _ 545 580 = 105-c = _El i _ 585 min = MI = — 110-b . = = - L .. ... i •N _i 5 0 = 525 515 —17,...\ 410-a 560 12 c — = 220-a 505 520 510 I -..\ ‘\"- 570 = = = — Il GC kr) GC 01 (57) : © difference between ei ---- the full charge IN charge to an 1-1 © the logic state ei 205-a1 —PL j r - 210-a Methods, two difference amplification of the memory cell. logic states of a ferroelectric between systems, and devices the two states capacitor. The signal on the \" of a selected memory cell. The charge mirror may transfer the memory cell polarization 415-b 415 for a sensing memory /\".. 530 -c aer 405-a FIG. 5 scheme that cell or cells is described. The scheme employs a charge mirror to extract amplification capacitor J extracts may 500 the full or nearly full remnant polarization charge then be compared with a reference voltage to detect C [Continued on next page] WO 2017/209858 Al MIDEDIMOMOIDEIRMEM0010101101HUMODEVOIS TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Declarations under Rule 4.17: — as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(H)) — as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) Published: — with international search report (Art. 21(3))
SG11201810128WA 2016-06-03 2017-04-24 Charge mirror-based sensing for ferroelectric memory SG11201810128WA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/173,310 US9881661B2 (en) 2016-06-03 2016-06-03 Charge mirror-based sensing for ferroelectric memory
PCT/US2017/029099 WO2017209858A1 (en) 2016-06-03 2017-04-24 Charge mirror-based sensing for ferroelectric memory

Publications (1)

Publication Number Publication Date
SG11201810128WA true SG11201810128WA (en) 2018-12-28

Family

ID=60477787

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201810128WA SG11201810128WA (en) 2016-06-03 2017-04-24 Charge mirror-based sensing for ferroelectric memory

Country Status (8)

Country Link
US (5) US9881661B2 (en)
EP (1) EP3465690A4 (en)
JP (1) JP6644175B2 (en)
KR (2) KR102330193B1 (en)
CN (1) CN109313919A (en)
SG (1) SG11201810128WA (en)
TW (1) TWI650750B (en)
WO (1) WO2017209858A1 (en)

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US10446502B2 (en) * 2017-08-30 2019-10-15 Micron, Technology, Inc. Apparatuses and methods for shielded memory architecture
US10762944B2 (en) 2017-12-18 2020-09-01 Micron Technology, Inc. Single plate configuration and memory array operation
US10529410B2 (en) * 2017-12-18 2020-01-07 Micron Technology, Inc. Techniques for accessing an array of memory cells to reduce parasitic coupling
US10403336B2 (en) 2017-12-28 2019-09-03 Micron Technology, Inc. Techniques for precharging a memory cell
US10867653B2 (en) 2018-04-20 2020-12-15 Micron Technology, Inc. Access schemes for protecting stored data in a memory device
US11127449B2 (en) * 2018-04-25 2021-09-21 Micron Technology, Inc. Sensing a memory cell
US10607676B2 (en) * 2018-04-25 2020-03-31 Micron Technology, Inc. Sensing a memory cell
US10622050B2 (en) * 2018-05-09 2020-04-14 Micron Technology, Inc. Ferroelectric memory plate power reduction
US10984847B2 (en) * 2019-06-14 2021-04-20 Micron Technology, Inc. Memory management for charge leakage in a memory device
US11301320B2 (en) 2020-04-03 2022-04-12 Micron Technology, Inc. Erasure decoding for a memory device
WO2020251708A1 (en) * 2019-06-14 2020-12-17 Micron Technology, Inc. Memory management and erasure decoding for a memory device
US10867671B1 (en) 2019-07-02 2020-12-15 Micron Technology, Inc. Techniques for applying multiple voltage pulses to select a memory cell
US11144228B2 (en) * 2019-07-11 2021-10-12 Micron Technology, Inc. Circuit partitioning for a memory device
US11017831B2 (en) 2019-07-15 2021-05-25 Micron Technology, Inc. Ferroelectric memory cell access
US10998029B1 (en) * 2020-01-17 2021-05-04 Micron Technology, Inc. Low voltage ferroelectric memory cell sensing

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Also Published As

Publication number Publication date
KR102330193B1 (en) 2021-11-23
US20200005851A1 (en) 2020-01-02
TWI650750B (en) 2019-02-11
TW201801078A (en) 2018-01-01
US11133048B2 (en) 2021-09-28
US20190108867A1 (en) 2019-04-11
EP3465690A1 (en) 2019-04-10
EP3465690A4 (en) 2020-02-26
US20170352397A1 (en) 2017-12-07
US10170173B2 (en) 2019-01-01
KR20190004366A (en) 2019-01-11
US20220005518A1 (en) 2022-01-06
WO2017209858A1 (en) 2017-12-07
CN109313919A (en) 2019-02-05
US9881661B2 (en) 2018-01-30
KR20200039812A (en) 2020-04-16
JP6644175B2 (en) 2020-02-12
US10395718B2 (en) 2019-08-27
KR102100577B1 (en) 2020-04-14
JP2019520666A (en) 2019-07-18
US20180114559A1 (en) 2018-04-26

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