SG11201810128WA - Charge mirror-based sensing for ferroelectric memory - Google Patents
Charge mirror-based sensing for ferroelectric memoryInfo
- Publication number
- SG11201810128WA SG11201810128WA SG11201810128WA SG11201810128WA SG11201810128WA SG 11201810128W A SG11201810128W A SG 11201810128WA SG 11201810128W A SG11201810128W A SG 11201810128WA SG 11201810128W A SG11201810128W A SG 11201810128WA SG 11201810128W A SG11201810128W A SG 11201810128WA
- Authority
- SG
- Singapore
- Prior art keywords
- international
- charge
- boise
- idaho
- pct
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2273—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/221—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using ferroelectric capacitors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2275—Writing or programming circuits or methods
Abstract
INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property 1111111011111111101 1111111111111111111111101011011111111111H1111111111111110111111 Organization International Bureau (10) International Publication Number (43) International Publication Date .....0\"\"\" WO 2017/209858 Al 07 December 2017 (07.12.2017) WIP0 I PCT (51) International Patent Classification: (74) Agent: HARRIS, Philip W.; Holland & Hart LLP, P.O. Gl1C 11/22 (2006.01) Box 11583, Salt Lake City, Utah 84147 (US). (21) International Application Number: (81) Designated States (unless otherwise indicated, for every PCT/US2017/029099 kind of national protection available): AE, AG, AL, AM, (22) International Filing Date: AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, 24 April 2017 (24.04.2017) CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, (25) Filing Language: English HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, (26) Publication Language: English KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, (30) Priority Data: PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, 15/173,310 03 June 2016 (03.06.2016) US SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (71) Applicant: MICRON TECHNOLOGY, INC. [US/US]; 8000 S. Federal Way, Boise, Idaho 83716-9632 (US). (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, (72) Inventors: GUO, Xinwei; 8000 S. Federal Way, Boise, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, Idaho 83716-9632 (US). VIMERCATI, Daniele; 8000 S. UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, Federal Way, Boise, Idaho 83716-9632 (US). TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, — MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, = (54) Title: CHARGE MIRROR-BASED SENSING FOR FERROELECTRIC MEMORY 225-b = =555 575-n \j_ 535 lc/ 565 0 0 = 0 575 -•\ j_ • b 560 550 540 _ _ _ Al __ _ 545 580 = 105-c = _El i _ 585 min = MI = — 110-b . = = - L .. ... i •N _i 5 0 = 525 515 —17,...\ 410-a 560 12 c — = 220-a 505 520 510 I -..\ ‘\"- 570 = = = — Il GC kr) GC 01 (57) : © difference between ei ---- the full charge IN charge to an 1-1 © the logic state ei 205-a1 —PL j r - 210-a Methods, two difference amplification of the memory cell. logic states of a ferroelectric between systems, and devices the two states capacitor. The signal on the \" of a selected memory cell. The charge mirror may transfer the memory cell polarization 415-b 415 for a sensing memory /\".. 530 -c aer 405-a FIG. 5 scheme that cell or cells is described. The scheme employs a charge mirror to extract amplification capacitor J extracts may 500 the full or nearly full remnant polarization charge then be compared with a reference voltage to detect C [Continued on next page] WO 2017/209858 Al MIDEDIMOMOIDEIRMEM0010101101HUMODEVOIS TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Declarations under Rule 4.17: — as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(H)) — as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) Published: — with international search report (Art. 21(3))
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/173,310 US9881661B2 (en) | 2016-06-03 | 2016-06-03 | Charge mirror-based sensing for ferroelectric memory |
PCT/US2017/029099 WO2017209858A1 (en) | 2016-06-03 | 2017-04-24 | Charge mirror-based sensing for ferroelectric memory |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201810128WA true SG11201810128WA (en) | 2018-12-28 |
Family
ID=60477787
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201810128WA SG11201810128WA (en) | 2016-06-03 | 2017-04-24 | Charge mirror-based sensing for ferroelectric memory |
Country Status (8)
Country | Link |
---|---|
US (5) | US9881661B2 (en) |
EP (1) | EP3465690A4 (en) |
JP (1) | JP6644175B2 (en) |
KR (2) | KR102330193B1 (en) |
CN (1) | CN109313919A (en) |
SG (1) | SG11201810128WA (en) |
TW (1) | TWI650750B (en) |
WO (1) | WO2017209858A1 (en) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10446502B2 (en) * | 2017-08-30 | 2019-10-15 | Micron, Technology, Inc. | Apparatuses and methods for shielded memory architecture |
US10762944B2 (en) | 2017-12-18 | 2020-09-01 | Micron Technology, Inc. | Single plate configuration and memory array operation |
US10529410B2 (en) * | 2017-12-18 | 2020-01-07 | Micron Technology, Inc. | Techniques for accessing an array of memory cells to reduce parasitic coupling |
US10403336B2 (en) | 2017-12-28 | 2019-09-03 | Micron Technology, Inc. | Techniques for precharging a memory cell |
US10867653B2 (en) | 2018-04-20 | 2020-12-15 | Micron Technology, Inc. | Access schemes for protecting stored data in a memory device |
US11127449B2 (en) * | 2018-04-25 | 2021-09-21 | Micron Technology, Inc. | Sensing a memory cell |
US10607676B2 (en) * | 2018-04-25 | 2020-03-31 | Micron Technology, Inc. | Sensing a memory cell |
US10622050B2 (en) * | 2018-05-09 | 2020-04-14 | Micron Technology, Inc. | Ferroelectric memory plate power reduction |
US10984847B2 (en) * | 2019-06-14 | 2021-04-20 | Micron Technology, Inc. | Memory management for charge leakage in a memory device |
US11301320B2 (en) | 2020-04-03 | 2022-04-12 | Micron Technology, Inc. | Erasure decoding for a memory device |
WO2020251708A1 (en) * | 2019-06-14 | 2020-12-17 | Micron Technology, Inc. | Memory management and erasure decoding for a memory device |
US10867671B1 (en) | 2019-07-02 | 2020-12-15 | Micron Technology, Inc. | Techniques for applying multiple voltage pulses to select a memory cell |
US11144228B2 (en) * | 2019-07-11 | 2021-10-12 | Micron Technology, Inc. | Circuit partitioning for a memory device |
US11017831B2 (en) | 2019-07-15 | 2021-05-25 | Micron Technology, Inc. | Ferroelectric memory cell access |
US10998029B1 (en) * | 2020-01-17 | 2021-05-04 | Micron Technology, Inc. | Low voltage ferroelectric memory cell sensing |
Family Cites Families (25)
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FR2682802B1 (en) * | 1991-10-18 | 1993-12-03 | Sgs Thomson Microelectronics Sa | DEVICE FOR GENERATING A PROGRAMMING VOLTAGE FROM A PROGRAMMABLE PERMANENT MEMORY, ESPECIALLY OF THE EPROM TYPE, METHOD AND MEMORY RELATING THERETO. |
US5677865A (en) | 1995-09-11 | 1997-10-14 | Micron Technology, Inc. | Ferroelectric memory using reference charge circuit |
FR2749967B1 (en) * | 1996-06-13 | 1998-09-25 | Sgs Thomson Microelectronics | DEVICE FOR READING CELLS FROM A MEMORY |
KR100324594B1 (en) | 1999-06-28 | 2002-02-16 | 박종섭 | FeRAM Device |
JP4049519B2 (en) * | 2000-07-17 | 2008-02-20 | 松下電器産業株式会社 | Ferroelectric memory device |
US6584007B2 (en) | 2000-12-29 | 2003-06-24 | Stmicroelectronics, Inc. | Circuit and method for testing a ferroelectric memory device |
US6529398B1 (en) | 2001-09-27 | 2003-03-04 | Intel Corporation | Ferroelectric memory and method for reading the same |
EP1304701A1 (en) * | 2001-10-18 | 2003-04-23 | STMicroelectronics S.r.l. | Sensing circuit for ferroelectric non-volatile memories |
US7215187B2 (en) * | 2004-07-23 | 2007-05-08 | The Hong Kong University Of Science And Technology | Symmetrically matched voltage mirror and applications therefor |
JP4064951B2 (en) * | 2004-07-28 | 2008-03-19 | 株式会社東芝 | Ferroelectric semiconductor memory device |
GB0424501D0 (en) | 2004-11-05 | 2004-12-08 | Ricardo Uk Ltd | Co-simulation apparatus and method |
WO2006085459A1 (en) * | 2005-02-08 | 2006-08-17 | Nec Corporation | Semiconductor storage device and method for reading semiconductor storage device |
JP2008108355A (en) * | 2006-10-25 | 2008-05-08 | Toshiba Corp | Ferroelectric semiconductor memory device and its reading method |
US7800968B2 (en) | 2007-05-02 | 2010-09-21 | Infineon Technologies Ag | Symmetric differential current sense amplifier |
US7778065B2 (en) * | 2008-02-29 | 2010-08-17 | International Business Machines Corporation | Method and apparatus for implementing concurrent multiple level sensing operation for resistive memory devices |
CN101404142A (en) * | 2008-10-31 | 2009-04-08 | 南开大学 | Current mirror type TFT-OLED display image element unit circuit and its production method |
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DE102010007629B4 (en) * | 2010-02-11 | 2013-08-14 | Texas Instruments Deutschland Gmbh | Integrated circuit with FRAM memory and method for granting read access to FRAM memory |
DE102010044925B4 (en) * | 2010-09-10 | 2014-02-20 | Texas Instruments Deutschland Gmbh | Adaptively biased comparator |
JP2012104165A (en) * | 2010-11-05 | 2012-05-31 | Elpida Memory Inc | Semiconductor device |
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US8937841B2 (en) * | 2012-05-16 | 2015-01-20 | SK Hynix Inc. | Driver for semiconductor memory and method thereof |
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US8913442B2 (en) * | 2012-12-21 | 2014-12-16 | Elite Semiconductor Memory Technology Inc. | Circuit for sensing MLC flash memory |
CN106716539B (en) * | 2014-09-26 | 2020-11-17 | 拉迪安特技术公司 | CMOS analog memory using ferroelectric capacitors |
-
2016
- 2016-06-03 US US15/173,310 patent/US9881661B2/en active Active
-
2017
- 2017-04-24 JP JP2018562309A patent/JP6644175B2/en active Active
- 2017-04-24 SG SG11201810128WA patent/SG11201810128WA/en unknown
- 2017-04-24 KR KR1020207009768A patent/KR102330193B1/en active IP Right Grant
- 2017-04-24 WO PCT/US2017/029099 patent/WO2017209858A1/en unknown
- 2017-04-24 KR KR1020187038121A patent/KR102100577B1/en active IP Right Grant
- 2017-04-24 EP EP17807162.7A patent/EP3465690A4/en not_active Withdrawn
- 2017-04-24 CN CN201780033865.XA patent/CN109313919A/en active Pending
- 2017-05-22 TW TW106116854A patent/TWI650750B/en active
- 2017-12-19 US US15/847,583 patent/US10170173B2/en active Active
-
2018
- 2018-11-13 US US16/189,425 patent/US10395718B2/en active Active
-
2019
- 2019-07-08 US US16/504,876 patent/US11133048B2/en active Active
-
2021
- 2021-09-09 US US17/470,655 patent/US20220005518A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
KR102330193B1 (en) | 2021-11-23 |
US20200005851A1 (en) | 2020-01-02 |
TWI650750B (en) | 2019-02-11 |
TW201801078A (en) | 2018-01-01 |
US11133048B2 (en) | 2021-09-28 |
US20190108867A1 (en) | 2019-04-11 |
EP3465690A1 (en) | 2019-04-10 |
EP3465690A4 (en) | 2020-02-26 |
US20170352397A1 (en) | 2017-12-07 |
US10170173B2 (en) | 2019-01-01 |
KR20190004366A (en) | 2019-01-11 |
US20220005518A1 (en) | 2022-01-06 |
WO2017209858A1 (en) | 2017-12-07 |
CN109313919A (en) | 2019-02-05 |
US9881661B2 (en) | 2018-01-30 |
KR20200039812A (en) | 2020-04-16 |
JP6644175B2 (en) | 2020-02-12 |
US10395718B2 (en) | 2019-08-27 |
KR102100577B1 (en) | 2020-04-14 |
JP2019520666A (en) | 2019-07-18 |
US20180114559A1 (en) | 2018-04-26 |
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