SG10201801132VA - Method to create air gaps - Google Patents

Method to create air gaps

Info

Publication number
SG10201801132VA
SG10201801132VA SG10201801132VA SG10201801132VA SG10201801132VA SG 10201801132V A SG10201801132V A SG 10201801132VA SG 10201801132V A SG10201801132V A SG 10201801132VA SG 10201801132V A SG10201801132V A SG 10201801132VA SG 10201801132V A SG10201801132V A SG 10201801132VA
Authority
SG
Singapore
Prior art keywords
tin oxide
air gaps
etching
recessed feature
create air
Prior art date
Application number
SG10201801132VA
Other languages
English (en)
Inventor
Cleemput Patrick A Van
Seshasayee Varadarajan
Schravendijk Bart J Van
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Res Corp filed Critical Lam Res Corp
Publication of SG10201801132VA publication Critical patent/SG10201801132VA/en

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    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
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    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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    • H01L29/41791—Source or drain electrodes for field effect devices for transistors with a horizontal current flow in a vertical sidewall, e.g. FinFET, MuGFET

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Separation By Low-Temperature Treatments (AREA)
  • Optical Communication System (AREA)
SG10201801132VA 2017-02-13 2018-02-09 Method to create air gaps SG10201801132VA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US201762458464P 2017-02-13 2017-02-13

Publications (1)

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SG10201801132VA true SG10201801132VA (en) 2018-09-27

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SG10201801132VA SG10201801132VA (en) 2017-02-13 2018-02-09 Method to create air gaps

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US (3) US11088019B2 (zh)
JP (2) JP7190814B2 (zh)
KR (2) KR20180093798A (zh)
CN (3) CN112242345A (zh)
SG (1) SG10201801132VA (zh)
TW (2) TW202401570A (zh)

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US10804262B2 (en) 2019-02-22 2020-10-13 International Business Machines Corporation Cointegration of FET devices with decoupling capacitor
US10892328B2 (en) 2019-03-04 2021-01-12 International Business Machines Corporation Source/drain extension regions and air spacers for nanosheet field-effect transistor structures
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