SG10201402890UA - Probabilistic digital delay measurement device - Google Patents

Probabilistic digital delay measurement device

Info

Publication number
SG10201402890UA
SG10201402890UA SG10201402890UA SG10201402890UA SG10201402890UA SG 10201402890U A SG10201402890U A SG 10201402890UA SG 10201402890U A SG10201402890U A SG 10201402890UA SG 10201402890U A SG10201402890U A SG 10201402890UA SG 10201402890U A SG10201402890U A SG 10201402890UA
Authority
SG
Singapore
Prior art keywords
measurement device
delay measurement
digital delay
probabilistic digital
probabilistic
Prior art date
Application number
SG10201402890UA
Other languages
English (en)
Inventor
Povazanec Juraj
Sukumaran Biju
Traeber Mario
Original Assignee
Lantiq Deutschland Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lantiq Deutschland Gmbh filed Critical Lantiq Deutschland Gmbh
Priority to SG10201402890UA priority Critical patent/SG10201402890UA/en
Priority to BR102015011305A priority patent/BR102015011305A2/pt
Priority to KR1020150071425A priority patent/KR102030870B1/ko
Priority to EP15168850.4A priority patent/EP2961065B1/fr
Priority to TW104116838A priority patent/TWI571059B/zh
Priority to US14/728,034 priority patent/US9843437B2/en
Priority to JP2015113299A priority patent/JP6311147B2/ja
Priority to CN201510300801.4A priority patent/CN105158591B/zh
Publication of SG10201402890UA publication Critical patent/SG10201402890UA/en
Priority to KR1020180041029A priority patent/KR20180038436A/ko

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31725Timing aspects, e.g. clock distribution, skew, propagation delay
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/0033Correction by delay
    • H04L7/0041Delay of data signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/04Shaping pulses by increasing duration; by decreasing duration
    • H03K5/05Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/04Shaping pulses by increasing duration; by decreasing duration
    • H03K5/06Shaping pulses by increasing duration; by decreasing duration by the use of delay lines or other analogue delay elements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/131Digitally controlled
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0079Receiver details
    • H04L7/0087Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019Variable delay
    • H03K2005/00058Variable delay controlled by a digital setting
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B2001/70706Spread spectrum techniques using direct sequence modulation using a code tracking loop, e.g. a delay locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Pulse Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Measurement Of Unknown Time Intervals (AREA)
  • Measuring Phase Differences (AREA)
  • Tests Of Electronic Circuits (AREA)
SG10201402890UA 2014-06-04 2014-06-04 Probabilistic digital delay measurement device SG10201402890UA (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
SG10201402890UA SG10201402890UA (en) 2014-06-04 2014-06-04 Probabilistic digital delay measurement device
BR102015011305A BR102015011305A2 (pt) 2014-06-04 2015-05-18 dispositivo de medição de retardo digital probabilístico
KR1020150071425A KR102030870B1 (ko) 2014-06-04 2015-05-22 확률론적 디지털 지연 측정 장치
EP15168850.4A EP2961065B1 (fr) 2014-06-04 2015-05-22 Dispositif de mesure de retard numérique probabiliste
TW104116838A TWI571059B (zh) 2014-06-04 2015-05-26 提供一通訊電子裝置之一延遲數値之方法,延遲產生器,具有該延遲產生器之積體電路,及包含該積體電路之通訊電子系統
US14/728,034 US9843437B2 (en) 2014-06-04 2015-06-02 Probabilistic digital delay measurement device
JP2015113299A JP6311147B2 (ja) 2014-06-04 2015-06-03 見込みデジタル遅延測定装置
CN201510300801.4A CN105158591B (zh) 2014-06-04 2015-06-04 概率数字延迟测量设备
KR1020180041029A KR20180038436A (ko) 2014-06-04 2018-04-09 확률론적 디지털 지연 측정 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG10201402890UA SG10201402890UA (en) 2014-06-04 2014-06-04 Probabilistic digital delay measurement device

Publications (1)

Publication Number Publication Date
SG10201402890UA true SG10201402890UA (en) 2016-01-28

Family

ID=54799511

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201402890UA SG10201402890UA (en) 2014-06-04 2014-06-04 Probabilistic digital delay measurement device

Country Status (8)

Country Link
US (1) US9843437B2 (fr)
EP (1) EP2961065B1 (fr)
JP (1) JP6311147B2 (fr)
KR (2) KR102030870B1 (fr)
CN (1) CN105158591B (fr)
BR (1) BR102015011305A2 (fr)
SG (1) SG10201402890UA (fr)
TW (1) TWI571059B (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6344175B2 (ja) * 2014-09-18 2018-06-20 株式会社デンソーウェーブ デジタルフィルタ装置
CN109039310B (zh) * 2017-06-09 2021-11-12 扬智科技股份有限公司 自适应调整相位延迟的方法及装置
KR102410014B1 (ko) * 2017-08-03 2022-06-21 삼성전자주식회사 클락 지터 측정 회로 및 이를 포함하는 반도체 장치
EP3856040B1 (fr) 2018-09-28 2024-01-03 Nidek Co., Ltd. Tonomètre ultrasonore et actionneur ultrasonore
CN114584112A (zh) * 2020-11-30 2022-06-03 上海寒武纪信息科技有限公司 延迟电路
KR102449951B1 (ko) * 2020-12-11 2022-10-04 한국전자기술연구원 통계적 학습을 통한 고속 pam-4 수신기용 클럭 및 데이터 복원 회로
CN112816858B (zh) * 2020-12-31 2022-09-16 成都华微电子科技股份有限公司 数字电路延时测试方法、测试电路和集成电路芯片
US20240036090A1 (en) * 2022-08-01 2024-02-01 Winbond Electronics Corp. Frequency detection device for clock signal and detection method thereof
CN115903998A (zh) * 2022-11-11 2023-04-04 深圳天德钰科技股份有限公司 校准方法、电路、存储介质、时钟恢复电路及电子装置
CN117498858B (zh) * 2024-01-02 2024-03-29 上海米硅科技有限公司 一种信号质量检测方法及信号质量检测电路

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JPS5488169A (en) * 1977-12-26 1979-07-13 Ono Sokki Seisakusho Kk Method of measuring phase difference signal
JPS6356013A (ja) * 1986-08-26 1988-03-10 Nec Corp デユテイ・サイクル制御回路
JP2704635B2 (ja) * 1988-07-29 1998-01-26 株式会社アドバンテスト 遅延時間測定装置
JP2969892B2 (ja) * 1990-10-03 1999-11-02 株式会社デンソー 時間計測装置における周期決定方法
US5452333A (en) * 1992-06-19 1995-09-19 Advanced Micro Devices, Inc. Digital jitter correction method and signal preconditioner
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JPH07242064A (ja) 1994-03-04 1995-09-19 Nippon Paper Ind Co Ltd 可逆性感熱記録体
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Also Published As

Publication number Publication date
JP2016006421A (ja) 2016-01-14
KR102030870B1 (ko) 2019-10-10
EP2961065A1 (fr) 2015-12-30
KR20180038436A (ko) 2018-04-16
US20160020896A1 (en) 2016-01-21
JP6311147B2 (ja) 2018-04-18
KR20150139776A (ko) 2015-12-14
TW201601457A (zh) 2016-01-01
CN105158591A (zh) 2015-12-16
CN105158591B (zh) 2018-05-22
US9843437B2 (en) 2017-12-12
EP2961065B1 (fr) 2020-05-13
BR102015011305A2 (pt) 2015-12-08
TWI571059B (zh) 2017-02-11

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