RU2008148129A - Гибридное запоминающее устройство с единым интерфейсом - Google Patents
Гибридное запоминающее устройство с единым интерфейсом Download PDFInfo
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- RU2008148129A RU2008148129A RU2008148129/09A RU2008148129A RU2008148129A RU 2008148129 A RU2008148129 A RU 2008148129A RU 2008148129/09 A RU2008148129/09 A RU 2008148129/09A RU 2008148129 A RU2008148129 A RU 2008148129A RU 2008148129 A RU2008148129 A RU 2008148129A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/20—Employing a main memory using a specific memory technology
- G06F2212/202—Non-volatile memory
- G06F2212/2022—Flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/20—Employing a main memory using a specific memory technology
- G06F2212/205—Hybrid memory, e.g. using both volatile and non-volatile memory
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/104—Embedded memory devices, e.g. memories with a processing device on the same die or ASIC memory designs
Abstract
1. В запоминающем устройстве способ, содержащий этапы, на которых: ! принимают в контроллере команды, адреса и данные в запоминающем устройстве через заданный интерфейс для первого типа памяти, ассоциативно связанного с запоминающим устройством; ! определяют в контроллере то, соответствует ли информация, принятая в запоминающем устройстве, второму типу памяти, ассоциативно связанному с запоминающим устройством, и если да, выводят сигналы во второй тип памяти, чтобы передавать, по меньшей мере, одну команду во второй тип памяти и/или выполнять, по меньшей мере, одну операцию ввода/вывода (I/O) данных во втором типе памяти. ! 2. Способ по п.1, дополнительно содержащий этап, на котором, когда принятая информация соответствует второму типу памяти, отключают первый тип памяти. ! 3. Способ по п.1, дополнительно содержащий этапы, на которых, когда принятая информация соответствует второму типу памяти, выводят индикацию занятности, выполняют операцию ввода/вывода данных во втором типе памяти и выводят индикацию готовности, когда операция ввода-вывода завершена. ! 4. Способ по п.1, дополнительно содержащий этап, на котором, когда принятая информация соответствует второму типу памяти, осуществляют доступ к информации команд и/или информации адресации данных в другом наборе из одной или более ячеек запоминающего устройства. ! 5. Способ по п.4, в котором принятая информация соответствует информации адресации данных, дополнительно содержащий этап, на котором считывают информацию адресации данных, чтобы отобразить принятый адрес в одну секцию из множества возможных секций второго типа памяти. ! 6. В запоминающем устройстве система,
Claims (18)
1. В запоминающем устройстве способ, содержащий этапы, на которых:
принимают в контроллере команды, адреса и данные в запоминающем устройстве через заданный интерфейс для первого типа памяти, ассоциативно связанного с запоминающим устройством;
определяют в контроллере то, соответствует ли информация, принятая в запоминающем устройстве, второму типу памяти, ассоциативно связанному с запоминающим устройством, и если да, выводят сигналы во второй тип памяти, чтобы передавать, по меньшей мере, одну команду во второй тип памяти и/или выполнять, по меньшей мере, одну операцию ввода/вывода (I/O) данных во втором типе памяти.
2. Способ по п.1, дополнительно содержащий этап, на котором, когда принятая информация соответствует второму типу памяти, отключают первый тип памяти.
3. Способ по п.1, дополнительно содержащий этапы, на которых, когда принятая информация соответствует второму типу памяти, выводят индикацию занятности, выполняют операцию ввода/вывода данных во втором типе памяти и выводят индикацию готовности, когда операция ввода-вывода завершена.
4. Способ по п.1, дополнительно содержащий этап, на котором, когда принятая информация соответствует второму типу памяти, осуществляют доступ к информации команд и/или информации адресации данных в другом наборе из одной или более ячеек запоминающего устройства.
5. Способ по п.4, в котором принятая информация соответствует информации адресации данных, дополнительно содержащий этап, на котором считывают информацию адресации данных, чтобы отобразить принятый адрес в одну секцию из множества возможных секций второго типа памяти.
6. В запоминающем устройстве система, содержащая:
первый тип памяти;
интерфейс, соответствующий первому типу памяти таким образом, чтобы запоминающее устройство работало с протоколом доступа первого типа памяти;
второй тип памяти; и
контроллер, который соединен с интерфейсом, с первым типом памяти и вторым типом памяти, в котором на основе информации, принятой в интерфейсе, контроллер определяет то, применяется ли другая информация, принятая через интерфейс, к первому типу памяти или второму типу памяти.
7. Система по п.6, в которой первый тип памяти содержит энергозависимую память, второй тип памяти содержит энергонезависимую память и в которой, по меньшей мере, часть информации, принимаемой в интерфейсе, посредством которого контроллер определяет, применяется ли связанная информация, принимаемая через интерфейс, к первому типу памяти или второму типу памяти, принимается по адресу памяти, соответствующему первому типу памяти.
8. Система по п.7, в которой энергозависимая память содержит память SDRAM-типа или DRAM-типа и в которой адрес памяти и связанная информация, принятая посредством интерфейса, содержит строб строкового доступа, строб столбцового доступа и управляющую информацию.
9. Система по п.7, в которой энергонезависимая память содержит флэш-память и дополнительно содержит буфер, ассоциативно связанный с контроллером, для буферизации операций ввода/вывода данных, выполняемых с помощью флэш-памяти.
10. Система по п.9, дополнительно содержащая индикатор состояния, при этом контроллер сообщает через индикатор состояния, занята или завершена операция ввода/вывода данных.
11. Система по п.6, в которой запоминающее устройство включено в модуль памяти с двухрядным расположением выводов.
12. Система по п.6, в которой контроллер дополнительно включает в себя средство управления памятью.
13. Система по п.6, в которой контроллер осуществляет доступ к информации команд и/или информации адресации данных в наборе из одной или более ячеек, соответствующих первому типу памяти.
14. В вычислительном устройстве система, содержащая:
гибридное запоминающее устройство, включающее в себя интерфейс, соответствующий первому типу памяти, второй тип памяти и контроллер; и
компонент, который инициирует команды в контроллер через интерфейс, в том числе посредством записи связанных с командами данных в один или более адресов первого типа памяти, включая в себя, по меньшей мере, одну команду, направляемую в операцию ввода/вывода данных во втором типе памяти.
15. Система по п.14, в которой контроллер сообщает компоненту информацию состояния операции ввода/вывода данных второго типа памяти посредством записи связанных с состоянием данных в один или более адресов первого типа памяти.
16. Система по п.14, в которой компонент содержит код, приводящийся в исполнение в микропрограммном обеспечении вычислительного устройства.
17. Система по п.14, в которой первый тип памяти соответствует энергозависимой памяти, второй тип памяти соответствует энергонезависимой памяти, при этом данные, адресованные в определенную ячейку в первом типе памяти, управляются посредством контроллера, чтобы осуществлять доступ ко второму типу памяти.
18. Система по п.14, дополнительно содержащая буфер, ассоциативно связанный с контроллером, для буферизации операций ввода/вывода данных, выполняемых со вторым типом памяти.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/449,435 US7716411B2 (en) | 2006-06-07 | 2006-06-07 | Hybrid memory device with single interface |
US11/449,435 | 2006-06-07 |
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RU2008148129A true RU2008148129A (ru) | 2010-06-10 |
RU2442211C2 RU2442211C2 (ru) | 2012-02-10 |
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RU2008148129/08A RU2442211C2 (ru) | 2006-06-07 | 2007-06-01 | Гибридное запоминающее устройство с единым интерфейсом |
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Country | Link |
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US (2) | US7716411B2 (ru) |
EP (1) | EP2025001B1 (ru) |
JP (2) | JP2009540431A (ru) |
KR (1) | KR101159400B1 (ru) |
CN (1) | CN101473438B (ru) |
BR (1) | BRPI0711731A2 (ru) |
ES (1) | ES2718463T3 (ru) |
MX (1) | MX2008014859A (ru) |
RU (1) | RU2442211C2 (ru) |
TW (1) | TWI420302B (ru) |
WO (1) | WO2007145883A1 (ru) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8812744B1 (en) | 2013-03-14 | 2014-08-19 | Microsoft Corporation | Assigning priorities to data for hybrid drives |
US9626126B2 (en) | 2013-04-24 | 2017-04-18 | Microsoft Technology Licensing, Llc | Power saving mode hybrid drive access management |
US9946495B2 (en) | 2013-04-25 | 2018-04-17 | Microsoft Technology Licensing, Llc | Dirty data management for hybrid drives |
CN111399752A (zh) * | 2019-01-03 | 2020-07-10 | 慧荣科技股份有限公司 | 不同类型存储单元的控制装置及方法 |
US11748022B2 (en) | 2019-01-03 | 2023-09-05 | Silicon Motion, Inc. | Method and apparatus for controlling different types of storage units |
Families Citing this family (188)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8250295B2 (en) | 2004-01-05 | 2012-08-21 | Smart Modular Technologies, Inc. | Multi-rank memory module that emulates a memory module having a different number of ranks |
US7392338B2 (en) | 2006-07-31 | 2008-06-24 | Metaram, Inc. | Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits |
US8111566B1 (en) | 2007-11-16 | 2012-02-07 | Google, Inc. | Optimal channel design for memory devices for providing a high-speed memory interface |
US20080082763A1 (en) | 2006-10-02 | 2008-04-03 | Metaram, Inc. | Apparatus and method for power management of memory circuits by a system or component thereof |
US8081474B1 (en) | 2007-12-18 | 2011-12-20 | Google Inc. | Embossed heat spreader |
US8386722B1 (en) | 2008-06-23 | 2013-02-26 | Google Inc. | Stacked DIMM memory interface |
US8327104B2 (en) | 2006-07-31 | 2012-12-04 | Google Inc. | Adjusting the timing of signals associated with a memory system |
US8244971B2 (en) | 2006-07-31 | 2012-08-14 | Google Inc. | Memory circuit system and method |
US9171585B2 (en) | 2005-06-24 | 2015-10-27 | Google Inc. | Configurable memory circuit system and method |
US9542352B2 (en) | 2006-02-09 | 2017-01-10 | Google Inc. | System and method for reducing command scheduling constraints of memory circuits |
US9507739B2 (en) | 2005-06-24 | 2016-11-29 | Google Inc. | Configurable memory circuit system and method |
US20080028136A1 (en) | 2006-07-31 | 2008-01-31 | Schakel Keith R | Method and apparatus for refresh management of memory modules |
US8130560B1 (en) | 2006-11-13 | 2012-03-06 | Google Inc. | Multi-rank partial width memory modules |
US8397013B1 (en) | 2006-10-05 | 2013-03-12 | Google Inc. | Hybrid memory module |
US8089795B2 (en) | 2006-02-09 | 2012-01-03 | Google Inc. | Memory module with memory stack and interface with enhanced capabilities |
US7386656B2 (en) | 2006-07-31 | 2008-06-10 | Metaram, Inc. | Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit |
US8060774B2 (en) | 2005-06-24 | 2011-11-15 | Google Inc. | Memory systems and memory modules |
US10013371B2 (en) | 2005-06-24 | 2018-07-03 | Google Llc | Configurable memory circuit system and method |
US8077535B2 (en) | 2006-07-31 | 2011-12-13 | Google Inc. | Memory refresh apparatus and method |
US8335894B1 (en) | 2008-07-25 | 2012-12-18 | Google Inc. | Configurable memory system with interface circuit |
US8041881B2 (en) | 2006-07-31 | 2011-10-18 | Google Inc. | Memory device with emulated characteristics |
US8438328B2 (en) | 2008-02-21 | 2013-05-07 | Google Inc. | Emulation of abstracted DIMMs using abstracted DRAMs |
US8055833B2 (en) | 2006-10-05 | 2011-11-08 | Google Inc. | System and method for increasing capacity, performance, and flexibility of flash storage |
US8090897B2 (en) | 2006-07-31 | 2012-01-03 | Google Inc. | System and method for simulating an aspect of a memory circuit |
US8169233B2 (en) | 2009-06-09 | 2012-05-01 | Google Inc. | Programming of DIMM termination resistance values |
US8359187B2 (en) | 2005-06-24 | 2013-01-22 | Google Inc. | Simulating a different number of memory circuit devices |
US8796830B1 (en) | 2006-09-01 | 2014-08-05 | Google Inc. | Stackable low-profile lead frame package |
US7379316B2 (en) | 2005-09-02 | 2008-05-27 | Metaram, Inc. | Methods and apparatus of stacking DRAMs |
US9632929B2 (en) | 2006-02-09 | 2017-04-25 | Google Inc. | Translating an address associated with a command communicated between a system and memory circuits |
US7724589B2 (en) | 2006-07-31 | 2010-05-25 | Google Inc. | System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits |
US7516293B2 (en) * | 2006-09-08 | 2009-04-07 | International Business Machines Corporation | Increased performance using mixed memory types |
US8745315B2 (en) | 2006-11-06 | 2014-06-03 | Rambus Inc. | Memory Systems and methods supporting volatile and wear-leveled nonvolatile physical memory |
US8135900B2 (en) | 2007-03-28 | 2012-03-13 | Kabushiki Kaisha Toshiba | Integrated memory management and memory management method |
JP5032172B2 (ja) * | 2007-03-28 | 2012-09-26 | 株式会社東芝 | 統合メモリ管理装置及び方法並びにデータ処理システム |
WO2008131058A2 (en) * | 2007-04-17 | 2008-10-30 | Rambus Inc. | Hybrid volatile and non-volatile memory device |
US8904098B2 (en) | 2007-06-01 | 2014-12-02 | Netlist, Inc. | Redundant backup using non-volatile memory |
US8301833B1 (en) | 2007-06-01 | 2012-10-30 | Netlist, Inc. | Non-volatile memory module |
US8874831B2 (en) * | 2007-06-01 | 2014-10-28 | Netlist, Inc. | Flash-DRAM hybrid memory module |
US8209479B2 (en) | 2007-07-18 | 2012-06-26 | Google Inc. | Memory circuit system and method |
DE102007038543B4 (de) * | 2007-08-16 | 2022-09-01 | Robert Bosch Gmbh | Begleit-Chip zur Anwendung in einer Motorsteuerung |
US8080874B1 (en) | 2007-09-14 | 2011-12-20 | Google Inc. | Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween |
US9201790B2 (en) * | 2007-10-09 | 2015-12-01 | Seagate Technology Llc | System and method of matching data rates |
US8209463B2 (en) * | 2008-02-05 | 2012-06-26 | Spansion Llc | Expansion slots for flash memory based random access memory subsystem |
US8332572B2 (en) * | 2008-02-05 | 2012-12-11 | Spansion Llc | Wear leveling mechanism using a DRAM buffer |
US8275945B2 (en) * | 2008-02-05 | 2012-09-25 | Spansion Llc | Mitigation of flash memory latency and bandwidth limitations via a write activity log and buffer |
US8352671B2 (en) * | 2008-02-05 | 2013-01-08 | Spansion Llc | Partial allocate paging mechanism using a controller and a buffer |
JP2009211192A (ja) * | 2008-02-29 | 2009-09-17 | Toshiba Corp | メモリシステム |
US8082384B2 (en) | 2008-03-26 | 2011-12-20 | Microsoft Corporation | Booting an electronic device using flash memory and a limited function memory controller |
US20090313416A1 (en) * | 2008-06-16 | 2009-12-17 | George Wayne Nation | Computer main memory incorporating volatile and non-volatile memory |
US10236032B2 (en) * | 2008-09-18 | 2019-03-19 | Novachips Canada Inc. | Mass data storage system with non-volatile memory modules |
US8599625B2 (en) | 2008-10-23 | 2013-12-03 | Marvell World Trade Ltd. | Switch pin multiplexing |
KR100987332B1 (ko) | 2008-11-07 | 2010-10-18 | 서울대학교산학협력단 | 메모리 구조에 따른 메모리 관리 장치 |
CN101510174B (zh) * | 2008-11-07 | 2012-05-02 | 慧帝科技(深圳)有限公司 | 一种快闪记忆体更新资料的管理方法及相关的记忆卡 |
US8370603B2 (en) | 2008-12-23 | 2013-02-05 | Apple Inc. | Architecture for address mapping of managed non-volatile memory |
US8327087B1 (en) * | 2008-12-31 | 2012-12-04 | Micron Technology, Inc. | Method and apparatus for an always open write-only register based memory mapped overlay interface for a nonvolatile memory |
US20140325129A1 (en) * | 2008-12-31 | 2014-10-30 | Micron Technology, Inc. | Method and apparatus for active range mapping for a nonvolatile memory device |
KR101583002B1 (ko) * | 2009-02-23 | 2016-01-21 | 삼성전자주식회사 | 컴퓨팅 시스템, 그것의 부팅 방법, 및 코드 데이터 피닝 방법 |
CN102063939B (zh) * | 2009-11-18 | 2015-01-28 | 中兴通讯股份有限公司 | 一种电可擦除可编程只读存储器的实现方法和装置 |
CN102110057B (zh) * | 2009-12-25 | 2013-05-08 | 澜起科技(上海)有限公司 | 存储器模组及存储器模组内的数据交换方法 |
US8612809B2 (en) | 2009-12-31 | 2013-12-17 | Intel Corporation | Systems, methods, and apparatuses for stacked memory |
JP5570619B2 (ja) | 2010-02-23 | 2014-08-13 | ラムバス・インコーポレーテッド | 異なるメモリ種類にアクセスする異なる速度での時分割多重化 |
US8924645B2 (en) | 2010-03-08 | 2014-12-30 | Hewlett-Packard Development Company, L. P. | Data storage apparatus and methods |
US20110255335A1 (en) * | 2010-04-20 | 2011-10-20 | Alessandro Grossi | Charge trap memory having limited charge diffusion |
US20120026802A1 (en) * | 2010-07-30 | 2012-02-02 | Emanuele Confalonieri | Managed hybrid memory with adaptive power supply |
KR101670055B1 (ko) * | 2010-08-30 | 2016-11-09 | 삼성전자 주식회사 | 디지털 영상 처리 장치의 제어 방법, 상기 방법을 적용한 디지털 영상 처리 장치, 상기 디지털 영상 처리 장치를 포함하는 통신 시스템 |
JP2012063874A (ja) * | 2010-09-14 | 2012-03-29 | Toshiba Corp | チップセレクト信号を切り替えるセレクタ、ストレージ装置、及び電子機器 |
KR20120028484A (ko) | 2010-09-15 | 2012-03-23 | 삼성전자주식회사 | 모바일 기기에 채용하기 적합한 복합형 반도체 장치 |
EP2453377A1 (en) * | 2010-11-15 | 2012-05-16 | Gemalto SA | Method of loading data into a portable secure token |
US10817421B2 (en) | 2010-12-13 | 2020-10-27 | Sandisk Technologies Llc | Persistent data structures |
US9208071B2 (en) * | 2010-12-13 | 2015-12-08 | SanDisk Technologies, Inc. | Apparatus, system, and method for accessing memory |
US10817502B2 (en) | 2010-12-13 | 2020-10-27 | Sandisk Technologies Llc | Persistent memory management |
US9141527B2 (en) * | 2011-02-25 | 2015-09-22 | Intelligent Intellectual Property Holdings 2 Llc | Managing cache pools |
US8930647B1 (en) | 2011-04-06 | 2015-01-06 | P4tents1, LLC | Multiple class memory systems |
US9158546B1 (en) | 2011-04-06 | 2015-10-13 | P4tents1, LLC | Computer program product for fetching from a first physical memory between an execution of a plurality of threads associated with a second physical memory |
US9176671B1 (en) | 2011-04-06 | 2015-11-03 | P4tents1, LLC | Fetching data between thread execution in a flash/DRAM/embedded DRAM-equipped system |
US9164679B2 (en) | 2011-04-06 | 2015-10-20 | Patents1, Llc | System, method and computer program product for multi-thread operation involving first memory of a first memory class and second memory of a second memory class |
US9170744B1 (en) | 2011-04-06 | 2015-10-27 | P4tents1, LLC | Computer program product for controlling a flash/DRAM/embedded DRAM-equipped system |
US10838646B2 (en) | 2011-07-28 | 2020-11-17 | Netlist, Inc. | Method and apparatus for presearching stored data |
US10380022B2 (en) | 2011-07-28 | 2019-08-13 | Netlist, Inc. | Hybrid memory module and system and method of operating the same |
US10198350B2 (en) | 2011-07-28 | 2019-02-05 | Netlist, Inc. | Memory module having volatile and non-volatile memory subsystems and method of operation |
US9417754B2 (en) | 2011-08-05 | 2016-08-16 | P4tents1, LLC | User interface system, method, and computer program product |
WO2013028859A1 (en) | 2011-08-24 | 2013-02-28 | Rambus Inc. | Methods and systems for mapping a peripheral function onto a legacy memory interface |
US9098209B2 (en) | 2011-08-24 | 2015-08-04 | Rambus Inc. | Communication via a memory interface |
US11048410B2 (en) | 2011-08-24 | 2021-06-29 | Rambus Inc. | Distributed procedure execution and file systems on a memory interface |
US8707104B1 (en) | 2011-09-06 | 2014-04-22 | Western Digital Technologies, Inc. | Systems and methods for error injection in data storage systems |
US9195530B1 (en) | 2011-09-06 | 2015-11-24 | Western Digital Technologies, Inc. | Systems and methods for improved data management in data storage systems |
US8700834B2 (en) | 2011-09-06 | 2014-04-15 | Western Digital Technologies, Inc. | Systems and methods for an enhanced controller architecture in data storage systems |
US8713357B1 (en) | 2011-09-06 | 2014-04-29 | Western Digital Technologies, Inc. | Systems and methods for detailed error reporting in data storage systems |
WO2013043602A2 (en) | 2011-09-19 | 2013-03-28 | SanDisk Technologies, Inc. | High endurance non-volatile storage |
KR20130032772A (ko) * | 2011-09-23 | 2013-04-02 | 삼성전자주식회사 | 하이브리드 메모리 장치, 이를 포함하는 컴퓨터 시스템, 및 하이브리드 메모리장치의 데이터 기입 및 독출 방법 |
US9053008B1 (en) | 2012-03-26 | 2015-06-09 | Western Digital Technologies, Inc. | Systems and methods for providing inline parameter service in data storage devices |
US9495308B2 (en) | 2012-05-22 | 2016-11-15 | Xockets, Inc. | Offloading of computation for rack level servers and corresponding methods and systems |
US20130318280A1 (en) | 2012-05-22 | 2013-11-28 | Xockets IP, LLC | Offloading of computation for rack level servers and corresponding methods and systems |
CN103456356A (zh) | 2012-05-31 | 2013-12-18 | 三星电子株式会社 | 半导体存储器装置和相关的操作方法 |
KR20130143210A (ko) * | 2012-06-21 | 2013-12-31 | 삼성전자주식회사 | 메모리 확장 장치 |
US9252996B2 (en) | 2012-06-21 | 2016-02-02 | Micron Technology, Inc. | Apparatuses and methods to change information values |
US20140101370A1 (en) | 2012-10-08 | 2014-04-10 | HGST Netherlands B.V. | Apparatus and method for low power low latency high capacity storage class memory |
US20140108705A1 (en) | 2012-10-12 | 2014-04-17 | Sandisk Technologies Inc. | Use of High Endurance Non-Volatile Memory for Read Acceleration |
KR101630583B1 (ko) | 2012-10-30 | 2016-06-14 | 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. | 스마트 메모리 버퍼 |
WO2014081719A1 (en) * | 2012-11-20 | 2014-05-30 | Peddle Charles I | Solid state drive architectures |
US9147461B1 (en) | 2012-11-28 | 2015-09-29 | Samsung Electronics Co., Ltd. | Semiconductor memory device performing a refresh operation, and memory system including the same |
US9280497B2 (en) * | 2012-12-21 | 2016-03-08 | Dell Products Lp | Systems and methods for support of non-volatile memory on a DDR memory channel |
US9250954B2 (en) | 2013-01-17 | 2016-02-02 | Xockets, Inc. | Offload processor modules for connection to system memory, and corresponding methods and systems |
US9378161B1 (en) | 2013-01-17 | 2016-06-28 | Xockets, Inc. | Full bandwidth packet handling with server systems including offload processors |
CN103970219B (zh) * | 2013-01-30 | 2018-03-20 | 鸿富锦精密电子(天津)有限公司 | 存储设备及支持所述存储设备的主板 |
KR101752583B1 (ko) | 2013-03-14 | 2017-07-11 | 마이크론 테크놀로지, 인크. | 트레이닝, 데이터 조직, 및/또는 섀도잉을 포함하는 메모리 시스템들 및 방법들 |
US10372551B2 (en) | 2013-03-15 | 2019-08-06 | Netlist, Inc. | Hybrid memory system with configurable error thresholds and failure analysis capability |
US9658783B2 (en) | 2013-03-27 | 2017-05-23 | Hitachi, Ltd. | DRAM having SDRAM interface and flash memory consolidated memory module |
CN105027092B (zh) * | 2013-03-27 | 2018-01-30 | 株式会社日立制作所 | 具有sdram接口的dram、混合闪存存储器模块 |
US9552176B2 (en) | 2013-04-12 | 2017-01-24 | Microsoft Technology Licensing, Llc | Block storage using a hybrid memory device |
US9436600B2 (en) | 2013-06-11 | 2016-09-06 | Svic No. 28 New Technology Business Investment L.L.P. | Non-volatile memory storage for multi-channel memory system |
WO2014203383A1 (ja) * | 2013-06-20 | 2014-12-24 | 株式会社日立製作所 | 異種メモリを混載したメモリモジュール、及びそれを搭載した情報処理装置 |
US9129674B2 (en) * | 2013-06-27 | 2015-09-08 | Intel Corporation | Hybrid memory device |
CN105340017A (zh) * | 2013-07-09 | 2016-02-17 | 惠普发展公司,有限责任合伙企业 | 对包括非兼容性存储器技术或与其接合的存储器模块的写入流控制 |
US9921980B2 (en) | 2013-08-12 | 2018-03-20 | Micron Technology, Inc. | Apparatuses and methods for configuring I/Os of memory for hybrid memory modules |
JP6090057B2 (ja) * | 2013-08-15 | 2017-03-08 | 富士ゼロックス株式会社 | 状態情報記録装置及びプログラム |
US10185515B2 (en) * | 2013-09-03 | 2019-01-22 | Qualcomm Incorporated | Unified memory controller for heterogeneous memory on a multi-chip package |
JP6072661B2 (ja) * | 2013-09-30 | 2017-02-01 | ルネサスエレクトロニクス株式会社 | データ処理装置、マイクロコントローラ、及び半導体装置 |
US11182284B2 (en) | 2013-11-07 | 2021-11-23 | Netlist, Inc. | Memory module having volatile and non-volatile memory subsystems and method of operation |
US10248328B2 (en) | 2013-11-07 | 2019-04-02 | Netlist, Inc. | Direct data move between DRAM and storage on a memory module |
CN105934747B (zh) * | 2013-11-07 | 2020-03-06 | 奈特力斯股份有限公司 | 混合内存模块以及操作混合内存模块的系统和方法 |
KR102195896B1 (ko) * | 2014-01-10 | 2020-12-28 | 삼성전자주식회사 | 디스크 캐시 제어 장치 및 방법 |
US9342402B1 (en) | 2014-01-28 | 2016-05-17 | Altera Corporation | Memory interface with hybrid error detection circuitry for modular designs |
US9237670B2 (en) | 2014-02-26 | 2016-01-12 | Samsung Electronics Co., Ltd. | Socket interposer and computer system using the socket |
CN103942159A (zh) * | 2014-03-19 | 2014-07-23 | 华中科技大学 | 一种基于混合存储设备的数据读写方法与装置 |
US9911477B1 (en) | 2014-04-18 | 2018-03-06 | Altera Corporation | Memory controller architecture with improved memory scheduling efficiency |
US20150347151A1 (en) * | 2014-05-28 | 2015-12-03 | Diablo Technologies Inc. | System and method for booting from a non-volatile memory |
US9811263B1 (en) | 2014-06-30 | 2017-11-07 | Altera Corporation | Memory controller architecture with improved memory scheduling efficiency |
US10430092B1 (en) * | 2014-07-28 | 2019-10-01 | Rambus Inc. | Memory controller systems with nonvolatile memory for storing operating parameters |
US9715453B2 (en) * | 2014-12-11 | 2017-07-25 | Intel Corporation | Computing method and apparatus with persistent memory |
US10318340B2 (en) * | 2014-12-31 | 2019-06-11 | Ati Technologies Ulc | NVRAM-aware data processing system |
KR102355436B1 (ko) * | 2015-01-09 | 2022-01-26 | 에스케이하이닉스 주식회사 | 데이터 저장 장치 |
KR102076196B1 (ko) * | 2015-04-14 | 2020-02-12 | 에스케이하이닉스 주식회사 | 메모리 시스템, 메모리 모듈 및 메모리 모듈의 동작 방법 |
WO2016171934A1 (en) * | 2015-04-20 | 2016-10-27 | Netlist, Inc. | Memory module and system and method of operation |
US10339081B2 (en) | 2015-05-09 | 2019-07-02 | Medtronic, Inc. | Methods and devices that utilize hardware to move blocks of operating parameter data from memory to a register set |
US10261697B2 (en) | 2015-06-08 | 2019-04-16 | Samsung Electronics Co., Ltd. | Storage device and operating method of storage device |
US9904490B2 (en) * | 2015-06-26 | 2018-02-27 | Toshiba Memory Corporation | Solid-state mass storage device and method for persisting volatile data to non-volatile media |
US10078448B2 (en) | 2015-07-08 | 2018-09-18 | Samsung Electronics Co., Ltd. | Electronic devices and memory management methods thereof |
US20170060434A1 (en) * | 2015-08-27 | 2017-03-02 | Samsung Electronics Co., Ltd. | Transaction-based hybrid memory module |
KR102367512B1 (ko) | 2015-09-08 | 2022-02-24 | 삼성전자주식회사 | 시스템 온 패키지 |
US10031674B2 (en) * | 2015-10-07 | 2018-07-24 | Samsung Electronics Co., Ltd. | DIMM SSD addressing performance techniques |
US10331586B2 (en) | 2015-10-30 | 2019-06-25 | Samsung Electronics Co., Ltd. | Nonvolatile memory device for providing fast booting and system including the same |
WO2017078681A1 (en) * | 2015-11-03 | 2017-05-11 | Hewlett-Packard Development Company, L.P. | Operating mode memory migration |
US9971511B2 (en) | 2016-01-06 | 2018-05-15 | Samsung Electronics Co., Ltd. | Hybrid memory module and transaction-based memory interface |
US20170220252A1 (en) * | 2016-01-29 | 2017-08-03 | Faraday&Future Inc. | Flash emulated eeprom wrapper |
US10146704B2 (en) * | 2016-02-16 | 2018-12-04 | Dell Products L.P. | Volatile/non-volatile memory device access provisioning system |
US10534619B2 (en) | 2016-02-26 | 2020-01-14 | Smart Modular Technologies, Inc. | Memory management system with multiple boot devices and method of operation thereof |
US10163508B2 (en) * | 2016-02-26 | 2018-12-25 | Intel Corporation | Supporting multiple memory types in a memory slot |
US10621119B2 (en) | 2016-03-03 | 2020-04-14 | Samsung Electronics Co., Ltd. | Asynchronous communication protocol compatible with synchronous DDR protocol |
US10592114B2 (en) | 2016-03-03 | 2020-03-17 | Samsung Electronics Co., Ltd. | Coordinated in-module RAS features for synchronous DDR compatible memory |
US10310547B2 (en) * | 2016-03-05 | 2019-06-04 | Intel Corporation | Techniques to mirror a command/address or interpret command/address logic at a memory device |
US10810144B2 (en) * | 2016-06-08 | 2020-10-20 | Samsung Electronics Co., Ltd. | System and method for operating a DRR-compatible asynchronous memory module |
US10692555B2 (en) | 2016-06-29 | 2020-06-23 | Samsung Electronics Co., Ltd. | Semiconductor memory devices enabling read strobe mode and related methods of operating semiconductor memory devices |
US10186309B2 (en) | 2016-06-29 | 2019-01-22 | Samsung Electronics Co., Ltd. | Methods of operating semiconductor memory devices and semiconductor memory devices |
KR102554496B1 (ko) | 2016-07-14 | 2023-07-13 | 에스케이하이닉스 주식회사 | 복수개의 메모리 모듈을 포함하는 데이터 처리 시스템 |
US10282108B2 (en) * | 2016-08-31 | 2019-05-07 | Micron Technology, Inc. | Hybrid memory device using different types of capacitors |
US9916256B1 (en) | 2016-09-12 | 2018-03-13 | Toshiba Memory Corporation | DDR storage adapter |
KR20180030329A (ko) * | 2016-09-13 | 2018-03-22 | 에스케이하이닉스 주식회사 | 메모리 시스템 및 메모리 시스템의 동작방법 |
US10552053B2 (en) | 2016-09-28 | 2020-02-04 | Seagate Technology Llc | Hybrid data storage device with performance mode data path |
DE102017105155B4 (de) | 2016-11-11 | 2023-09-07 | Sandisk Technologies Llc | Schnittstelle für einen nichtflüchtigen speicher |
CN108121664A (zh) * | 2016-11-28 | 2018-06-05 | 慧荣科技股份有限公司 | 数据储存装置以及其操作方法 |
KR20180078512A (ko) | 2016-12-30 | 2018-07-10 | 삼성전자주식회사 | 반도체 장치 |
JP6391719B2 (ja) * | 2017-01-10 | 2018-09-19 | マイクロン テクノロジー, インク. | トレーニング、データ再構築および/またはシャドウィングを含むメモリシステムおよび方法 |
US10977057B2 (en) | 2017-01-23 | 2021-04-13 | Via Labs, Inc. | Electronic apparatus capable of collectively managing different firmware codes and operation method thereof |
US11175853B2 (en) * | 2017-05-09 | 2021-11-16 | Samsung Electronics Co., Ltd. | Systems and methods for write and flush support in hybrid memory |
US10496584B2 (en) * | 2017-05-11 | 2019-12-03 | Samsung Electronics Co., Ltd. | Memory system for supporting internal DQ termination of data buffer |
US10403342B2 (en) * | 2017-06-20 | 2019-09-03 | Aspiring Sky Co. Limited | Hybrid flash memory structure |
US10845866B2 (en) * | 2017-06-22 | 2020-11-24 | Micron Technology, Inc. | Non-volatile memory system or sub-system |
ES2827790T3 (es) * | 2017-08-21 | 2021-05-24 | Carrier Corp | Sistema antiincendios y de seguridad que incluye bucle accesible por dirección y mejora automática de firmware |
KR102412609B1 (ko) | 2017-11-03 | 2022-06-23 | 삼성전자주식회사 | 내부 커맨드에 따른 어드레스에 대한 저장 및 출력 제어를 수행하는 메모리 장치 및 그 동작방법 |
KR102101622B1 (ko) * | 2017-12-06 | 2020-04-17 | 주식회사 멤레이 | 메모리 제어 장치 및 이를 포함하는 컴퓨팅 디바이스 |
US11216370B2 (en) * | 2018-02-20 | 2022-01-04 | Medtronic, Inc. | Methods and devices that utilize hardware to move blocks of operating parameter data from memory to a register set |
KR20190105337A (ko) | 2018-03-05 | 2019-09-17 | 삼성전자주식회사 | 반도체 메모리 장치 |
US10534731B2 (en) * | 2018-03-19 | 2020-01-14 | Micron Technology, Inc. | Interface for memory having a cache and multiple independent arrays |
US10705963B2 (en) | 2018-03-21 | 2020-07-07 | Micron Technology, Inc. | Latency-based storage in a hybrid memory system |
TWI668575B (zh) * | 2018-07-26 | 2019-08-11 | 慧榮科技股份有限公司 | 資料儲存裝置以及非揮發式記憶體控制方法 |
US10977198B2 (en) | 2018-09-12 | 2021-04-13 | Micron Technology, Inc. | Hybrid memory system interface |
CN111512374B (zh) * | 2018-10-16 | 2022-11-11 | 华为技术有限公司 | 一种混合存储设备及访问方法 |
US11048654B2 (en) * | 2018-10-24 | 2021-06-29 | Innogrit Technologies Co., Ltd. | Systems and methods for providing multiple memory channels with one set of shared address pins on the physical interface |
KR20210017109A (ko) | 2019-08-07 | 2021-02-17 | 삼성전자주식회사 | 스토리지 장치 |
RU2757659C1 (ru) * | 2020-06-16 | 2021-10-19 | Александр Георгиевич Носков | Накопитель магнитный с разделёнными областями |
KR20220029914A (ko) | 2020-09-02 | 2022-03-10 | 삼성전자주식회사 | 펄스 진폭 변조 기반 데이터 스트로브 신호를 생성하는 메모리 장치, 메모리 컨트롤러 및 이들을 포함하는 메모리 시스템 |
US20220083252A1 (en) * | 2020-09-14 | 2022-03-17 | Micron Technology, Inc. | Indication-based avoidance of defective memory cells |
CN112199045A (zh) * | 2020-10-12 | 2021-01-08 | 长江存储科技有限责任公司 | 存储装置以及数据操作方法 |
KR20220077400A (ko) | 2020-12-02 | 2022-06-09 | 삼성전자주식회사 | 메모리 장치, 메모리 시스템 및 이의 동작 방법 |
US11803326B2 (en) * | 2021-04-23 | 2023-10-31 | Macronix International Co., Ltd. | Implementing a read setup burst command in 3D NAND flash memory to reduce voltage threshold deviation over time |
KR102483906B1 (ko) * | 2021-07-14 | 2022-12-30 | 서울시립대학교 산학협력단 | Nand 플래시 메모리와 sram이 융합된 nas 메모리 셀 및 이를 이용한 nas 메모리 어레이 |
CN116955241B (zh) * | 2023-09-21 | 2024-01-05 | 杭州智灵瞳人工智能有限公司 | 兼容多类型存储介质的存储芯片 |
Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4995004A (en) | 1989-05-15 | 1991-02-19 | Dallas Semiconductor Corporation | RAM/ROM hybrid memory architecture |
JPH05299616A (ja) * | 1992-04-16 | 1993-11-12 | Hitachi Ltd | 半導体記憶装置 |
JPH06195258A (ja) * | 1992-07-08 | 1994-07-15 | Nec Corp | 半導体記憶装置 |
US5696917A (en) | 1994-06-03 | 1997-12-09 | Intel Corporation | Method and apparatus for performing burst read operations in an asynchronous nonvolatile memory |
US5701433A (en) * | 1994-10-14 | 1997-12-23 | Compaq Computer Corporation | Computer system having a memory controller which performs readahead operations which can be aborted prior to completion |
US5634112A (en) * | 1994-10-14 | 1997-05-27 | Compaq Computer Corporation | Memory controller having precharge prediction based on processor and PCI bus cycles |
US6741494B2 (en) | 1995-04-21 | 2004-05-25 | Mark B. Johnson | Magnetoelectronic memory element with inductively coupled write wires |
US5864671A (en) | 1996-07-01 | 1999-01-26 | Sun Microsystems, Inc. | Hybrid memory access protocol for servicing memory access request by ascertaining whether the memory block is currently cached in determining which protocols to be used |
US6418506B1 (en) * | 1996-12-31 | 2002-07-09 | Intel Corporation | Integrated circuit memory and method for transferring data using a volatile memory to buffer data for a nonvolatile memory array |
US6850995B1 (en) * | 1999-01-25 | 2005-02-01 | Canon Kabushiki Kaisha | Control unit selectively connected with a first bus and a second bus for controlling a displaying process in parallel with a scanning process |
US6380581B1 (en) | 1999-02-26 | 2002-04-30 | Micron Technology, Inc. | DRAM technology compatible non volatile memory cells with capacitors connected to the gates of the transistors |
KR100313514B1 (ko) * | 1999-05-11 | 2001-11-17 | 김영환 | 하이브리드 메모리 장치 |
KR100383774B1 (ko) | 2000-01-26 | 2003-05-12 | 삼성전자주식회사 | 공통 인터페이스 방식의 메모리 장치들을 구비한 시스템 |
US7073014B1 (en) | 2000-07-28 | 2006-07-04 | Micron Technology, Inc. | Synchronous non-volatile memory system |
JP3871853B2 (ja) * | 2000-05-26 | 2007-01-24 | 株式会社ルネサステクノロジ | 半導体装置及びその動作方法 |
JP2002259443A (ja) * | 2001-02-28 | 2002-09-13 | Ricoh Co Ltd | 文書管理システム、文書検索方法および文書検索プログラム |
US6327207B1 (en) * | 2001-04-09 | 2001-12-04 | Lsi Logic Corporation | Synchronizing data operations across a synchronization boundary between different clock domains using two-hot encoding |
TWI240864B (en) * | 2001-06-13 | 2005-10-01 | Hitachi Ltd | Memory device |
JP4059002B2 (ja) * | 2001-06-13 | 2008-03-12 | 株式会社日立製作所 | メモリ装置 |
JP2003006041A (ja) | 2001-06-20 | 2003-01-10 | Hitachi Ltd | 半導体装置 |
US6670234B2 (en) | 2001-06-22 | 2003-12-30 | International Business Machines Corporation | Method of integrating volatile and non-volatile memory cells on the same substrate and a semiconductor memory device thereof |
US7533214B2 (en) * | 2002-02-27 | 2009-05-12 | Microsoft Corporation | Open architecture flash driver |
US6799231B2 (en) * | 2002-10-22 | 2004-09-28 | Asix Electronics Corp. | Virtual I/O device coupled to memory controller |
CN1717662B (zh) * | 2002-11-28 | 2010-04-28 | 株式会社瑞萨科技 | 存储器模块、存储器系统和信息仪器 |
US7752380B2 (en) | 2003-07-31 | 2010-07-06 | Sandisk Il Ltd | SDRAM memory device with an embedded NAND flash controller |
US6859068B1 (en) * | 2003-08-08 | 2005-02-22 | Sun Microsystems, Inc. | Self-correcting I/O interface driver scheme for memory interface |
US7171526B2 (en) | 2003-11-07 | 2007-01-30 | Freescale Semiconductor, Inc. | Memory controller useable in a data processing system |
US6862206B1 (en) * | 2003-12-19 | 2005-03-01 | Hewlett-Packard Development Company, L.P. | Memory module hybridizing an atomic resolution storage (ARS) memory and a magnetic memory |
KR101085406B1 (ko) | 2004-02-16 | 2011-11-21 | 삼성전자주식회사 | 불 휘발성 메모리를 제어하기 위한 컨트롤러 |
US20050204091A1 (en) | 2004-03-11 | 2005-09-15 | Kilbuck Kevin M. | Non-volatile memory with synchronous DRAM interface |
US20060184710A1 (en) * | 2005-02-17 | 2006-08-17 | Nokia Inc. | Bridge between a single channel high speed bus and a multiple channel low speed bus |
US20060294295A1 (en) * | 2005-06-24 | 2006-12-28 | Yukio Fukuzo | DRAM chip device well-communicated with flash memory chip and multi-chip package comprising such a device |
US7360022B2 (en) * | 2005-12-29 | 2008-04-15 | Intel Corporation | Synchronizing an instruction cache and a data cache on demand |
WO2008131058A2 (en) * | 2007-04-17 | 2008-10-30 | Rambus Inc. | Hybrid volatile and non-volatile memory device |
-
2006
- 2006-06-07 US US11/449,435 patent/US7716411B2/en active Active
-
2007
- 2007-04-13 TW TW096113112A patent/TWI420302B/zh not_active IP Right Cessation
- 2007-06-01 CN CN2007800212183A patent/CN101473438B/zh active Active
- 2007-06-01 RU RU2008148129/08A patent/RU2442211C2/ru active
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- 2007-06-01 KR KR1020087029847A patent/KR101159400B1/ko active IP Right Grant
- 2007-06-01 BR BRPI0711731-0A patent/BRPI0711731A2/pt not_active Application Discontinuation
- 2007-06-01 JP JP2009514323A patent/JP2009540431A/ja active Pending
- 2007-06-01 WO PCT/US2007/013127 patent/WO2007145883A1/en active Application Filing
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- 2010-04-30 US US12/771,670 patent/US8423700B2/en active Active
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- 2011-05-18 JP JP2011111408A patent/JP5613103B2/ja active Active
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8812744B1 (en) | 2013-03-14 | 2014-08-19 | Microsoft Corporation | Assigning priorities to data for hybrid drives |
US8990441B2 (en) | 2013-03-14 | 2015-03-24 | Microsoft Technology Licensing, Llc | Assigning priorities to data for hybrid drives |
US9323460B2 (en) | 2013-03-14 | 2016-04-26 | Microsoft Technology Licensing, Llc | Assigning priorities to data for hybrid drives |
US9626126B2 (en) | 2013-04-24 | 2017-04-18 | Microsoft Technology Licensing, Llc | Power saving mode hybrid drive access management |
US9946495B2 (en) | 2013-04-25 | 2018-04-17 | Microsoft Technology Licensing, Llc | Dirty data management for hybrid drives |
CN111399752A (zh) * | 2019-01-03 | 2020-07-10 | 慧荣科技股份有限公司 | 不同类型存储单元的控制装置及方法 |
US11748022B2 (en) | 2019-01-03 | 2023-09-05 | Silicon Motion, Inc. | Method and apparatus for controlling different types of storage units |
CN111399752B (zh) * | 2019-01-03 | 2023-11-28 | 慧荣科技股份有限公司 | 不同类型存储单元的控制装置及方法 |
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EP2025001A1 (en) | 2009-02-18 |
US20070288683A1 (en) | 2007-12-13 |
US20100217924A1 (en) | 2010-08-26 |
JP2009540431A (ja) | 2009-11-19 |
TWI420302B (zh) | 2013-12-21 |
BRPI0711731A2 (pt) | 2011-11-29 |
RU2442211C2 (ru) | 2012-02-10 |
JP2011181098A (ja) | 2011-09-15 |
EP2025001A4 (en) | 2010-07-28 |
CN101473438A (zh) | 2009-07-01 |
KR101159400B1 (ko) | 2012-06-28 |
JP5613103B2 (ja) | 2014-10-22 |
WO2007145883A1 (en) | 2007-12-21 |
EP2025001B1 (en) | 2019-01-23 |
CN101473438B (zh) | 2012-06-13 |
ES2718463T3 (es) | 2019-07-02 |
KR20090026276A (ko) | 2009-03-12 |
US8423700B2 (en) | 2013-04-16 |
MX2008014859A (es) | 2008-12-01 |
TW200745848A (en) | 2007-12-16 |
US7716411B2 (en) | 2010-05-11 |
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