NO320484B1 - Halvlederinnretning med passiveringsfilm - Google Patents

Halvlederinnretning med passiveringsfilm Download PDF

Info

Publication number
NO320484B1
NO320484B1 NO19974001A NO974001A NO320484B1 NO 320484 B1 NO320484 B1 NO 320484B1 NO 19974001 A NO19974001 A NO 19974001A NO 974001 A NO974001 A NO 974001A NO 320484 B1 NO320484 B1 NO 320484B1
Authority
NO
Norway
Prior art keywords
layer
sion
passivation film
si3n4
semiconductor device
Prior art date
Application number
NO19974001A
Other languages
English (en)
Norwegian (no)
Other versions
NO974001D0 (no
NO974001L (no
Inventor
Hiroyuki Seto
Shogo Yoshida
Original Assignee
Murata Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP23153596A external-priority patent/JP3246348B2/ja
Priority claimed from JP23153696A external-priority patent/JP3259641B2/ja
Application filed by Murata Manufacturing Co filed Critical Murata Manufacturing Co
Publication of NO974001D0 publication Critical patent/NO974001D0/no
Publication of NO974001L publication Critical patent/NO974001L/no
Publication of NO320484B1 publication Critical patent/NO320484B1/no

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3192Multilayer coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13063Metal-Semiconductor Field-Effect Transistor [MESFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/141Analog devices
    • H01L2924/1423Monolithic Microwave Integrated Circuit [MMIC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
NO19974001A 1996-09-02 1997-09-01 Halvlederinnretning med passiveringsfilm NO320484B1 (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP23153596A JP3246348B2 (ja) 1996-09-02 1996-09-02 半導体装置の保護膜構造
JP23153696A JP3259641B2 (ja) 1996-09-02 1996-09-02 半導体装置の保護膜構造

Publications (3)

Publication Number Publication Date
NO974001D0 NO974001D0 (no) 1997-09-01
NO974001L NO974001L (no) 1998-03-03
NO320484B1 true NO320484B1 (no) 2005-12-12

Family

ID=26529938

Family Applications (1)

Application Number Title Priority Date Filing Date
NO19974001A NO320484B1 (no) 1996-09-02 1997-09-01 Halvlederinnretning med passiveringsfilm

Country Status (5)

Country Link
US (1) US6388310B1 (fr)
EP (1) EP0827199A3 (fr)
KR (1) KR100370916B1 (fr)
CA (1) CA2213034C (fr)
NO (1) NO320484B1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2783530B1 (fr) * 1998-09-21 2001-08-31 Commissariat Energie Atomique Procede de preparation, par nitruration, d'un substrat de silicium pour la formation d'une couche isolante mince
EP1364405A4 (fr) * 2001-01-30 2008-12-24 Ma Com Inc Dispositif semiconducteur haute tension
US7607560B2 (en) 2004-05-14 2009-10-27 Intevac, Inc. Semiconductor die attachment for high vacuum tubes
US7012328B2 (en) * 2004-05-14 2006-03-14 Intevac, Inc. Semiconductor die attachment for high vacuum tubes
JP2006043813A (ja) * 2004-08-04 2006-02-16 Denso Corp 保護膜付きマイクロシステム構造体及びその製造方法
JP4898497B2 (ja) * 2006-03-27 2012-03-14 キヤノン株式会社 有機発光装置およびその製造方法
US20070262379A1 (en) * 2006-05-15 2007-11-15 Chin-Chuan Lai Metal structure of glass substrate and formation thereof
US10297557B2 (en) * 2017-06-30 2019-05-21 Sanken Electric Co., Ltd. Semiconductor device and method for manufacturing the semiconductor device
JP6846687B2 (ja) * 2017-09-12 2021-03-24 パナソニックIpマネジメント株式会社 半導体装置およびその製造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4097889A (en) * 1976-11-01 1978-06-27 Rca Corporation Combination glass/low temperature deposited Siw Nx Hy O.sub.z
EP0072603B1 (fr) * 1978-06-14 1986-10-01 Fujitsu Limited Procédé de fabrication d'un dispositif semiconducteur muni d'une couche isolante de dioxyde de silicium couverte d'une couche d'oxynitrure de silicium
US4438157A (en) * 1980-12-05 1984-03-20 Ncr Corporation Process for forming MNOS dual dielectric structure
JPS63184340A (ja) * 1986-09-08 1988-07-29 Nec Corp 半導体装置
JPH01187933A (ja) * 1988-01-22 1989-07-27 Mitsubishi Electric Corp 半導体装置の製造方法
JPH01228135A (ja) 1988-03-09 1989-09-12 Nec Corp 半導体装置
US4959705A (en) * 1988-10-17 1990-09-25 Ford Microelectronics, Inc. Three metal personalization of application specific monolithic microwave integrated circuit
JPH03268430A (ja) 1990-03-19 1991-11-29 Kawasaki Steel Corp 半導体装置の保護膜構造
JP2814009B2 (ja) * 1990-06-05 1998-10-22 三菱電機株式会社 半導体装置の製造方法
JPH0645316A (ja) 1992-07-23 1994-02-18 Nec Corp 半導体装置およびその製造方法
JPH0845926A (ja) * 1994-07-26 1996-02-16 Sony Corp 半導体装置およびその製造方法
US5472913A (en) * 1994-08-05 1995-12-05 Texas Instruments Incorporated Method of fabricating porous dielectric material with a passivation layer for electronics applications
US5710067A (en) * 1995-06-07 1998-01-20 Advanced Micro Devices, Inc. Silicon oxime film
US5686329A (en) * 1995-12-29 1997-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming a metal oxide semiconductor field effect transistor (MOSFET) having improved hot carrier immunity
US5869396A (en) * 1996-07-15 1999-02-09 Chartered Semiconductor Manufacturing Ltd. Method for forming a polycide gate electrode

Also Published As

Publication number Publication date
NO974001D0 (no) 1997-09-01
CA2213034A1 (fr) 1998-03-02
EP0827199A3 (fr) 2005-10-19
KR100370916B1 (ko) 2003-03-15
KR19980024277A (ko) 1998-07-06
CA2213034C (fr) 2002-12-17
NO974001L (no) 1998-03-03
US6388310B1 (en) 2002-05-14
EP0827199A2 (fr) 1998-03-04

Similar Documents

Publication Publication Date Title
KR970030682A (ko) 반도체장치 및 그 제조방법
KR960005761A (ko) 반도체장치
KR20010029846A (ko) 수소 배리어 층을 갖는 반도체 장치
KR970052233A (ko) 메탈 콘택 형성방법
JP2016522982A (ja) モノリシック集積回路(mmic)構造およびかかる構造を形成することに関する方法
NO320484B1 (no) Halvlederinnretning med passiveringsfilm
KR940020531A (ko) 콘택홀에 금속플러그 제조방법
CN106847895A (zh) 基于TiN/Cu/Ni栅电极的GaN基高电子迁移率晶体管及制作方法
US7375774B2 (en) Method of manufacturing semiconductor device
KR20030058853A (ko) 반도체 소자의 플러그 형성 방법
CN106601624B (zh) 一种化合物半导体的金属连线方法及结构
NO321590B1 (no) Substrat med passiveringsfilm
JPH08255835A (ja) 半導体素子のプラグ形成方法
JP2003133412A (ja) 銅に対する誘電体層の接着改良方法
CN110036489A (zh) 氮化物类电子器件及其制造方法
US6127268A (en) Process for fabricating a semiconductor device with a patterned metal layer
KR100248621B1 (ko) 반도체소자의 제조방법
KR100227622B1 (ko) 반도체 소자의 비트 라인 형성 방법
KR100187685B1 (ko) 반도체 소자의 금속층 형성 방법
JPH0485954A (ja) 半導体装置の製造方法
KR100532981B1 (ko) 반도체소자 식각방법
KR970003475A (ko) 반도체 소자의 금속 배선 방법
JPH0290616A (ja) 層間絶縁膜スルーホール形成方法
KR20050032305A (ko) 반도체소자의 금속배선 형성방법
JPH043962A (ja) 半導体装置およびその製造方法