NO974001L - Halvledersubstrat med passiveringsfilm - Google Patents
Halvledersubstrat med passiveringsfilmInfo
- Publication number
- NO974001L NO974001L NO974001A NO974001A NO974001L NO 974001 L NO974001 L NO 974001L NO 974001 A NO974001 A NO 974001A NO 974001 A NO974001 A NO 974001A NO 974001 L NO974001 L NO 974001L
- Authority
- NO
- Norway
- Prior art keywords
- passivation film
- layer
- substrate
- semiconductor substrate
- sin
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title abstract 6
- 238000002161 passivation Methods 0.000 title abstract 4
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 3
- 239000000853 adhesive Substances 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3192—Multilayer coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13063—Metal-Semiconductor Field-Effect Transistor [MESFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/1423—Monolithic Microwave Integrated Circuit [MMIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Halvlederinnretning i form av et sub-strat (2) med en pålagt passiveringsfilm (3, 9) på en overflate. Filmen har et SiON-lag (4, 10) i kontakt med substrat-overflaten, og et SiN-lag (5, 11) på yttersiden av SiON-laget.Passiveringsfilmen har særlig et ytterste lag (11) av SiN, og dette lag har en del i kontakt med substratet (2) eller det blottlagte areal (111, 112) av SiON-laget (107) er nitrert.Substratet har god heftstyrke mellom passiveringsfilmen (3, 9) og substratover-flaten, og man har oppnådd god motstands-dyktighet overfor fuktighet.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23153596A JP3246348B2 (ja) | 1996-09-02 | 1996-09-02 | 半導体装置の保護膜構造 |
JP23153696A JP3259641B2 (ja) | 1996-09-02 | 1996-09-02 | 半導体装置の保護膜構造 |
Publications (3)
Publication Number | Publication Date |
---|---|
NO974001D0 NO974001D0 (no) | 1997-09-01 |
NO974001L true NO974001L (no) | 1998-03-03 |
NO320484B1 NO320484B1 (no) | 2005-12-12 |
Family
ID=26529938
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NO19974001A NO320484B1 (no) | 1996-09-02 | 1997-09-01 | Halvlederinnretning med passiveringsfilm |
Country Status (5)
Country | Link |
---|---|
US (1) | US6388310B1 (no) |
EP (1) | EP0827199A3 (no) |
KR (1) | KR100370916B1 (no) |
CA (1) | CA2213034C (no) |
NO (1) | NO320484B1 (no) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2783530B1 (fr) * | 1998-09-21 | 2001-08-31 | Commissariat Energie Atomique | Procede de preparation, par nitruration, d'un substrat de silicium pour la formation d'une couche isolante mince |
EP1364405A4 (en) * | 2001-01-30 | 2008-12-24 | Ma Com Inc | HIGH VOLTAGE SEMICONDUCTOR DEVICE |
US7607560B2 (en) | 2004-05-14 | 2009-10-27 | Intevac, Inc. | Semiconductor die attachment for high vacuum tubes |
US7012328B2 (en) * | 2004-05-14 | 2006-03-14 | Intevac, Inc. | Semiconductor die attachment for high vacuum tubes |
JP2006043813A (ja) * | 2004-08-04 | 2006-02-16 | Denso Corp | 保護膜付きマイクロシステム構造体及びその製造方法 |
JP4898497B2 (ja) * | 2006-03-27 | 2012-03-14 | キヤノン株式会社 | 有機発光装置およびその製造方法 |
US20070262379A1 (en) * | 2006-05-15 | 2007-11-15 | Chin-Chuan Lai | Metal structure of glass substrate and formation thereof |
US10297557B2 (en) * | 2017-06-30 | 2019-05-21 | Sanken Electric Co., Ltd. | Semiconductor device and method for manufacturing the semiconductor device |
JP6846687B2 (ja) * | 2017-09-12 | 2021-03-24 | パナソニックIpマネジメント株式会社 | 半導体装置およびその製造方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4097889A (en) * | 1976-11-01 | 1978-06-27 | Rca Corporation | Combination glass/low temperature deposited Siw Nx Hy O.sub.z |
EP0072603B1 (en) * | 1978-06-14 | 1986-10-01 | Fujitsu Limited | Process for producing a semiconductor device having an insulating layer of silicon dioxide covered by a film of silicon oxynitride |
US4438157A (en) * | 1980-12-05 | 1984-03-20 | Ncr Corporation | Process for forming MNOS dual dielectric structure |
JPS63184340A (ja) * | 1986-09-08 | 1988-07-29 | Nec Corp | 半導体装置 |
JPH01187933A (ja) * | 1988-01-22 | 1989-07-27 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JPH01228135A (ja) | 1988-03-09 | 1989-09-12 | Nec Corp | 半導体装置 |
US4959705A (en) * | 1988-10-17 | 1990-09-25 | Ford Microelectronics, Inc. | Three metal personalization of application specific monolithic microwave integrated circuit |
JPH03268430A (ja) | 1990-03-19 | 1991-11-29 | Kawasaki Steel Corp | 半導体装置の保護膜構造 |
JP2814009B2 (ja) * | 1990-06-05 | 1998-10-22 | 三菱電機株式会社 | 半導体装置の製造方法 |
JPH0645316A (ja) | 1992-07-23 | 1994-02-18 | Nec Corp | 半導体装置およびその製造方法 |
JPH0845926A (ja) * | 1994-07-26 | 1996-02-16 | Sony Corp | 半導体装置およびその製造方法 |
US5472913A (en) * | 1994-08-05 | 1995-12-05 | Texas Instruments Incorporated | Method of fabricating porous dielectric material with a passivation layer for electronics applications |
US5710067A (en) * | 1995-06-07 | 1998-01-20 | Advanced Micro Devices, Inc. | Silicon oxime film |
US5686329A (en) * | 1995-12-29 | 1997-11-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for forming a metal oxide semiconductor field effect transistor (MOSFET) having improved hot carrier immunity |
US5869396A (en) * | 1996-07-15 | 1999-02-09 | Chartered Semiconductor Manufacturing Ltd. | Method for forming a polycide gate electrode |
-
1997
- 1997-08-14 CA CA002213034A patent/CA2213034C/en not_active Expired - Fee Related
- 1997-08-27 US US08/921,199 patent/US6388310B1/en not_active Expired - Fee Related
- 1997-08-29 EP EP97115041A patent/EP0827199A3/en not_active Withdrawn
- 1997-09-01 NO NO19974001A patent/NO320484B1/no unknown
- 1997-09-02 KR KR1019970045543A patent/KR100370916B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
NO974001D0 (no) | 1997-09-01 |
CA2213034A1 (en) | 1998-03-02 |
NO320484B1 (no) | 2005-12-12 |
EP0827199A3 (en) | 2005-10-19 |
KR100370916B1 (ko) | 2003-03-15 |
KR19980024277A (ko) | 1998-07-06 |
CA2213034C (en) | 2002-12-17 |
US6388310B1 (en) | 2002-05-14 |
EP0827199A2 (en) | 1998-03-04 |
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