JPS562663A - Input output protective device for semiconductor ic - Google Patents
Input output protective device for semiconductor icInfo
- Publication number
- JPS562663A JPS562663A JP7946379A JP7946379A JPS562663A JP S562663 A JPS562663 A JP S562663A JP 7946379 A JP7946379 A JP 7946379A JP 7946379 A JP7946379 A JP 7946379A JP S562663 A JPS562663 A JP S562663A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- bonding pad
- semiconductor
- protective device
- input output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 230000001681 protective effect Effects 0.000 title 1
- 239000010410 layer Substances 0.000 abstract 13
- 238000009792 diffusion process Methods 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 230000035515 penetration Effects 0.000 abstract 1
- 239000011241 protective layer Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To prevent an Al intrusion to a diffusion layer when an excessive voltage is applied to a pad by interpositioning a polycrystalline Si layer between the Al wiring layer which is connected to the bonding pad and the diffusion layer in a semiconductor substrate when the former is connected to the latter. CONSTITUTION:When installing the Al wiring layer 71, one end of which is connected to the bonding pad, on a reverce conductive type diffusion layer 74 formed on a semiconductor substrate 75, the following procedures are performed. A protective layer 73, consisted of a polycrystalline Si, is connected to one end of the layer 74 and an SiO2 film 72 is coated on the whole surface while the embedding of the said layer 74 is performed. Then, a hole is made on the film 72 corresponding to the other end of the layer 73 and the other end of an Al wiring layer 71, one end of which is connected to the bonding pad, is installed to the said hole while connecting it to the layer 73. In such way, the penetration of the Al to the layer 74 and the substrate 75, through the layer 74, is prevented and the input or the output of the IC and be protected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7946379A JPS562663A (en) | 1979-06-20 | 1979-06-20 | Input output protective device for semiconductor ic |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7946379A JPS562663A (en) | 1979-06-20 | 1979-06-20 | Input output protective device for semiconductor ic |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS562663A true JPS562663A (en) | 1981-01-12 |
Family
ID=13690571
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7946379A Pending JPS562663A (en) | 1979-06-20 | 1979-06-20 | Input output protective device for semiconductor ic |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS562663A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4819046A (en) * | 1986-05-22 | 1989-04-04 | Nec Corporation | Integrated circuit with improved protective device |
| US4922316A (en) * | 1985-05-17 | 1990-05-01 | Nec Corporation | Infant protection device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5278382A (en) * | 1975-12-25 | 1977-07-01 | Nec Corp | Semiconductor device |
-
1979
- 1979-06-20 JP JP7946379A patent/JPS562663A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5278382A (en) * | 1975-12-25 | 1977-07-01 | Nec Corp | Semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4922316A (en) * | 1985-05-17 | 1990-05-01 | Nec Corporation | Infant protection device |
| US4819046A (en) * | 1986-05-22 | 1989-04-04 | Nec Corporation | Integrated circuit with improved protective device |
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