JPS5480090A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5480090A
JPS5480090A JP14786477A JP14786477A JPS5480090A JP S5480090 A JPS5480090 A JP S5480090A JP 14786477 A JP14786477 A JP 14786477A JP 14786477 A JP14786477 A JP 14786477A JP S5480090 A JPS5480090 A JP S5480090A
Authority
JP
Japan
Prior art keywords
film
layer
region
hole
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14786477A
Other languages
Japanese (ja)
Other versions
JPS616555B2 (en
Inventor
Yutaka Onda
Hideto Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14786477A priority Critical patent/JPS5480090A/en
Publication of JPS5480090A publication Critical patent/JPS5480090A/en
Publication of JPS616555B2 publication Critical patent/JPS616555B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps

Abstract

PURPOSE:To secure protection for the gate insulating film against the overvoltage caused by the static electricity and other factors by carrying out the connectio between the Al external lead-out electrode and the input draw-out poly-crystal Si wiring on the thick oxide film and furthermore securing a space of over 10mum for the joints across the wiring. CONSTITUTION:Protective resistance region 19 is formed through diffusion on semiconductor substrate 27, and SiO2 film 24 is provided on the entire surface. The thickness of film 24 is reduced on rigion 19, and the both end surface of region 19 are exposed. Then poly-crystal Si wiring layer 17 doped with the impurity plus layer 20to become the gate electrode later are coated from the exposed area through onto film 24 at region 19, and gate oxide film 25 is coated over these layes. Hole 18 is drilled to film 25 on Si layer 17 at one side, and Al external lead-out electrode 16 connecting to layer 17 is coated with position-matching to film 24 and piercing through hole 18. In this case, a distance of over 10mum is secured between hole 18 and joint 21 of layer 17 and region 19. As a result, film 25 is never broken down even with the fusing of electrode 16.
JP14786477A 1977-12-08 1977-12-08 Semiconductor device Granted JPS5480090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14786477A JPS5480090A (en) 1977-12-08 1977-12-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14786477A JPS5480090A (en) 1977-12-08 1977-12-08 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5480090A true JPS5480090A (en) 1979-06-26
JPS616555B2 JPS616555B2 (en) 1986-02-27

Family

ID=15439963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14786477A Granted JPS5480090A (en) 1977-12-08 1977-12-08 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5480090A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180158A (en) * 1981-04-30 1982-11-06 Nec Corp Input protector for complementary mos integrated circuit
JPS6173427A (en) * 1984-09-18 1986-04-15 Matsushita Electric Ind Co Ltd Amplifier circuit for fm intermediate frequency
US5500542A (en) * 1993-02-12 1996-03-19 Fujitsu Limited Semiconductor integrated circuit with protection circuit against electrostatic breakdown and layout design method therefor
US6002155A (en) * 1993-02-12 1999-12-14 Fujitsu Limited Semiconductor integrated circuit with protection circuit against electrostatic breakdown and layout design method therefor
JP2005167096A (en) * 2003-12-04 2005-06-23 Matsushita Electric Ind Co Ltd Semiconductor protective device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180158A (en) * 1981-04-30 1982-11-06 Nec Corp Input protector for complementary mos integrated circuit
JPH0410228B2 (en) * 1981-04-30 1992-02-24
JPS6173427A (en) * 1984-09-18 1986-04-15 Matsushita Electric Ind Co Ltd Amplifier circuit for fm intermediate frequency
US5500542A (en) * 1993-02-12 1996-03-19 Fujitsu Limited Semiconductor integrated circuit with protection circuit against electrostatic breakdown and layout design method therefor
US5672895A (en) * 1993-02-12 1997-09-30 Fujitsu, Ltd. Semiconductor integrated circuit with protection circuit against electrostatic breakdown and layout design method therefor
US6002155A (en) * 1993-02-12 1999-12-14 Fujitsu Limited Semiconductor integrated circuit with protection circuit against electrostatic breakdown and layout design method therefor
JP2005167096A (en) * 2003-12-04 2005-06-23 Matsushita Electric Ind Co Ltd Semiconductor protective device

Also Published As

Publication number Publication date
JPS616555B2 (en) 1986-02-27

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