JPS56146256A - Hybrid ic device - Google Patents

Hybrid ic device

Info

Publication number
JPS56146256A
JPS56146256A JP4933180A JP4933180A JPS56146256A JP S56146256 A JPS56146256 A JP S56146256A JP 4933180 A JP4933180 A JP 4933180A JP 4933180 A JP4933180 A JP 4933180A JP S56146256 A JPS56146256 A JP S56146256A
Authority
JP
Japan
Prior art keywords
corners
semiconductor element
substrate
solder layers
fitted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4933180A
Other languages
Japanese (ja)
Other versions
JPS6125222B2 (en
Inventor
Takehiko Kobayashi
Ko Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4933180A priority Critical patent/JPS56146256A/en
Publication of JPS56146256A publication Critical patent/JPS56146256A/en
Publication of JPS6125222B2 publication Critical patent/JPS6125222B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Casings For Electric Apparatus (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)

Abstract

PURPOSE:To increase a mechanical strength and a radiation effect by a method wherein solder layers with range thereof is limited at four corners including a part corresponding to a semiconductor element are formed on the reverse side of a ceramic substrate fitted with the semiconductor element, and a metallic casing is attached through the solder layers. CONSTITUTION:The first solder layer 25 is formed on the reverse side of the ceramic substrate 11 fitted with the semiconductor element 12, so as to be extended to the corners 25a, 25b of the substrate 11 only within the range corresponding to the installation of the element 12 required for the radiating action. The second and third solder layers 26a, 26b are formed at other corners also to be attached to a metallic substrate 15. Thereby, the solderings can be performed without bubbles and gaps, and the hybrid integrated circuit satisfactory in the mechanical adhesive strength and the radiation characteristic can be formed.
JP4933180A 1980-04-15 1980-04-15 Hybrid ic device Granted JPS56146256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4933180A JPS56146256A (en) 1980-04-15 1980-04-15 Hybrid ic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4933180A JPS56146256A (en) 1980-04-15 1980-04-15 Hybrid ic device

Publications (2)

Publication Number Publication Date
JPS56146256A true JPS56146256A (en) 1981-11-13
JPS6125222B2 JPS6125222B2 (en) 1986-06-14

Family

ID=12827997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4933180A Granted JPS56146256A (en) 1980-04-15 1980-04-15 Hybrid ic device

Country Status (1)

Country Link
JP (1) JPS56146256A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0726988U (en) * 1994-06-06 1995-05-19 三洋電機株式会社 Optical recording disc
EP0751569A2 (en) * 1995-06-26 1997-01-02 Siemens Aktiengesellschaft Hybrid power circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0530971Y2 (en) * 1987-01-19 1993-08-09

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0726988U (en) * 1994-06-06 1995-05-19 三洋電機株式会社 Optical recording disc
EP0751569A2 (en) * 1995-06-26 1997-01-02 Siemens Aktiengesellschaft Hybrid power circuit
EP0751569A3 (en) * 1995-06-26 1998-12-16 Siemens Aktiengesellschaft Hybrid power circuit

Also Published As

Publication number Publication date
JPS6125222B2 (en) 1986-06-14

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