NO20001360D0 - Vertikale elektriske forbindelser i stabel - Google Patents

Vertikale elektriske forbindelser i stabel

Info

Publication number
NO20001360D0
NO20001360D0 NO20001360A NO20001360A NO20001360D0 NO 20001360 D0 NO20001360 D0 NO 20001360D0 NO 20001360 A NO20001360 A NO 20001360A NO 20001360 A NO20001360 A NO 20001360A NO 20001360 D0 NO20001360 D0 NO 20001360D0
Authority
NO
Norway
Prior art keywords
layers
edge
stack
electrical
substrate
Prior art date
Application number
NO20001360A
Other languages
English (en)
Norwegian (no)
Original Assignee
Thin Film Electronics Asa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics Asa filed Critical Thin Film Electronics Asa
Priority to NO20001360A priority Critical patent/NO20001360D0/no
Publication of NO20001360D0 publication Critical patent/NO20001360D0/no
Priority to PCT/NO2001/000113 priority patent/WO2001069679A1/en
Priority to US09/926,531 priority patent/US20030024731A1/en
Priority to KR10-2002-7012015A priority patent/KR100488256B1/ko
Priority to EP01918005A priority patent/EP1287560A1/en
Priority to RU2002125873A priority patent/RU2237948C2/ru
Priority to JP2001567041A priority patent/JP2003526945A/ja
Priority to NO20011330A priority patent/NO313679B1/no
Priority to AU44877/01A priority patent/AU775011B2/en
Priority to CNB018065473A priority patent/CN1214462C/zh
Priority to CA002403231A priority patent/CA2403231C/en
Priority to US10/390,178 priority patent/US7211885B2/en
Priority to HK03106866A priority patent/HK1054616A1/xx
Priority to JP2008030771A priority patent/JP2008177589A/ja
Priority to JP2008030748A priority patent/JP2008182252A/ja

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/25Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2405Shape
    • H01L2224/24051Conformal with the semiconductor or solid-state device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24145Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24145Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H01L2224/24146Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the HDI interconnect connecting to the same level of the lower semiconductor or solid-state body at which the upper semiconductor or solid-state body is mounted
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/25Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
    • H01L2224/251Disposition
    • H01L2224/2512Layout
    • H01L2224/25175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/76Apparatus for connecting with build-up interconnects
    • H01L2224/7615Means for depositing
    • H01L2224/76151Means for direct writing
    • H01L2224/76155Jetting means, e.g. ink jet
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/821Forming a build-up interconnect
    • H01L2224/82101Forming a build-up interconnect by additive methods, e.g. direct writing
    • H01L2224/82102Forming a build-up interconnect by additive methods, e.g. direct writing using jetting, e.g. ink jet
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06524Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06527Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06551Conductive connections on the side of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01055Cesium [Cs]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30105Capacitance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
NO20001360A 2000-03-15 2000-03-15 Vertikale elektriske forbindelser i stabel NO20001360D0 (no)

Priority Applications (15)

Application Number Priority Date Filing Date Title
NO20001360A NO20001360D0 (no) 2000-03-15 2000-03-15 Vertikale elektriske forbindelser i stabel
CA002403231A CA2403231C (en) 2000-03-15 2001-03-15 Vertical electrical interconnections in a stack
JP2001567041A JP2003526945A (ja) 2000-03-15 2001-03-15 スタックにおける電気的相互垂直接続
AU44877/01A AU775011B2 (en) 2000-03-15 2001-03-15 Vertical electrical interconnections in a stack
KR10-2002-7012015A KR100488256B1 (ko) 2000-03-15 2001-03-15 적층부내의 수직 전기적 상호접속부
EP01918005A EP1287560A1 (en) 2000-03-15 2001-03-15 Vertical electrical interconnections in a stack
RU2002125873A RU2237948C2 (ru) 2000-03-15 2001-03-15 Устройство памяти и/или обработки данных и способ его изготовления
PCT/NO2001/000113 WO2001069679A1 (en) 2000-03-15 2001-03-15 Vertical electrical interconnections in a stack
NO20011330A NO313679B1 (no) 2000-03-15 2001-03-15 Vertikale elektriske forbindelser i en stabel
US09/926,531 US20030024731A1 (en) 2000-03-15 2001-03-15 Vertical electrical interconnections in a stack
CNB018065473A CN1214462C (zh) 2000-03-15 2001-03-15 叠层中的垂直电互连
US10/390,178 US7211885B2 (en) 2000-03-15 2003-03-14 Vertical electrical interconnections in a stack
HK03106866A HK1054616A1 (en) 2000-03-15 2003-09-24 Vertical electrical interconnections in a stack
JP2008030771A JP2008177589A (ja) 2000-03-15 2008-02-12 スタックにおける電気的相互垂直接続
JP2008030748A JP2008182252A (ja) 2000-03-15 2008-02-12 スタックにおける電気的相互垂直接続

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NO20001360A NO20001360D0 (no) 2000-03-15 2000-03-15 Vertikale elektriske forbindelser i stabel

Publications (1)

Publication Number Publication Date
NO20001360D0 true NO20001360D0 (no) 2000-03-15

Family

ID=19910880

Family Applications (2)

Application Number Title Priority Date Filing Date
NO20001360A NO20001360D0 (no) 2000-03-15 2000-03-15 Vertikale elektriske forbindelser i stabel
NO20011330A NO313679B1 (no) 2000-03-15 2001-03-15 Vertikale elektriske forbindelser i en stabel

Family Applications After (1)

Application Number Title Priority Date Filing Date
NO20011330A NO313679B1 (no) 2000-03-15 2001-03-15 Vertikale elektriske forbindelser i en stabel

Country Status (11)

Country Link
US (2) US20030024731A1 (ru)
EP (1) EP1287560A1 (ru)
JP (3) JP2003526945A (ru)
KR (1) KR100488256B1 (ru)
CN (1) CN1214462C (ru)
AU (1) AU775011B2 (ru)
CA (1) CA2403231C (ru)
HK (1) HK1054616A1 (ru)
NO (2) NO20001360D0 (ru)
RU (1) RU2237948C2 (ru)
WO (1) WO2001069679A1 (ru)

Families Citing this family (88)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6756620B2 (en) * 2001-06-29 2004-06-29 Intel Corporation Low-voltage and interface damage-free polymer memory device
US6624457B2 (en) 2001-07-20 2003-09-23 Intel Corporation Stepped structure for a multi-rank, stacked polymer memory device and method of making same
JP3838218B2 (ja) * 2003-05-19 2006-10-25 ソニー株式会社 面発光型半導体レーザ素子及びその製造方法
US6959134B2 (en) * 2003-06-30 2005-10-25 Intel Corporation Measuring the position of passively aligned optical components
JP3801160B2 (ja) * 2003-09-11 2006-07-26 セイコーエプソン株式会社 半導体素子、半導体装置、半導体素子の製造方法、半導体装置の製造方法及び電子機器
JP2005093703A (ja) * 2003-09-17 2005-04-07 Seiko Epson Corp タイル状素子用配線形成方法、タイル状素子用配線構造物及び電子機器
JP4206885B2 (ja) 2003-09-26 2009-01-14 ソニー株式会社 半導体装置の製造方法
US7732904B2 (en) * 2003-10-10 2010-06-08 Interconnect Portfolio Llc Multi-surface contact IC packaging structures and assemblies
US7652381B2 (en) 2003-11-13 2010-01-26 Interconnect Portfolio Llc Interconnect system without through-holes
US7280372B2 (en) * 2003-11-13 2007-10-09 Silicon Pipe Stair step printed circuit board structures for high speed signal transmissions
NO320176B1 (no) * 2004-02-03 2005-11-07 Kim Oyhus Stablede lag av gitter-minne koblet til integrert krets.
US7278855B2 (en) 2004-02-09 2007-10-09 Silicon Pipe, Inc High speed, direct path, stair-step, electronic connectors with improved signal integrity characteristics and methods for their manufacture
DE102004008135A1 (de) * 2004-02-18 2005-09-22 Infineon Technologies Ag Halbleiterbauteil mit einem Stapel aus Halbleiterchips und Verfahren zur Herstellung desselben
TW200530655A (en) * 2004-03-05 2005-09-16 Toppoly Optoelectronics Corp Display panel, lead pad structure, lead pad array structure and method of fabricating the same
JP2006303408A (ja) * 2004-09-09 2006-11-02 Seiko Epson Corp 電子装置及びその製造方法
JP3992038B2 (ja) * 2004-11-16 2007-10-17 セイコーエプソン株式会社 電子素子の実装方法、電子装置の製造方法、回路基板、電子機器
JP2006270009A (ja) * 2005-02-25 2006-10-05 Seiko Epson Corp 電子装置の製造方法
NO324539B1 (no) * 2005-06-14 2007-11-19 Thin Film Electronics Asa Fremgangsmate i fabrikasjonen av en ferroelektrisk minneinnretning
US7706165B2 (en) * 2005-12-20 2010-04-27 Agfa-Gevaert Nv Ferroelectric passive memory cell, device and method of manufacture thereof
US8513789B2 (en) 2006-10-10 2013-08-20 Tessera, Inc. Edge connect wafer level stacking with leads extending along edges
US7829438B2 (en) * 2006-10-10 2010-11-09 Tessera, Inc. Edge connect wafer level stacking
US7901989B2 (en) 2006-10-10 2011-03-08 Tessera, Inc. Reconstituted wafer level stacking
JP5018024B2 (ja) * 2006-11-08 2012-09-05 セイコーエプソン株式会社 電子部品の実装方法、電子基板、及び電子機器
US8461672B2 (en) 2007-07-27 2013-06-11 Tessera, Inc. Reconstituted wafer stack packaging with after-applied pad extensions
JP4940063B2 (ja) * 2007-08-28 2012-05-30 株式会社東芝 半導体装置およびその製造方法
JP2009094432A (ja) * 2007-10-12 2009-04-30 Toshiba Corp 積層型半導体パッケージの製造方法
JP5126002B2 (ja) 2008-11-11 2013-01-23 セイコーエプソン株式会社 半導体装置及び半導体装置の製造方法
US9082438B2 (en) 2008-12-02 2015-07-14 Panasonic Corporation Three-dimensional structure for wiring formation
KR101359117B1 (ko) 2009-01-27 2014-02-05 파나소닉 주식회사 반도체 칩의 실장 방법, 그 방법을 이용하여 얻어진 반도체 장치 및 반도체 칩의 접속 방법, 및, 표면에 배선이 설치된 입체 구조물 및 그 제법
US9070393B2 (en) 2009-01-27 2015-06-30 Panasonic Corporation Three-dimensional structure in which wiring is provided on its surface
US8476749B2 (en) * 2009-07-22 2013-07-02 Oracle America, Inc. High-bandwidth ramp-stack chip package
GB0913456D0 (en) * 2009-08-03 2009-09-16 Cambridge Entpr Ltd Printed electronic device
TW201203041A (en) * 2010-03-05 2012-01-16 Canatu Oy A touch sensitive film and a touch sensing device
JP5289484B2 (ja) * 2011-03-04 2013-09-11 株式会社東芝 積層型半導体装置の製造方法
US8765598B2 (en) * 2011-06-02 2014-07-01 Micron Technology, Inc. Conductive structures, systems and devices including conductive structures and related methods
CA2841189C (en) 2011-11-25 2018-05-15 Hoffmann Neopac Ag Insert for a drop dispensing tube spout
DE102012024599B4 (de) * 2011-12-20 2020-07-09 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Anordnung mit optisch transparenten und funktionalen Bauelementen
US20130234330A1 (en) * 2012-03-08 2013-09-12 Infineon Technologies Ag Semiconductor Packages and Methods of Formation Thereof
KR101691278B1 (ko) 2012-05-03 2017-01-09 애플 인크. 휨 빔에 의해 지지되는 플랫폼 상의 하중 측정을 위한 모멘트 보상형 휨 빔 센서
US9082632B2 (en) 2012-05-10 2015-07-14 Oracle International Corporation Ramp-stack chip package with variable chip spacing
US9891759B2 (en) 2012-09-28 2018-02-13 Apple Inc. Frustrated total internal reflection and capacitive sensing
US10817096B2 (en) 2014-02-06 2020-10-27 Apple Inc. Force sensor incorporated into display
US10168814B2 (en) 2012-12-14 2019-01-01 Apple Inc. Force sensing based on capacitance changes
WO2014098946A1 (en) 2012-12-17 2014-06-26 Changello Enterprise Llc Force detection in touch devices using piezoelectric sensors
KR102190382B1 (ko) 2012-12-20 2020-12-11 삼성전자주식회사 반도체 패키지
JP2014130877A (ja) * 2012-12-28 2014-07-10 Yamaha Corp 半導体装置及びその製造方法
CN103325767B (zh) * 2013-02-07 2015-07-08 程君 一种集成化半导体显示板
US10386970B2 (en) 2013-02-08 2019-08-20 Apple Inc. Force determination based on capacitive sensing
CN103985683B (zh) * 2013-02-08 2017-04-12 精材科技股份有限公司 晶片封装体
US9351400B1 (en) 2013-02-21 2016-05-24 Apple Inc. Electrical connections between conductive contacts
US9532450B2 (en) 2013-03-12 2016-12-27 Apple Inc. Lowering the sheet resistance of a conductive layer
WO2014149023A1 (en) 2013-03-15 2014-09-25 Rinand Solutions Llc Force sensing of inputs through strain analysis
US10209148B2 (en) 2013-03-15 2019-02-19 Apple Inc. Force-sensitive fingerprint sensing input
US9851828B2 (en) 2013-03-15 2017-12-26 Apple Inc. Touch force deflection sensor
US9638591B1 (en) 2013-05-24 2017-05-02 Apple Inc. Display area force sensing using Bragg grating based wave guide sensors
TWI489922B (zh) * 2013-07-15 2015-06-21 Mpi Corp Multilayer circuit boards
US9671889B1 (en) 2013-07-25 2017-06-06 Apple Inc. Input member with capacitive sensor
CN105684177B (zh) 2013-10-28 2019-05-21 苹果公司 基于压电的力感测
AU2015100011B4 (en) 2014-01-13 2015-07-16 Apple Inc. Temperature compensating transparent force sensor
EP3072040B1 (en) 2014-02-12 2021-12-29 Apple Inc. Force determination employing sheet sensor and capacitive array
US10198123B2 (en) 2014-04-21 2019-02-05 Apple Inc. Mitigating noise in capacitive sensor
JP6600353B2 (ja) * 2014-09-24 2019-10-30 コーニンクレッカ フィリップス エヌ ヴェ プリント回路基板およびプリント回路基板配置
US10006937B2 (en) 2015-03-06 2018-06-26 Apple Inc. Capacitive sensors for electronic devices and methods of forming the same
US9691820B2 (en) * 2015-04-24 2017-06-27 Sony Semiconductor Solutions Corporation Block architecture for vertical memory array
US10161814B2 (en) 2015-05-27 2018-12-25 Apple Inc. Self-sealing sensor in an electronic device
US9612170B2 (en) 2015-07-21 2017-04-04 Apple Inc. Transparent strain sensors in an electronic device
US10055048B2 (en) 2015-07-31 2018-08-21 Apple Inc. Noise adaptive force touch
US9715301B2 (en) 2015-08-04 2017-07-25 Apple Inc. Proximity edge sensing
US9874965B2 (en) 2015-09-11 2018-01-23 Apple Inc. Transparent strain sensors in an electronic device
US9886118B2 (en) 2015-09-30 2018-02-06 Apple Inc. Transparent force sensitive structures in an electronic device
US10019085B2 (en) 2015-09-30 2018-07-10 Apple Inc. Sensor layer having a patterned compliant layer
WO2017143242A1 (en) 2016-02-19 2017-08-24 Apple Inc. Force sensing architectures
US10006820B2 (en) 2016-03-08 2018-06-26 Apple Inc. Magnetic interference avoidance in resistive sensors
US9941209B2 (en) 2016-03-11 2018-04-10 Micron Technology, Inc. Conductive structures, systems and devices including conductive structures and related methods
JP2017168641A (ja) 2016-03-16 2017-09-21 東芝メモリ株式会社 不揮発性半導体記憶装置及びその製造方法
US10007343B2 (en) 2016-03-31 2018-06-26 Apple Inc. Force sensor in an input device
US10209830B2 (en) 2016-03-31 2019-02-19 Apple Inc. Electronic device having direction-dependent strain elements
US10090320B2 (en) 2016-05-19 2018-10-02 Toshiba Memory Corporation Semiconductor device and method for manufacturing the same
US10133418B2 (en) 2016-09-07 2018-11-20 Apple Inc. Force sensing in an electronic device using a single layer of strain-sensitive structures
US10444091B2 (en) 2017-04-11 2019-10-15 Apple Inc. Row column architecture for strain sensing
US10309846B2 (en) 2017-07-24 2019-06-04 Apple Inc. Magnetic field cancellation for strain sensors
CN107613665B (zh) * 2017-08-11 2020-08-21 惠州市超频三全周光智能照明科技有限公司 多层导通构造加工方法、线性电路板加工方法及线光源
CN107567206B (zh) * 2017-08-11 2020-11-10 惠州市超频三全周光智能照明科技有限公司 双面导通构造加工方法、线性电路板加工方法及线光源
CN108257878A (zh) * 2018-01-11 2018-07-06 郑州云海信息技术有限公司 一种增强qfn封装焊接效果的方法及qfn封装
US10866683B2 (en) 2018-08-27 2020-12-15 Apple Inc. Force or touch sensing on a mobile device using capacitive or pressure sensing
US10782818B2 (en) 2018-08-29 2020-09-22 Apple Inc. Load cell array for detection of force input to an electronic device enclosure
US11024551B1 (en) 2020-01-07 2021-06-01 International Business Machines Corporation Metal replacement vertical interconnections for buried capacitance
US11490519B2 (en) * 2021-01-11 2022-11-01 X-Celeprint Limited Printed stacked micro-devices

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58178547A (ja) * 1982-04-12 1983-10-19 Matsushita Electric Ind Co Ltd 電気部品組立体およびその製造方法
SU1616439A1 (ru) * 1989-02-03 1996-01-20 Д.М. Боднарь Способ создания многоуровневых межсоединений интегральных схем
US5093708A (en) * 1990-08-20 1992-03-03 Grumman Aerospace Corporation Multilayer integrated circuit module
US5311401A (en) * 1991-07-09 1994-05-10 Hughes Aircraft Company Stacked chip assembly and manufacturing method therefor
US5422435A (en) * 1992-05-22 1995-06-06 National Semiconductor Corporation Stacked multi-chip modules and method of manufacturing
US5969380A (en) 1996-06-07 1999-10-19 Micron Technology, Inc. Three dimensional ferroelectric memory
FR2751328B1 (fr) * 1996-07-17 1998-10-09 Oxis International Sa Utilisation de nouveaux composes organoselenies comme agents pro-oxydants ainsi que leurs procedes de preparation et des compositions pharmaceutiques en comportant application
JP3565319B2 (ja) * 1999-04-14 2004-09-15 シャープ株式会社 半導体装置及びその製造方法
JP3765952B2 (ja) * 1999-10-19 2006-04-12 富士通株式会社 半導体装置
US6621155B1 (en) * 1999-12-23 2003-09-16 Rambus Inc. Integrated circuit device having stacked dies and impedance balanced transmission lines
US6376904B1 (en) * 1999-12-23 2002-04-23 Rambus Inc. Redistributed bond pads in stacked integrated circuit die package
US6664639B2 (en) * 2000-12-22 2003-12-16 Matrix Semiconductor, Inc. Contact and via structure and method of fabrication

Also Published As

Publication number Publication date
US20030024731A1 (en) 2003-02-06
NO20011330D0 (no) 2001-03-15
NO20011330L (no) 2001-09-17
JP2008177589A (ja) 2008-07-31
JP2008182252A (ja) 2008-08-07
KR100488256B1 (ko) 2005-05-11
US7211885B2 (en) 2007-05-01
RU2237948C2 (ru) 2004-10-10
NO313679B1 (no) 2002-11-11
CN1418374A (zh) 2003-05-14
JP2003526945A (ja) 2003-09-09
US20030218191A1 (en) 2003-11-27
CN1214462C (zh) 2005-08-10
RU2002125873A (ru) 2004-03-27
EP1287560A1 (en) 2003-03-05
CA2403231A1 (en) 2001-09-20
CA2403231C (en) 2007-05-01
AU775011B2 (en) 2004-07-15
AU4487701A (en) 2001-09-24
KR20020080484A (ko) 2002-10-23
HK1054616A1 (en) 2003-12-05
WO2001069679A1 (en) 2001-09-20

Similar Documents

Publication Publication Date Title
NO20001360D0 (no) Vertikale elektriske forbindelser i stabel
CN106229332B (zh) 显示面板及其制造方法,柔性显示装置
CN106170863B (zh) 包含具有邻近于源极边缘的源极触点的存储器阵列的设备
TWI333684B (en) Package substrate having embedded capacitor
TW200717887A (en) Thermoelectric device and method for fabricating the same and chip and electronic device
TW200512875A (en) Semiconductor apparatus utilizing multi-level interconnection to prevent peeling-off of low-k layer
TW200501345A (en) Stacked-type semiconductor device
TW200501182A (en) A capacitor structure
TW200729457A (en) Semiconductor device
CN105957832A (zh) 用于表面编码方案超导量子比特系统的布线方法及布线板
TW200715538A (en) Memory device having highly integrated cell structure and method of its fabrication
WO2002029890A3 (en) Semiconductor stacked die devices and methods of forming semiconductor stacked die devices
TW200705539A (en) Semiconductor device
TW200715525A (en) Semiconductor integrated circuit device and method for manufacturing same
TW200608564A (en) Method of manufacturing active matrix substrate, active matrix substrate, electro-optical device, and electronic apparatus
TWI602266B (zh) 嵌入式封裝體、此嵌入式封裝體之製造方法、包含此嵌入式封裝體的電子系統、及包含此嵌入式封裝體的記憶卡
MY129379A (en) Layered polymer on aluminum stacked capacitor
TW200741895A (en) Package using array capacitor core
TW200803645A (en) Embedded capacitor core having a multiple-layer structure
US11122693B2 (en) Method for forming laminated circuit board
CN111211126B (zh) 三维存储器及其形成方法
TW544917B (en) Semiconductor memory device and method for manufacturing the same
WO2008027281A3 (en) Interconnecting bit lines in memory devices for multiplexing
TW200830510A (en) Embedded passive device and methods for manufacturing the same
EP1434474A3 (en) Technique for electrically interconnecting electrical signals between an electronic component and a multilayer signal routing device