NL6614016A - - Google Patents
Info
- Publication number
- NL6614016A NL6614016A NL6614016A NL6614016A NL6614016A NL 6614016 A NL6614016 A NL 6614016A NL 6614016 A NL6614016 A NL 6614016A NL 6614016 A NL6614016 A NL 6614016A NL 6614016 A NL6614016 A NL 6614016A
- Authority
- NL
- Netherlands
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
- H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0635—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors and diodes, or resistors, or capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Local Oxidation Of Silicon (AREA)
- Electrodes Of Semiconductors (AREA)
- Element Separation (AREA)
- Bipolar Transistors (AREA)
- Formation Of Insulating Films (AREA)
- Weting (AREA)
- Junction Field-Effect Transistors (AREA)
- Level Indicators Using A Float (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (37)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL666614016A NL153374B (nl) | 1966-10-05 | 1966-10-05 | Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze. |
DE1614283A DE1614283C3 (de) | 1966-10-05 | 1967-09-29 | Verfahren zum Herstellen einer Halbleiteranordnung |
DE19671789146 DE1789146B2 (de) | 1966-10-05 | 1967-09-29 | Verfahren zum Herstellen einer Halbleiteranordnung |
DE19671789144 DE1789144B2 (de) | 1966-10-05 | 1967-09-29 | Verfahren zum Herstellen einer Halbleiteranordnung |
DE19671789145 DE1789145B2 (de) | 1966-10-05 | 1967-09-29 | Verfahren zum Herstellen einer Halbleiteranordnung |
DE19671789171 DE1789171C2 (de) | 1966-10-05 | 1967-09-29 | Verfahren zum Herstellen einer Halbleiteranordnung |
GB44763/67A GB1208574A (en) | 1966-10-05 | 1967-10-02 | Methods of manufacturing semiconductor devices |
NO169941A NO125653B (es) | 1966-10-05 | 1967-10-02 | |
DK488667AA DK121913B (da) | 1966-10-05 | 1967-10-02 | Fremgangsmåde til fremstilling af et halvlederørgan. |
GB2751770A GB1208578A (en) | 1966-10-05 | 1967-10-02 | Methods of manufacturing semiconductor devices |
GB2723870A GB1208575A (en) | 1966-10-05 | 1967-10-02 | Methods of manufacturing semiconductor devices |
GB2723970A GB1208576A (en) | 1966-10-05 | 1967-10-02 | Methods of manufacturing semiconductor devices |
GB2751670A GB1208577A (en) | 1966-10-05 | 1967-10-02 | Methods of manufacturing semiconductor devices |
CH1372567A CH469358A (de) | 1966-10-05 | 1967-10-02 | Verfahren zur Herstellung einer Halbleitervorrichtung und nach diesem Verfahren hergestellte Halbleitervorrichtung |
AT895167A AT280349B (de) | 1966-10-05 | 1967-10-03 | Verfahren zur Herstellung einer Halbleitervorrichtung |
BE704674D BE704674A (es) | 1966-10-05 | 1967-10-04 | |
SE13610/67A SE335177B (es) | 1966-10-05 | 1967-10-04 | |
JP6388367A JPS5631893B1 (es) | 1966-10-05 | 1967-10-05 | |
FR1549386D FR1549386A (es) | 1966-10-05 | 1967-10-05 | |
ES345702A ES345702A1 (es) | 1966-10-05 | 1967-10-30 | Un metodo de fabricar un dispositivo semiconductor. |
NL7002384A NL159817B (nl) | 1966-10-05 | 1970-02-19 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
NL7010208A NL7010208A (es) | 1966-10-05 | 1970-07-10 | |
DE19712105178 DE2105178C3 (de) | 1966-10-05 | 1971-02-04 | Integrierte Halbleiterschaltung |
AT130671A AT339959B (de) | 1966-10-05 | 1971-02-16 | Verfahren zum herstellen einer integrierten monolithischen halbleiteranordnung mit versenkter isolierschicht |
SE197871A SE372139B (es) | 1966-10-05 | 1971-02-16 | |
CH222571A CH526858A (de) | 1966-10-05 | 1971-02-16 | Verfahren zur Herstellung einer Halbleitervorrichtung und nach diesem Verfahren hergestellte Halbleitervorrichtung |
FR7105551A FR2081017A2 (en) | 1966-10-05 | 1971-02-18 | Fabrication of a semiconductor device |
DE19712133980 DE2133980C3 (de) | 1966-10-05 | 1971-07-08 | Verfahren zur Herstellung einer integrierten Halbleiterschaltung |
FR7125297A FR2098323B2 (es) | 1966-10-05 | 1971-07-09 | |
JP47104047A JPS4939308B1 (es) | 1966-10-05 | 1972-10-19 | |
JP47104048A JPS4939309B1 (es) | 1966-10-05 | 1972-10-19 | |
JP48051237A JPS4923071B1 (es) | 1966-10-05 | 1973-05-10 | |
JP8957074A JPS5434596B1 (es) | 1966-10-05 | 1974-08-06 | |
US05/549,936 US3970486A (en) | 1966-10-05 | 1975-02-14 | Methods of producing a semiconductor device and a semiconductor device produced by said method |
JP50046613A JPS5134274B1 (es) | 1966-10-05 | 1975-04-18 | |
JP50067701A JPS5838937B1 (es) | 1966-10-05 | 1975-06-06 | |
JP11170477A JPS5435071B1 (es) | 1966-10-05 | 1977-09-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL666614016A NL153374B (nl) | 1966-10-05 | 1966-10-05 | Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze. |
Publications (2)
Publication Number | Publication Date |
---|---|
NL6614016A true NL6614016A (es) | 1968-04-08 |
NL153374B NL153374B (nl) | 1977-05-16 |
Family
ID=19797850
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL666614016A NL153374B (nl) | 1966-10-05 | 1966-10-05 | Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze. |
Country Status (13)
Country | Link |
---|---|
US (1) | US3970486A (es) |
JP (8) | JPS5631893B1 (es) |
AT (1) | AT280349B (es) |
BE (1) | BE704674A (es) |
CH (1) | CH469358A (es) |
DE (1) | DE1614283C3 (es) |
DK (1) | DK121913B (es) |
ES (1) | ES345702A1 (es) |
FR (1) | FR1549386A (es) |
GB (1) | GB1208574A (es) |
NL (1) | NL153374B (es) |
NO (1) | NO125653B (es) |
SE (1) | SE335177B (es) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2056965A1 (en) * | 1969-08-04 | 1971-05-07 | Rca Corp | Forming si oxide regions on si semiconductor - substrate |
FR2076125A1 (es) * | 1970-01-15 | 1971-10-15 | Philips Nv | |
USRE28653E (en) * | 1968-04-23 | 1975-12-16 | Method of fabricating semiconductor devices | |
US6093620A (en) * | 1971-02-02 | 2000-07-25 | National Semiconductor Corporation | Method of fabricating integrated circuits with oxidized isolation |
Families Citing this family (49)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5696402A (en) * | 1965-09-28 | 1997-12-09 | Li; Chou H. | Integrated circuit device |
US6849918B1 (en) * | 1965-09-28 | 2005-02-01 | Chou H. Li | Miniaturized dielectrically isolated solid state device |
US7038290B1 (en) | 1965-09-28 | 2006-05-02 | Li Chou H | Integrated circuit device |
US6979877B1 (en) | 1965-09-28 | 2005-12-27 | Li Chou H | Solid-state device |
NL159817B (nl) * | 1966-10-05 | 1979-03-15 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
NL7010208A (es) * | 1966-10-05 | 1972-01-12 | Philips Nv | |
USRE31580E (en) * | 1967-06-08 | 1984-05-01 | U.S. Philips Corporation | Insulated gate field-effect transistor comprising a mesa channel and a thicker surrounding oxide |
FR2058385A1 (en) * | 1969-08-20 | 1971-05-28 | Ibm | Diode with schottky barrier |
DE1952636C3 (de) * | 1969-10-18 | 1981-04-30 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Verfahren zum Herstellen einer Halbleiteranordnung mit einem Schottky-Kontakt |
US3698966A (en) * | 1970-02-26 | 1972-10-17 | North American Rockwell | Processes using a masking layer for producing field effect devices having oxide isolation |
GB1360996A (en) * | 1970-06-15 | 1974-07-24 | Hitachi Ltd | Semiconductor device and method for manufacture |
NL170902C (nl) * | 1970-07-10 | 1983-01-03 | Philips Nv | Halfgeleiderinrichting, in het bijzonder monolithische geintegreerde halfgeleiderschakeling. |
FR2098325B1 (es) * | 1970-07-10 | 1977-04-22 | Philips Nv | |
JPS514756B1 (es) * | 1970-10-05 | 1976-02-14 | ||
JPS498183A (es) * | 1972-05-10 | 1974-01-24 | ||
FR2188304B1 (es) * | 1972-06-15 | 1977-07-22 | Commissariat Energie Atomique | |
DE2318912A1 (de) * | 1972-06-30 | 1974-01-17 | Ibm | Integrierte halbleiteranordnung |
JPS4960684A (es) * | 1972-10-12 | 1974-06-12 | ||
JPS5617734B2 (es) * | 1973-07-19 | 1981-04-24 | ||
JPS5159853U (es) * | 1974-11-06 | 1976-05-11 | ||
JPS5938741B2 (ja) * | 1976-07-31 | 1984-09-19 | ティーディーケイ株式会社 | 半導体装置およびその作製方法 |
EP0002107A3 (en) * | 1977-11-17 | 1979-09-05 | Rca Corporation | Method of making a planar semiconductor device |
GB2042801B (en) * | 1979-02-13 | 1983-12-14 | Standard Telephones Cables Ltd | Contacting semicnductor devices |
US4441941A (en) * | 1980-03-06 | 1984-04-10 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing a semiconductor device employing element isolation using insulating materials |
US4274909A (en) * | 1980-03-17 | 1981-06-23 | International Business Machines Corporation | Method for forming ultra fine deep dielectric isolation |
US4317690A (en) * | 1980-06-18 | 1982-03-02 | Signetics Corporation | Self-aligned double polysilicon MOS fabrication |
US4506435A (en) * | 1981-07-27 | 1985-03-26 | International Business Machines Corporation | Method for forming recessed isolated regions |
US4454646A (en) * | 1981-08-27 | 1984-06-19 | International Business Machines Corporation | Isolation for high density integrated circuits |
US4454647A (en) * | 1981-08-27 | 1984-06-19 | International Business Machines Corporation | Isolation for high density integrated circuits |
JPS5873163A (ja) * | 1981-10-27 | 1983-05-02 | Toshiba Corp | Mos型半導体装置 |
US4508757A (en) * | 1982-12-20 | 1985-04-02 | International Business Machines Corporation | Method of manufacturing a minimum bird's beak recessed oxide isolation structure |
GB2151844A (en) * | 1983-12-20 | 1985-07-24 | Philips Electronic Associated | Semiconductor devices |
JPS60115416U (ja) * | 1984-01-12 | 1985-08-05 | 三菱電機株式会社 | フラツトキ−型操作ボ−ド |
JPS6133323U (ja) * | 1984-07-31 | 1986-02-28 | 武夫 大坪 | キ−ボ−ド表示板 |
JPS61126696U (es) * | 1985-01-28 | 1986-08-08 | ||
US4630356A (en) * | 1985-09-19 | 1986-12-23 | International Business Machines Corporation | Method of forming recessed oxide isolation with reduced steepness of the birds' neck |
US5019526A (en) * | 1988-09-26 | 1991-05-28 | Nippondenso Co., Ltd. | Method of manufacturing a semiconductor device having a plurality of elements |
US5077235A (en) * | 1989-01-24 | 1991-12-31 | Ricoh Comany, Ltd. | Method of manufacturing a semiconductor integrated circuit device having SOI structure |
US4968641A (en) * | 1989-06-22 | 1990-11-06 | Alexander Kalnitsky | Method for formation of an isolating oxide layer |
US4987099A (en) * | 1989-12-29 | 1991-01-22 | North American Philips Corp. | Method for selectively filling contacts or vias or various depths with CVD tungsten |
JP3111500B2 (ja) * | 1991-05-09 | 2000-11-20 | 富士電機株式会社 | 誘電体分離ウエハの製造方法 |
JPH05283710A (ja) * | 1991-12-06 | 1993-10-29 | Intel Corp | 高電圧mosトランジスタ及びその製造方法 |
US5418176A (en) * | 1994-02-17 | 1995-05-23 | United Microelectronics Corporation | Process for producing memory devices having narrow buried N+ lines |
US5756385A (en) * | 1994-03-30 | 1998-05-26 | Sandisk Corporation | Dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers |
US5661053A (en) * | 1994-05-25 | 1997-08-26 | Sandisk Corporation | Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers |
US5814875A (en) * | 1995-01-31 | 1998-09-29 | Nippon Steel Corporation | Semiconductor device and method of manufacturing the same apparatus and method for providing semiconductor devices having a field shield element between devices |
US20040144999A1 (en) * | 1995-06-07 | 2004-07-29 | Li Chou H. | Integrated circuit device |
US5747357A (en) | 1995-09-27 | 1998-05-05 | Mosel Vitelic, Inc. | Modified poly-buffered isolation |
US5883566A (en) * | 1997-02-24 | 1999-03-16 | International Business Machines Corporation | Noise-isolated buried resistor |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2981877A (en) * | 1959-07-30 | 1961-04-25 | Fairchild Semiconductor | Semiconductor device-and-lead structure |
US3212162A (en) * | 1962-01-05 | 1965-10-19 | Fairchild Camera Instr Co | Fabricating semiconductor devices |
US3165430A (en) * | 1963-01-21 | 1965-01-12 | Siliconix Inc | Method of ultra-fine semiconductor manufacture |
US3279963A (en) * | 1963-07-23 | 1966-10-18 | Ibm | Fabrication of semiconductor devices |
DE1439737B2 (de) * | 1964-10-31 | 1970-05-06 | Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm | Verfahren zum Herstellen einer Halblei teranordnung |
US3484313A (en) * | 1965-03-25 | 1969-12-16 | Hitachi Ltd | Method of manufacturing semiconductor devices |
US3442011A (en) * | 1965-06-30 | 1969-05-06 | Texas Instruments Inc | Method for isolating individual devices in an integrated circuit monolithic bar |
US3479237A (en) * | 1966-04-08 | 1969-11-18 | Bell Telephone Labor Inc | Etch masks on semiconductor surfaces |
US3649386A (en) * | 1968-04-23 | 1972-03-14 | Bell Telephone Labor Inc | Method of fabricating semiconductor devices |
US3550292A (en) * | 1968-08-23 | 1970-12-29 | Nippon Electric Co | Semiconductor device and method of manufacturing the same |
JPS4917069A (es) * | 1972-06-10 | 1974-02-15 | ||
JPS5232803B2 (es) * | 1972-08-15 | 1977-08-24 |
-
1966
- 1966-10-05 NL NL666614016A patent/NL153374B/xx not_active IP Right Cessation
-
1967
- 1967-09-29 DE DE1614283A patent/DE1614283C3/de not_active Expired
- 1967-10-02 GB GB44763/67A patent/GB1208574A/en not_active Expired
- 1967-10-02 CH CH1372567A patent/CH469358A/de unknown
- 1967-10-02 DK DK488667AA patent/DK121913B/da not_active IP Right Cessation
- 1967-10-02 NO NO169941A patent/NO125653B/no unknown
- 1967-10-03 AT AT895167A patent/AT280349B/de not_active IP Right Cessation
- 1967-10-04 SE SE13610/67A patent/SE335177B/xx unknown
- 1967-10-04 BE BE704674D patent/BE704674A/xx not_active IP Right Cessation
- 1967-10-05 FR FR1549386D patent/FR1549386A/fr not_active Expired
- 1967-10-05 JP JP6388367A patent/JPS5631893B1/ja active Pending
- 1967-10-30 ES ES345702A patent/ES345702A1/es not_active Expired
-
1972
- 1972-10-19 JP JP47104047A patent/JPS4939308B1/ja active Pending
- 1972-10-19 JP JP47104048A patent/JPS4939309B1/ja active Pending
-
1973
- 1973-05-10 JP JP48051237A patent/JPS4923071B1/ja active Pending
-
1974
- 1974-08-06 JP JP8957074A patent/JPS5434596B1/ja active Pending
-
1975
- 1975-02-14 US US05/549,936 patent/US3970486A/en not_active Expired - Lifetime
- 1975-04-18 JP JP50046613A patent/JPS5134274B1/ja active Pending
- 1975-06-06 JP JP50067701A patent/JPS5838937B1/ja active Pending
-
1977
- 1977-09-19 JP JP11170477A patent/JPS5435071B1/ja active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE28653E (en) * | 1968-04-23 | 1975-12-16 | Method of fabricating semiconductor devices | |
FR2056965A1 (en) * | 1969-08-04 | 1971-05-07 | Rca Corp | Forming si oxide regions on si semiconductor - substrate |
FR2076125A1 (es) * | 1970-01-15 | 1971-10-15 | Philips Nv | |
US6093620A (en) * | 1971-02-02 | 2000-07-25 | National Semiconductor Corporation | Method of fabricating integrated circuits with oxidized isolation |
Also Published As
Publication number | Publication date |
---|---|
JPS5838937B1 (es) | 1983-08-26 |
SE335177B (es) | 1971-05-17 |
JPS4939308B1 (es) | 1974-10-24 |
CH469358A (de) | 1969-02-28 |
JPS4939309B1 (es) | 1974-10-24 |
FR1549386A (es) | 1968-12-13 |
GB1208574A (en) | 1970-10-14 |
ES345702A1 (es) | 1969-02-01 |
JPS5631893B1 (es) | 1981-07-24 |
AT280349B (de) | 1970-04-10 |
JPS5134274B1 (es) | 1976-09-25 |
DE1614283A1 (de) | 1970-05-27 |
JPS4923071B1 (es) | 1974-06-13 |
DE1614283B2 (de) | 1975-06-05 |
NO125653B (es) | 1972-10-09 |
US3970486A (en) | 1976-07-20 |
NL153374B (nl) | 1977-05-16 |
DE1614283C3 (de) | 1983-03-10 |
JPS5434596B1 (es) | 1979-10-27 |
JPS5435071B1 (es) | 1979-10-31 |
DK121913B (da) | 1971-12-20 |
BE704674A (es) | 1968-04-04 |
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