KR970004079A - 반도체소자 및 그 제조방법 - Google Patents

반도체소자 및 그 제조방법 Download PDF

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KR970004079A
KR970004079A KR1019950018870A KR19950018870A KR970004079A KR 970004079 A KR970004079 A KR 970004079A KR 1019950018870 A KR1019950018870 A KR 1019950018870A KR 19950018870 A KR19950018870 A KR 19950018870A KR 970004079 A KR970004079 A KR 970004079A
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silicon substrate
oxide film
silicon oxide
silicon
substrate
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KR1019950018870A
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KR0172548B1 (ko
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박찬광
고요환
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김주용
현대전자산업 주식회사
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Priority to KR1019950018870A priority Critical patent/KR0172548B1/ko
Priority to US08/670,839 priority patent/US5726082A/en
Priority to CN96112233A priority patent/CN1076520C/zh
Priority to JP8171237A priority patent/JPH0923013A/ja
Publication of KR970004079A publication Critical patent/KR970004079A/ko
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76275Vertical isolation by bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281Lateral isolation by selective oxidation of silicon

Abstract

본 발명은 실리콘 기판위에 절연 역활을 하는 실리콘 산화막을 형성하고, 그 위에 실제 사용되는 실리콘기판예를 들어 단결정 실리콘층을 형성하고, 여기에 MOSFET를 제조하는 방법으로 소자의 분리 기술이 용이하고, 소자의 전기적인 특성이 우수한 SOI(silicon on insulator)구조를 갖는 반도체소자 및 그 제조방법에 관한 것이다.

Description

반도체소자 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3A도 및 제3B도는 본 발명에 의해 제조된 SOI MOSFET 구조를 도시한 단면도, 제4도 내지 제6도는 본 발명에 의해 SOI MOSFET를 제조하는 단계를 도시한 단면도.

Claims (7)

  1. SOI 구조를 갖는 MOSFET 소자에 있어서, 제1실리콘기판의 상부에 제1실리콘 산화막이 형성되고, 제1실리콘 산화막 상부의 액티브 지역에 단면의 형상이 사다리꼴 형태로 이루어진 제2실리콘기판이 형성되고, 제2실리콘기판의 가장 자리에는 두꺼운 제2실리콘 산화막이 형성되고, 제2실리콘기판과 상기 제2실리콘 산화막의 상부에 게이트 산화막과 게이트 전극이 일정 폭을 가지고 일정방향으로 형성되고, 상기 게이트전극이 오버랩 되지 않은 지역의 제2실리콘기판에는 소오스/드레인 확산영역이 형성되는 것을 특징으로 하는 반도체소자.
  2. 제1항에 있어서, 상기 제2실리콘기판과 제2실리콘 산화막의 계면에는 문턱 전압을 높게 하기 위하여 도핑영역이 형성된 것을 특징으로 하는 반도체소자.
  3. 제2항에 있어서, 상기 도핑 영역은 제2실리콘기판과는 반대 타입으로 형성하는 것을 특징으로 하는 반도체소자.
  4. SOI 구조를 갖는 MOSFET 제조방법에 있어서, 제1실리콘기판 상부에 제1실리콘 산화막과 제2실리콘 기판층을 형성하고, 그 상부에 얇은 실리콘산화막과 질화막을 적층하는 단계와, 액티브 지역이 아닌 부분의 상기 질화막과 실리콘 산화막을 식각하여 패턴을 형성하는 단계와, 노출된 제2실리콘기판층으로 문턱 전압을 높이기 위하여 기판과는 반대 타입의 불순물을 도핑하여 도핑영역을 형성하는 단계와, 상기 질화막 패턴을 마스크로 상용하여 노출된 제2실리콘기판을 산화시켜 두꺼운 두께의 제2실리콘 산화막을 형성하는 단계와, 상기 질화막과 실리콘 산화막 패턴을 제거하고, 노출된 제2실리콘기판에 게이트산화막과 게이트전극을 형성하는 단계와, 고농도 불순물을 이온주입하여 소오스/드레인 확산영역을 형성하는 단계를 포함하는 소자 제조방법.
  5. 제3항에 있어서, 상기 제2실리콘 산화막은 800~1200℃에서 산화시켜 노출된 제2실리콘기판이 완전히 산화시켜 상기 제2실리콘기판의 높이보다 더 두껍게 형성되도록 하는 것을 특징으로 하는 반도체소자 제조방법.
  6. 제4항에 있어서, 상기 실리콘 산화막과 질화막 사이에 폴리실리콘층을 증착하여 PBL 구조와 같이 공정을 진행하여 제2실리콘 산화막을 형성하는 것을 특징으로 하는 반도체소자 제조방법.
  7. 제4항에 있어서, 상기 문턱 전압을 높이기 위하여 기판과는 반대 타입의 불순물을 도핑하여 도핑영역을 형성하는 단계를 생략하여 공정을 진행하는 것을 특징으로 하는 반도체소자 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950018870A 1995-06-30 1995-06-30 반도체 소자 및 그 제조방법 KR0172548B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019950018870A KR0172548B1 (ko) 1995-06-30 1995-06-30 반도체 소자 및 그 제조방법
US08/670,839 US5726082A (en) 1995-06-30 1996-06-28 Semiconductor device and method for fabricating the same
CN96112233A CN1076520C (zh) 1995-06-30 1996-06-28 半导体器件及其制造方法
JP8171237A JPH0923013A (ja) 1995-06-30 1996-07-01 半導体素子及びその製造方法

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Application Number Priority Date Filing Date Title
KR1019950018870A KR0172548B1 (ko) 1995-06-30 1995-06-30 반도체 소자 및 그 제조방법

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KR970004079A true KR970004079A (ko) 1997-01-29
KR0172548B1 KR0172548B1 (ko) 1999-02-01

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US (1) US5726082A (ko)
JP (1) JPH0923013A (ko)
KR (1) KR0172548B1 (ko)
CN (1) CN1076520C (ko)

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JPH0766424A (ja) 1993-08-20 1995-03-10 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
US5899712A (en) * 1995-08-21 1999-05-04 Hyundai Electronics Industries Co., Ltd. Method for fabricating silicon-on-insulator device
US6093624A (en) * 1997-12-23 2000-07-25 Philips Electronics North America Corporation Method of providing a gettering scheme in the manufacture of silicon-on-insulator (SOI) integrated circuits
US7625783B2 (en) * 2005-11-23 2009-12-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor element and method for manufacturing the same
JP5751146B2 (ja) * 2011-11-24 2015-07-22 住友電気工業株式会社 半導体装置およびその製造方法
CN104362093B (zh) * 2014-10-14 2017-03-22 中国科学院上海微系统与信息技术研究所 一种soi器件结构及其制作方法

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CN1076520C (zh) 2001-12-19
CN1152800A (zh) 1997-06-25
JPH0923013A (ja) 1997-01-21
KR0172548B1 (ko) 1999-02-01
US5726082A (en) 1998-03-10

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