KR960039215A - 박막트랜지스터 오믹콘택형성방법 - Google Patents
박막트랜지스터 오믹콘택형성방법 Download PDFInfo
- Publication number
- KR960039215A KR960039215A KR1019950008526A KR19950008526A KR960039215A KR 960039215 A KR960039215 A KR 960039215A KR 1019950008526 A KR1019950008526 A KR 1019950008526A KR 19950008526 A KR19950008526 A KR 19950008526A KR 960039215 A KR960039215 A KR 960039215A
- Authority
- KR
- South Korea
- Prior art keywords
- amorphous silicon
- silicon layer
- high concentration
- forming
- thin film
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 11
- 239000010409 thin film Substances 0.000 title abstract description 6
- 230000015572 biosynthetic process Effects 0.000 title 1
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract 10
- 229910052751 metal Inorganic materials 0.000 claims abstract 6
- 239000002184 metal Substances 0.000 claims abstract 6
- 238000002844 melting Methods 0.000 claims abstract 3
- 230000008018 melting Effects 0.000 claims abstract 3
- 238000000059 patterning Methods 0.000 claims abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract 2
- 229920005591 polysilicon Polymers 0.000 claims abstract 2
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 claims 1
- 238000009413 insulation Methods 0.000 claims 1
- 229910021344 molybdenum silicide Inorganic materials 0.000 claims 1
- 229910021341 titanium silicide Inorganic materials 0.000 claims 1
- 239000010408 film Substances 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02686—Pulsed laser beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
- H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Optics & Photonics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
Abstract
본 발명은 박막 트랜지스터의 제조방법에 관한 것으로, 특히 엑시머레이저 멜팅(Excimer Laser Melting)방법으로 오믹콘택을 형성하는 박막트랜지스터의 오믹콘택 형성방법에 관한 것이다.
상기 목적을 달성하기 위한 본 발명의 박막트랜지스터 오믹콘택 형성방법은 투명절연기판위에 투명전극, 금속층, 고농도 n형 비정질실리콘층을 차례로 증착하여 소오스 및 드레인영역상에만 남도록 상기 투명전극, 금속층, 고농도 n형 비정질실리콘층을 패터닝하는 제1공정, 상기 소오스 및 드레인상에 걸쳐 비정질실리콘층을 형성하는 제2공정, 상기 전면에 게이트절연막을 형성하고, 소오스 및 드레인영역사이의 채널영역상 게이트 절연막위에 게이트전극을 형성하는 제3공정, 상기 게이트전극을 마스크로 사용하여, 액시머 레이저 멜팅방법으로 게이트전극 양단의 고농도 n형 비정질실리콘층과 비정질실리콘층을 결정화하여 고농도 n형 다결정실리콘층을 형성하는 제4공정을 포함하여 이루어짐을 특징으로 한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 제1실시예 박막트랜지스터 공정단면도, 제3도는 본 발명의 제2실시예 박막트랜지스터 공정단면도.
Claims (3)
- 투명절연기관위에 투명전극, 금속층, 고농도 n형 비정질실리콘층을 차례로 증착하여 소오스 및 드레인영역상에만 남도록 상기 투명전극, 금속층, 고농도 n형 비정질실리콘층을 패터닝하는 제1공정, 상기 소오스 및 드레인상에 걸쳐 비정질실리콘층을 형성하는 제2공정, 상기 전면에 게이트절연막을 형성하고, 소오스 및 드레인영역사이의 채널영역상게이트 절연막위에 게이트전극을 형성하는 제3공정, 상기 게이트전극을 마스크로 사용하여, 액시머 레이저 멜팅방법으로 게이트전극 양단의 고농도 n형 비정질실리콘층과 비정질실리콘층을 결정화하여 고농도 n형 다결정실리콘층을 형성하는 제4공정을 포함하여 이루어짐을 특징으로 하는 박막트랜지스터 오믹콘택 형성방법.
- 제1항에 있어서, 제1공정의 금속층은 몰리브덴실리사이드 또는 티타늄 실리사이드로 형성함을 특징으로 하는 박막 트랜지스터 오믹콘택 형성방법.
- 제1항에 있어서, 금속층을 형성하지 않음을 특징으로 하는 박막 트랜지스터 오믹콘택 형성방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950008526A KR100351872B1 (ko) | 1995-04-12 | 1995-04-12 | 박막트랜지스터오믹콘택형성방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950008526A KR100351872B1 (ko) | 1995-04-12 | 1995-04-12 | 박막트랜지스터오믹콘택형성방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960039215A true KR960039215A (ko) | 1996-11-21 |
KR100351872B1 KR100351872B1 (ko) | 2002-12-28 |
Family
ID=37489164
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950008526A KR100351872B1 (ko) | 1995-04-12 | 1995-04-12 | 박막트랜지스터오믹콘택형성방법 |
Country Status (1)
Country | Link |
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KR (1) | KR100351872B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8921220B2 (en) | 2012-03-23 | 2014-12-30 | Samsung Electronics Co., Ltd. | Selective low-temperature ohmic contact formation method for group III-nitride heterojunction structured device |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100585410B1 (ko) * | 2003-11-11 | 2006-06-07 | 엘지.필립스 엘시디 주식회사 | 구동회로 일체형 액정표시장치의 스위칭 소자 및 구동소자및 그 제조방법 |
-
1995
- 1995-04-12 KR KR1019950008526A patent/KR100351872B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8921220B2 (en) | 2012-03-23 | 2014-12-30 | Samsung Electronics Co., Ltd. | Selective low-temperature ohmic contact formation method for group III-nitride heterojunction structured device |
Also Published As
Publication number | Publication date |
---|---|
KR100351872B1 (ko) | 2002-12-28 |
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