KR940016484A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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KR940016484A
KR940016484A KR1019920023807A KR920023807A KR940016484A KR 940016484 A KR940016484 A KR 940016484A KR 1019920023807 A KR1019920023807 A KR 1019920023807A KR 920023807 A KR920023807 A KR 920023807A KR 940016484 A KR940016484 A KR 940016484A
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layer
diffusion barrier
metal
semiconductor device
forming
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KR960010056B1 (ko
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이상인
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김광호
삼성전자 주식회사
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Priority to DE4342047A priority patent/DE4342047B4/de
Priority to JP5309549A priority patent/JPH077077A/ja
Priority to CN93120818A priority patent/CN1039562C/zh
Priority to US08/164,920 priority patent/US5552341A/en
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Priority to US08/929,419 priority patent/US5939787A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846—Layer combinations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76882—Reflowing or applying of pressure to better fill the contact hole
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
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    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/915—Active solid-state devices, e.g. transistors, solid-state diodes with titanium nitride portion or region

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Abstract

반도체 웨이퍼상에 형성된 그 표면부위에 실리화층을 갖는 확산 방지막을 포함하는 반도체 장치 및 그 제조 방법이 개시되어 있다. 반도체 웨이퍼상에 확산 방지막을 형성하고, 상기 확산 방지막에, 상기 실릴화층을 실리콘 수소화물을 이용한 플라즈마 처리에 의해 또는 SiH4를 이용한 반응성 스퍼터링 방법에 의해 형성시킨다. 상기 실릴화층상에 금속충을 형성하는 경우 확산 방지막과 금속과의 습윤성이 향상되어 입자가 크게 형성되고, 금속층의 접촉구 또는 비아홀에의 단차 도포성을 증가시킨다. 또한, 실리화층상에 금속층을 형성한 후 고온 열처리 하면, 금속층의 리플로우 특성이 좋아져서 접촉구나 비아홀의 매립을 용이하게 한다. 이와 같은 방법으로 배선층을 형성하는 경우 신뢰성이 좋은 금속 배선이 수득되고, 후속 신터 공정이 필요 없게 된다.

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제11도 내지 제13도는 본 발명의 방법에 의한 반도체 장치의 배선층 형성방법의 일 실시예를 나타내기 위한 개략도이고; 제14도 내지 제16도는 본 발명의 방법에 의한 개구부 매몰방법의 일 실시예를 나타내기 위한 개략도이고; 제17도 및 제18도는 본 발명의 방법에 의한 반도체 장치의 배선층 형성방법의 다른 실시예를 나타낸 것이고; 제19도 내지 제21도는 본 발명의 방법에 의한 반도체 장치의 배선층 형성 방법의 또 다른 실시예를 나타내기 위한 개략도이다.

Claims (23)

  1. 반도체 웨이퍼상에 형성되고, 그 표면부위에 실리화층을 갖는 확산 방지막을 포함하는 반도체 장치.
  2. 제 1 항에 있어서, 상기 확산 방지막은 내화금속 또는 내화 금속 화합물로 구성되어 있음을 특징으로 하는 반도체 장치.
  3. 제 2 항에 있어서, 상기 내화금속은 티타늄, 지르코늄, 탄탈륨 및 몰리브덴으로 구성된 군에서 선택된 어느 하나이고, 상기 내화 금속 화합물은 상기 내화금속의 화합물로 구성된 군에서 선택된 어느 하나임을 특징으로 하는 반도체 장치.
  4. 제 2 항에 있어서, 상기 확산 방지막은 내화금속으로 구성된 제 1 확산 방지막과 내화 금속화합물로 구성된 제 2 확산 방지막으로 구성된 복합막임을 특징으로 하는 반도체 장치.
  5. 제 1 항에 있어서, 상기 실릴화층상에 내화 금속 화합물로 구성된 제 3 확산 방지막이 형성되어 있음을 특징으로 하는 반도체 장치.
  6. 반도체 기판상에 형성된 절연막; 상기 절연막에 형성된 요부; 상기 절연막상에 형성되고, 실릴화층을 포함하는 확산 방지막; 상기 요부를 완전히 매립하는 제 1 금속층을 포함하는 반도체 장치.
  7. 제 6 항에 있어서, 상기 요부는 상기 반도체 기판의 불순물 도핑영역을 노출하는 접촉구 또는 반도체 장치의 하부 도전층을 노출하는 비아임을 특징으로 하는 반도체 장치.
  8. 제 6 항에 있어서, 상기 제 1 금속층상에 평탄한 표면을 갖는 제 2 금속층을 더 포함함을 특징으로 하는 반도체 장치.
  9. 반도체 기판상에 확산 방지막을 형성하고, 상기 확산방지막에 실릴화층을 형성시킴을 특징으로 하는 반도체 장치의 제조방법.
  10. 제 9 항에 있어서, 상기 실릴화층을 실리콘 수소화물을 이용한 플라즈마 처리에 의해 형성시킴을 특징으로 하는 반도체 장치의 제조방법.
  11. 제 9 항에 있어서, 상기 실리콘 수소화물로서 SiH4또는 Si2H6를 사용함을 특징으로 하는 반도체 장치의 제조방법.
  12. 제 9 항에 있어서, 상기 실릴화층을 SiH4를 이용한 반응성 스퍼터링 방법에 의해 형성시킴을 특징으로 하는 반도체 장치의 제조방법.
  13. 제 9 항에 있어서, 상기 확산 방지막을 형성한 후, 진공을 깨지 않고 연속적으로, 상기 실릴화층을 형성시킴을 특징으로 하는 반도체 장치의 제조방법.
  14. 제 9 항에 있어서, 상기 확산 방지막은 내화 금속을 증착하여 제 1 확산 방지막을 형성하고, 내화 금속 화합물을 증착하여 제 2 확산 방지막을 형성하여 수득한 복합막임을 특징으로 하는 반도체 장치의 제조방법.
  15. 제14항에 있어서, 상기 확산 방지막에 실릴화층을 형성한 후, 내화 금속 화합물을 증착하여 제 3 확산 방지막을 형성하는 공정을 더 포함함을 특징으로 하는 반도체 장치의 제조방법.
  16. 반도체 웨이퍼상에 내화금속으로 구성된 제 1 확산 방지막을 형성하고, 상기 제 1 확산 방지막상에, 내화금속화합물로 구성된 제 2 확산 방지막을 형성하고, 상기 제 2 확산 방지막상에 실릴화층을 형성한 후, 상기 실릴화층상에 내화 금속화합물로 구성된 제 3 실릴화층을 진공을 깨지않고 연속적으로 형성시킴을 특징으로 하는 반도체 장치의 제조방법.
  17. 반도체 기판상에 절연막을 형성하고, 상기 절연막에 요부를 형성하고, 상기 절연막상에 확산 방지막을 형성하고, 상기확산 방지막상에 실릴화층을 형성하고, 상기 실릴화층상에 제 1 금속층을 형성하는 것으로 구성된 반도체 장치의 제조방법.
  18. 제17항에 있어서, 상기 요부는 반도체 기판의 표면 부위에 형성된 불순물 도핑 영역을 노출하는 접촉구임을 특징으로 하는 반도체 장치의 제조방법.
  19. 제17항에 있어서, 상기 제 1 금속층은 Al 또는 Al합금을 저온에서 증착하여 형성시킨 것임을 특징으로 하는 반도체 장치의 제조방법.
  20. 제17항에 있어서, 상기 제 1 금속층을 형성한 후, 제 1 금속의 용융점 이하의 고온에서, 열처리하여 상기 제 1 금속의 물질로 상기 요부를 매립하는 공정을 더 포함함을 특징으로 하는 반도체 장치의 제조방법.
  21. 제20항에 있어서, 상기 열처리 이후에, 상기 요부를 매립하는 제 1 금속층상에 제 2 금속층을 형성하는 공정을 더 포함하는 것을 특징으로 하는 반도체 장치의 제조방법.
  22. 제21항에 있어서, 상기 제 2 금속층을 제 2 금속의 용융점 이하의 고온에서 열처리 하여 제 2 금속층의 표면을 평탄화하는 공정을 더 포함하는 것을 특징으로 하는 반도체 장치의 제조방법.
  23. 반도체 기판상에 절연막을 형성하고, 상기 절연막에 요부를 형성하고, 상기 절연막상에 확산 방지막을 형성하고, 상기 확산 방지막상에 실릴화층을 형성하고, 상기 실릴화층상에 제 1 금속층을 형성하고, 제 1 금속의 용융점이하의 고온에서, 열처리하여 상기 제 1 금속의 물질로 상기 요부를 매립하고, 상기 요부를 매립하는 제 1 금속층상에 제2 금속층을 형성하고, 상기 제 2 금속층을 제 2 금속의 용융점 이하의 고온에서 열처리하여 제 2 금속층의 표면을 평탄화하는 것으로 구성된 반도체 장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920023807A 1992-12-10 1992-12-10 반도체장치 및 그 제조 방법 KR960010056B1 (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019920023807A KR960010056B1 (ko) 1992-12-10 1992-12-10 반도체장치 및 그 제조 방법
DE4342047A DE4342047B4 (de) 1992-12-10 1993-12-09 Halbleiterbauelement mit einer Diffusionsbarrierenschichtanordnung und Verfahren zu seiner Herstellung
JP5309549A JPH077077A (ja) 1992-12-10 1993-12-09 半導体装置及びその製造方法
CN93120818A CN1039562C (zh) 1992-12-10 1993-12-10 半导体器件及其制造方法
US08/164,920 US5552341A (en) 1992-12-10 1993-12-10 Semiconductor device and method for manufacturing the same
US08/929,419 US5939787A (en) 1992-12-10 1997-09-15 Semiconductor device having a multi-layer contact structure

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CN1039562C (zh) 1998-08-19
CN1090091A (zh) 1994-07-27
KR960010056B1 (ko) 1996-07-25
DE4342047A1 (de) 1994-06-16
US5552341A (en) 1996-09-03
US5939787A (en) 1999-08-17
DE4342047B4 (de) 2004-12-09

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