KR930020835A - 증가-공핍 모드 캐스코드(cascode) 전류 미러 - Google Patents
증가-공핍 모드 캐스코드(cascode) 전류 미러 Download PDFInfo
- Publication number
- KR930020835A KR930020835A KR1019930004070A KR930004070A KR930020835A KR 930020835 A KR930020835 A KR 930020835A KR 1019930004070 A KR1019930004070 A KR 1019930004070A KR 930004070 A KR930004070 A KR 930004070A KR 930020835 A KR930020835 A KR 930020835A
- Authority
- KR
- South Korea
- Prior art keywords
- transistor
- drain
- gate
- source
- current mirror
- Prior art date
Links
- 230000000779 depleting effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0883—Combination of depletion and enhancement field effect transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- Computer Hardware Design (AREA)
- Amplifiers (AREA)
- Control Of Electrical Variables (AREA)
Abstract
고출력 임피던스 및 낮은 포화 전압을 지니며 공정 파라메타에 영향을 받지 않는 개선된 전류원은 캐스코드 디바이스로서 공핍 모드 P-채널 트랜지스터 디바이스를 제공하면서, 전류 미러로서 사용된 증가 P-채널 트랜지스터 디바이스를 지님으로써 달성된다. 다이오드 접속형 공핍 디바이스는 포화 전압을 감소시키도록 전류 기준 트랜지스터의 드레인 및 증가 게이트 사이에 삽입될 수 있다. 상기 다이오드 접속형 공핍 디바이스는, 증가 및 공핍 디바이스 한계, 즉 VT가 온도 또는 공정에 걸쳐 추적하지 못하는 경우조차도 유사한 전압으로 증가 디바이스의 드레인을 유지한다. 따라서, 전류 미러 회로는 보다 높은 출력 임피던스 및 보다 낮은 포화 전압을 제공할뿐만 아니라, 공정 변도에 영향을 받지않는다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제11도 내지 제13도는 본 발명의 원리에 따라 구성된 증가-공핍 모드 캐스코드 전류 미러의 여러 형태의 실시예를 도시한 도면.
Claims (1)
- 소오스, 게이트 및 드레인을 갖는 제1의 증가 모드 MOS 트랜지스터(제1트랜지스터), 소오스, 게이트 및 드레인을 갖는 제2의 증가 모드 MOS 트랜지스터(제2트랜지스터), 소오스, 게이트 및 드레인을 갖는 제3의 공핍모드 MOS 트랜지스터(제3트랜지스터), 및 소오스, 게이트 및 드레인을 갖는 제4의 공핍모드 MOS 트랜지스터 (제4트랜지스터)를 포함하고, 상기 제1트랜지스터의 소오스 및 상기 제2트랜지스터의 소오스가 공통 전압원에연결되어 있으며, 상기 제1트랜지스터의 드레인이 상기 제3트랜지스터의 소오스에 연결되어 있고, 상기 제2트랜지스터의 드레인은 상기 제4트랜지스터의 소오스에 연결되어 있으며, 상기 제1트랜지스터의 게이트가 상기 제2트랜지스터의 게이트, 상기 제3트랜지스터의 게이트 및 상기 제4트랜지스터의 게이트에 연결되어 있고, 상기 제3트랜지스터의 게이트는, 상기 제3트랜지스터가 상기 제1트랜지스터의 드레인 및 상기 제1트랜지스터의 게이트 사이에서 (다이오드로서) 동작하며, 상기 제1트랜지스터의 드레인 및 상기 제2트랜지스터의 드레인을 유사한 전압을 유지시킴으로써 상기 제2 및 제4트랜지스터를 통해 출력 전류를 발생시키도록 상기 제3트랜지스터의 드레인에도 연결되어 있는 전류 미러 회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US85352392A | 1992-03-18 | 1992-03-18 | |
US92-853,523 | 1992-03-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR930020835A true KR930020835A (ko) | 1993-10-20 |
Family
ID=25316262
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930004070A KR930020835A (ko) | 1992-03-18 | 1993-03-17 | 증가-공핍 모드 캐스코드(cascode) 전류 미러 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5311115A (ko) |
EP (1) | EP0561469A3 (ko) |
JP (1) | JPH0613820A (ko) |
KR (1) | KR930020835A (ko) |
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-
1993
- 1993-03-16 EP EP19930200777 patent/EP0561469A3/en not_active Withdrawn
- 1993-03-17 JP JP5057240A patent/JPH0613820A/ja active Pending
- 1993-03-17 KR KR1019930004070A patent/KR930020835A/ko not_active Application Discontinuation
- 1993-08-11 US US08/104,827 patent/US5311115A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0561469A2 (en) | 1993-09-22 |
JPH0613820A (ja) | 1994-01-21 |
EP0561469A3 (en) | 1993-10-06 |
US5311115A (en) | 1994-05-10 |
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