KR930009039A - 방열구조를 갖는 반도체장치 및 그의 제조방법 - Google Patents
방열구조를 갖는 반도체장치 및 그의 제조방법 Download PDFInfo
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- KR930009039A KR930009039A KR1019920019495A KR920019495A KR930009039A KR 930009039 A KR930009039 A KR 930009039A KR 1019920019495 A KR1019920019495 A KR 1019920019495A KR 920019495 A KR920019495 A KR 920019495A KR 930009039 A KR930009039 A KR 930009039A
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- heat dissipation
- dissipation block
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 230000017525 heat dissipation Effects 0.000 title claims abstract 42
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 238000000034 method Methods 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims 11
- 239000002184 metal Substances 0.000 claims 11
- 239000000463 material Substances 0.000 claims 4
- 150000002739 metals Chemical class 0.000 claims 4
- 239000011347 resin Substances 0.000 claims 4
- 229920005989 resin Polymers 0.000 claims 4
- 239000000919 ceramic Substances 0.000 claims 2
- 229910010293 ceramic material Inorganic materials 0.000 claims 2
- 229910052755 nonmetal Inorganic materials 0.000 claims 2
- 150000002843 nonmetals Chemical class 0.000 claims 2
- 230000005855 radiation Effects 0.000 claims 2
- 230000007423 decrease Effects 0.000 claims 1
- 238000000465 moulding Methods 0.000 claims 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 abstract 1
- 238000007789 sealing Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 1
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Abstract
반도체장치(1B)는 중심봉 구멍(11)을 갖고 또한 내부리드(2a)와 외부리드(2b)로된 복수의 리드들을 갖는 리드프레임(2)과, 상기 리드프레임(2)의 구멍(11) 아래에 구비되며 또한 상면부와 하부를 갖는 방열블록(3)과, 상기 방열블록(3)의 상면부와 리드프레임(2)간에 간격이 형성되며, 상기 방열블록(3)의 상면부상에 실장되는 반도체칩(5)과, 상기 반도체칩(5)과 리드들을 접속하는 복수의 와이어들과, 방열블록(3)의 적어도 일부와, 반도체칩(5)과 와이어들과, 리드들중 외부리드(2b)들은 외향으로 나오도록 내부리드(2a)들을 봉지하는 패키지(7)을 구비한다. 패키지(7)는 방열블록(3)의 상면부와 리드프레임(2)간의 간격에 채워지고, 방열블록(3)의 하부는 소정길이만큼 패키지(7)로부터 돌출하여 반도체칩(5)에서 발생된 열을 패키지(7) 외부로 방출한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 의한 반도체 장치의 일실시예를 나타낸 횡단면측면도
제3도는 본 발명에 의한 반도체 장치의 제조방법의 이실시예를 나타낸 횡단면측면도
제4도는 상기 방법의 실시예에서 사용되는 팔레트(palette)의 설명도
Claims (21)
- (a) 지그(jig)(21)의 요홈(21a)바닥에 구성된 경사구멍(22)에 방열블록(3)의 하부를 끼우는 단계와, (b) 중앙부에 구멍(11)을 갖는 리드프레임(2)을 지그(21)상에 위치맞춤하는 단계와, 상기 구멍은 방열블록(3)의 상면부위에 위치되며, (c) 방열블록(3)의 상면부위에 반도체칩(5)을 설치한 다음 반도체칩(5)을 리드프레임(2)에 복수의 와이어(6)에 의해 접속하는 단계와, (d) 하부금속다이(24b)위에 적어도 방열블록(3)을 위치맞춤하는 단계와, (e) 하부금속다이(24b)의 상부위에 상부금속다이(24a)를 위치마춤한 다음 상부와 하부금속다이 내부에 형성된 공동(26)내에 수지를 주입 성형하여 방열블록(3)의 적어도 일부와, 반도체칩(5)과 와이어들(6) 및 리드 프레임(2)의 내부리드(2a)들을 봉지하고 리드 프레임(2)의 외부리드(2b)들은 외향으로 연장되고, 방열블록의 하부는 반도체칩(5)으로부터 발생된 열을 방출하도록 소정길이만큼 돌출되도록 패키지(7)를 형성하는 단계를 포함하는 것이 특징인 반도체장치의 제조방법.
- 제1항에 있어서, 상기 단계(a)는 횡단면에서 거의 역사다리꼴 형상을 갖는 방열 블록(3)을 사용하는 것이 특징인 반도체장치의 제조방법.
- 제1 또는 2항에 있어서, 상기 단계(a)는 패키지(7)를 형성하는 수지보다 큰 열전도율을 가는 재료로 제조된 방열 블록(3)을 사용하는 것이 특징인 반도체장치의 제조방법.
- 제3항에 있어서, 상기 단계(a)는 금속류와 세라믹을 포함하는 비금속류로 구성된 그룹으로부터 선택된 물질로 제조한 방열 블록(3)을 사용하는 것이 특징인 반도체장치의 제조방법.
- 제1~4항중 어느 한항에 있어서, 외부리드들(2b)각각은 방열블록(3)이 돌출하는 방향을 향해 패키지(7)의 저면으로부터 수직길이(L1)을 갖도록 외부리드들(2b)을 거의 S-형상으로 형성하는 단계(f)를 더 포함하며, 상기 단계(a)는 방열블록의 하부가 상기 단계(e)후에 패키지(7)의 저면으로부터 길이(L2)만큼 돌출하여, L1>L2가 되도록 형상화하는 지그(21)를 사용하는 것이 특징인 반도체장치의 제조방법.
- 제1~5항중 어느 한항에 있어서, 상기 단계(a)는 그의 하부에 복수의 장홈들(31)이 형성된 방열 블록(3)을 사용하는 것이 특징인 반도체장치의 제조방법.
- 제1~5항중 어느 한항에 있어서, 상기 단계(a)는 외부방열부재를 체결하기 위해 그의 하부에 체결수단(32)을 구비하고 있는 방열 블록(3)을 사용하는 것이 특징인 반도체장치의 제조방법.
- 제1~5항중 어느 한항에 있어서, 상기 단계(a)는 서로 상이한 금속으로 제조된 상면부(33)와 하부(34)를 갖는 방열 블록(3)을 사용하는 것이 특징인 반도체장치의 제조방법.
- 제1~5항중 어느 한항에 있어서, 상기 단계(a)는 금속층(35)으로 제조된 상면부와 세라믹재로 제조된 하부를 갖는 방열 블록(3)을 사용하는 것이 특징인 반도체장치의 제조방법.
- 제1~9항중 어느 한항에 있어서, 상기 단계(b)는 리드 프레임(2)의 대응구멍들속에 지그(21)의 위치맞춤핀들(23)을 끼워줌으로써 지그(21)상에 리드 프레임(2)을 위치시키는 것이 특징인 반도체장치의 제조방법.
- 제1~10항중 어느 한항에 있어서, 상기 단계(d)는 방열블록(3)과 패키지(7)가 통로(25)를 통해 진공흡이하에서 위치맞춤 되도록 하부금속다이(24b)의 통로(25)에 방열블록의 하부를 위치시킴으로써 방열블록(3)의 하부를 위치시킴으로써 방열블록(3)과 패키지(7)를 위치맞춤하는 것이 특징인 반도체장치의 제조방법.
- 그의 중앙부에 구멍(11)을 갖으며, 내부리드들(2a)와 외부리드(2b)로 각각 구성된 복수의 리드들을 갖는 리드프레임(2)을 포함하는 반도체 장치에 있어서, 상기 리드프레임(2)의 상기 구멍(11) 하부에 설치된 방열블록(3)과, 여기서, 상기 방열블록은 상면부와 하부를 갖고 있고, 상기 방열블록의 상면부와 리드프레임간에는 간격이 형성돼있으며, 상기 방열블록의 상면부상에 설치된 반도체칩(5)과, 상기 반도체칩(5)과 리드를 접속하는 복수의 와이어들(6) 및, 상기 방열블록의 적어도 일부와, 반도체칩, 와이어 및 상기 리드들중 내부리드를 봉지함으로써, 상기 외부리드들이 패키지의 외측으로 뻗도록 하는 패키지(7)를 포함하며, 상기 패키지가 상기 패키지가 상기 방열블록의 상면부와 리드프레임간의 간격을 채우고 있고, 상기 방열블록의 저부가 패키지로부터 소정길이만큼 돌출하여, 반도체칩에서 발생된 열을 패키지외측으로 전도시키는 것을 특징으로 하는 반도체.
- 제12항에 있어서, 상기 방열블록(3)은 하부를 향해 크기가 점진적으로 감소하는 경사형상을 갖는 것이 특징인 반도체.
- 제13항에 있어서, 상기 방열블록(3)은 횡단면이 거의 사다리꼴 형상을 갖는 것이 특징인 반도체장치.
- 제12~14항중 어느 한항에 있어서, 상기 패키지(7)는 수지로 제조되고 또한 상기 방열블록(3)은 수지보다 더 큰 열전도성을 갖는 재료로 제조된 것이 특징인 반도체장치.
- 제15항에 있어서, 상기 방열블록(3)은 금속류와 세라믹을 포함하는 비금속류로 구성된 그룹으로부터 선택된 재료로 제조된 것이 특징인 반도체장치.
- 제12~16항중 어느 한항에 있어서, 상기 외부리드들(2b)은 거의 S-형상을 가지며, 상기 패키지(7)는 상기방열블록(3)의 하부가 돌출하는 저면을 가지며, 외부리드들(2b)각각은 방열블록이 돌출하는 방향을 향해 상기 패키지의 저면으로부터 수직길이(L1)을 가지며, 상기 방열블록의 하부는 상기 패키지의 저면으로부터 길이(L2)만큼 돌출하고, L1>L2인 것이 특징인 반도체장치.
- 제12~17항중 어느 한항에 있어서, 상기 방열블록(3)은 그의 하부에 복수의 장홈들(31)을 갖는 것이 특징인 반도체장치.
- 제12~17항중 어느 한항에 있어서, 상기 방열블록(3)은 외부방열부재를 체결하기 위해 하부에 체결수단(32)을 갖는 것이 특징인 반도체장치.
- 제12~17항중 어느 한항에 있어서, 상기 방열블록(3)의 상면부(33)와 하부(34)는 서로 다른 금속으로 제조되는 것이 특징인 반도체장치.
- 제12~17항중 어느 한항에 있어서, 상기 방열블록(3)의 상면부는 금속층(35)으로 제조되고 또한 상기 방열블록의 하부는 세라믹 재료로 제조되는 것이 특징인 반도체장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3275710A JP2602380B2 (ja) | 1991-10-23 | 1991-10-23 | 半導体装置及びその製造方法 |
JP91-275710 | 1991-10-23 |
Publications (2)
Publication Number | Publication Date |
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KR930009039A true KR930009039A (ko) | 1993-05-22 |
KR960011643B1 KR960011643B1 (ko) | 1996-08-24 |
Family
ID=17559293
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Application Number | Title | Priority Date | Filing Date |
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KR1019920019495A KR960011643B1 (ko) | 1991-10-23 | 1992-10-23 | 방열구조를 갖는 반도체장치 및 그의 제조방법 |
Country Status (5)
Country | Link |
---|---|
US (2) | US5444025A (ko) |
EP (1) | EP0539095B1 (ko) |
JP (1) | JP2602380B2 (ko) |
KR (1) | KR960011643B1 (ko) |
DE (1) | DE69224343T2 (ko) |
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- 1992-10-15 DE DE69224343T patent/DE69224343T2/de not_active Expired - Fee Related
- 1992-10-15 EP EP92309415A patent/EP0539095B1/en not_active Expired - Lifetime
- 1992-10-23 KR KR1019920019495A patent/KR960011643B1/ko not_active IP Right Cessation
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KR19980039675A (ko) * | 1996-11-28 | 1998-08-17 | 황인길 | 반도체 패키지의 구조 |
Also Published As
Publication number | Publication date |
---|---|
EP0539095A3 (ko) | 1994-02-16 |
EP0539095A2 (en) | 1993-04-28 |
JP2602380B2 (ja) | 1997-04-23 |
JPH05114669A (ja) | 1993-05-07 |
US5659200A (en) | 1997-08-19 |
DE69224343D1 (de) | 1998-03-12 |
EP0539095B1 (en) | 1998-02-04 |
KR960011643B1 (ko) | 1996-08-24 |
US5444025A (en) | 1995-08-22 |
DE69224343T2 (de) | 1998-06-10 |
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