KR930003297A - 반도체장치용 테이프 케리어 및 그 제조방법 - Google Patents

반도체장치용 테이프 케리어 및 그 제조방법 Download PDF

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Publication number
KR930003297A
KR930003297A KR1019920013599A KR920013599A KR930003297A KR 930003297 A KR930003297 A KR 930003297A KR 1019920013599 A KR1019920013599 A KR 1019920013599A KR 920013599 A KR920013599 A KR 920013599A KR 930003297 A KR930003297 A KR 930003297A
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South Korea
Prior art keywords
tape carrier
conductor
semiconductor device
electrode
manufacturing
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KR1019920013599A
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English (en)
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KR960002766B1 (ko
Inventor
신 나카오
Original Assignee
시키모리야
미쓰비시덴키 가부시키가이샤
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Publication of KR930003297A publication Critical patent/KR930003297A/ko
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Publication of KR960002766B1 publication Critical patent/KR960002766B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

내용 없음.

Description

반도체장치용 테이프 케리어 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 한 실시예에 의한 테이프케리어의 측면단면도,
제2도는 제1도의 테이프케리어를 제조할 때 사용하는 평판상(狀) 기판의 측면단면도,
제3도는 제2도의 평판상기판상에 테스트용 전극 및 절연층이 형성된 상태를 표시하는 측면단면도.

Claims (2)

  1. 패턴(Pattern) 형성된 복수의 도체층과, 이 도체층에 교호로 복수패턴형성에 의해 적층된 절연층과, 상기 도체층에 도체패턴으로 전기적으로 접속되어 형성된 테스트용전극과, 상기 도체패턴으로 전기적으로 접속되어 형성되어, 반도체소자의 전극과 접속되는 접속부와, 상기 반도체소자를 올려놓기 위한 개공부를 구비한 반도체장치용 테이프케리어.
  2. 평판상의 기판상에 박리제를 바르고, 이 박리제상에 절연층 및 도체층을 사진제판, 에칭등에 의해 반복해 패턴 형성함으로써, 반도체소자가 올려놓여지는 개공부, 반도체소자를 테스트하는 테스트용 전극 및 반도체소자의 전극과 접속되는 접속부를 포함하는 테이프케리어를 형성하고 계속해, 이 테이프케리어를 상기 기판으로부터 박리하는 것을 특징으로 하는 반도체장치용 테이프케리어의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019920013599A 1991-07-30 1992-07-29 반도체장치용 테이프케리어 및 그 제조방법 KR960002766B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3189863A JPH0536756A (ja) 1991-07-30 1991-07-30 半導体装置用テープキヤリア及びその製造方法
JP91-189863 1991-07-30

Publications (2)

Publication Number Publication Date
KR930003297A true KR930003297A (ko) 1993-02-24
KR960002766B1 KR960002766B1 (ko) 1996-02-26

Family

ID=16248442

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920013599A KR960002766B1 (ko) 1991-07-30 1992-07-29 반도체장치용 테이프케리어 및 그 제조방법

Country Status (4)

Country Link
US (1) US5366794A (ko)
JP (1) JPH0536756A (ko)
KR (1) KR960002766B1 (ko)
DE (1) DE4203114C2 (ko)

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* Cited by examiner, † Cited by third party
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KR101032368B1 (ko) * 2008-07-30 2011-05-03 주식회사 지닌 촬영 장치를 이용한 다트 게임의 점수 계산 장치 및 방법

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CA2138218C (en) * 1993-12-16 2000-10-10 Shinji Tanaka Process for delaminating organic resin from board and process for manufacturing organic resin multi-layer wiring board
DE19510276C2 (de) * 1995-03-21 2002-11-14 Infineon Technologies Ag Verfahren zur Handhabung von elektronischen Bauelementen
FR2736206B1 (fr) * 1995-06-30 1997-08-08 Commissariat Energie Atomique Procede de realisation d'un substrat d'interconnexion permettant de connecter une puce sur un substrat de reception
US5822856A (en) * 1996-06-28 1998-10-20 International Business Machines Corporation Manufacturing circuit board assemblies having filled vias
US6627998B1 (en) * 2000-07-27 2003-09-30 International Business Machines Corporation Wafer scale thin film package
US7115986B2 (en) 2001-05-02 2006-10-03 Micron Technology, Inc. Flexible ball grid array chip scale packages
SG122743A1 (en) 2001-08-21 2006-06-29 Micron Technology Inc Microelectronic devices and methods of manufacture
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US20040036170A1 (en) 2002-08-20 2004-02-26 Lee Teck Kheng Double bumping of flexible substrate for first and second level interconnects
JP4745007B2 (ja) * 2005-09-29 2011-08-10 三洋電機株式会社 半導体装置及びその製造方法
CN104937448B (zh) * 2013-09-06 2017-05-24 亚斯卡奈特股份有限公司 具备平行配置的光反射部的光控制面板的制造方法

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101032368B1 (ko) * 2008-07-30 2011-05-03 주식회사 지닌 촬영 장치를 이용한 다트 게임의 점수 계산 장치 및 방법

Also Published As

Publication number Publication date
DE4203114A1 (de) 1993-02-04
DE4203114C2 (de) 1996-11-21
JPH0536756A (ja) 1993-02-12
KR960002766B1 (ko) 1996-02-26
US5366794A (en) 1994-11-22

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