KR890009068A - 레벨변환회로 - Google Patents

레벨변환회로 Download PDF

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Publication number
KR890009068A
KR890009068A KR1019880015349A KR880015349A KR890009068A KR 890009068 A KR890009068 A KR 890009068A KR 1019880015349 A KR1019880015349 A KR 1019880015349A KR 880015349 A KR880015349 A KR 880015349A KR 890009068 A KR890009068 A KR 890009068A
Authority
KR
South Korea
Prior art keywords
level conversion
bias voltage
circuit
conversion circuit
input
Prior art date
Application number
KR1019880015349A
Other languages
English (en)
Other versions
KR920003597B1 (ko
Inventor
데츠야 이다
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR890009068A publication Critical patent/KR890009068A/ko
Application granted granted Critical
Publication of KR920003597B1 publication Critical patent/KR920003597B1/ko

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/09—Resistor-transistor logic

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

내용 없음

Description

레벨변환회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 ECL-CMOS 레벨변환회로의 한 실시예를 나타낸 회로도.
제2도는 본 발명의 다른 실시예를 나타낸 회로도.

Claims (3)

  1. ECL회로(1)의 한 출력노드와 증폭동작할 수 있도록 입력바이어스전압이 가해진 CMOS인버터회로(11;17)의 입력노드 사이를 결합용량(3;13)을 매개하여 접속시켜서 이루어진 것을 특징으로 하는 레벨변환기.
  2. 제1항에 있어서, 상기 CMOS인버터회로(11)의 출력노드와 입력노드 사이에 자기바이어스공급용 저항소자(15)를 접속시켜 입력바이어스전압을 부여하도록 된 것을 특징으로 하는 레벨변환회로.
  3. 제1항에 있어서, 상기 CMOS인버터회로(17)에 입력바이어스 전압을 공급하기 위한 바이어스전압발생회로(18,16)가 CMOS회로(2)내에 설치된 것을 특징으로 하는 레벨변환회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880015349A 1987-11-26 1988-11-22 레벨변환회로 KR920003597B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62297961A JPH01138813A (ja) 1987-11-26 1987-11-26 Ｅｃｌ―ｃｍｏｓレベル変換回路
JP62-297961 1987-11-26

Publications (2)

Publication Number Publication Date
KR890009068A true KR890009068A (ko) 1989-07-15
KR920003597B1 KR920003597B1 (ko) 1992-05-04

Family

ID=17853330

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880015349A KR920003597B1 (ko) 1987-11-26 1988-11-22 레벨변환회로

Country Status (4)

Country Link
US (1) US4906871A (ko)
EP (1) EP0318018A3 (ko)
JP (1) JPH01138813A (ko)
KR (1) KR920003597B1 (ko)

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US4958132A (en) * 1989-05-09 1990-09-18 Advanced Micro Devices, Inc. Complementary metal-oxide-semiconductor translator
US4968905A (en) * 1989-08-25 1990-11-06 Ncr Corporation Temperature compensated high speed ECL-to-CMOS logic level translator
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US4998028A (en) * 1990-01-26 1991-03-05 International Business Machines Corp. High speed CMOS logic device for providing ECL compatible logic levels
US5038057A (en) * 1990-05-29 1991-08-06 Motorola, Inc. ECL to CMOS logic translator
US5182473A (en) * 1990-07-31 1993-01-26 Cray Research, Inc. Emitter emitter logic (EEL) and emitter collector dotted logic (ECDL) families
US5148059A (en) * 1991-04-02 1992-09-15 International Business Machines Corporation CMOS and ECL logic circuit requiring no interface circuitry
US5254887A (en) * 1991-06-27 1993-10-19 Nec Corporation ECL to BiCMIS level converter
KR940001816B1 (ko) * 1991-07-26 1994-03-09 삼성전자 주식회사 슬루우레이트 스피드엎 회로
US5202594A (en) * 1992-02-04 1993-04-13 Motorola, Inc. Low power level converter
US5319252A (en) * 1992-11-05 1994-06-07 Xilinx, Inc. Load programmable output buffer
JPH0746098A (ja) * 1993-08-03 1995-02-14 Nec Corp 遅延回路
US5682108A (en) * 1995-05-17 1997-10-28 Integrated Device Technology, Inc. High speed level translator
CN1183587C (zh) * 1996-04-08 2005-01-05 德克萨斯仪器股份有限公司 用于把两个集成电路直流上相互隔离的方法和设备
US5754059A (en) * 1997-01-14 1998-05-19 International Business Machines Corporation Multi-stage ECL-to-CMOS converter with wide dynamic range and high symmetry
US5973508A (en) * 1997-05-21 1999-10-26 International Business Machines Corp. Voltage translation circuit for mixed voltage applications
TW381385B (en) 1997-08-20 2000-02-01 Advantest Corp Signal transmission circuit, CMOS semiconductor device and circuit board
DE19801994C1 (de) * 1998-01-20 1999-08-26 Siemens Ag Referenzspannungsgenerator
US6252421B1 (en) * 1998-07-27 2001-06-26 Texas Instruments Incorporated Differential, high speed, ECL to CMOS converter
JP3609977B2 (ja) * 1999-07-15 2005-01-12 シャープ株式会社 レベルシフト回路および画像表示装置
DE19949843C2 (de) * 1999-10-15 2002-03-21 Siemens Ag Anordnung zur Pegelumsetzung von hochfrequenten Niedervoltsignalen
WO2001047111A2 (en) * 1999-12-21 2001-06-28 Teradyne, Inc. Capacitively coupled re-referencing circuit with positive feedback
EP1164699A1 (de) * 2000-06-14 2001-12-19 Infineon Technologies AG Schaltungsanordnung zur Umsetzung von Logikpegeln
US6621144B2 (en) * 2001-04-05 2003-09-16 Koninklijke Philips Electronics N.V. Data receiver gain enhancement
JP3596540B2 (ja) * 2001-06-26 2004-12-02 セイコーエプソン株式会社 レベルシフタ及びそれを用いた電気光学装置
US6507220B1 (en) * 2001-09-28 2003-01-14 Xilinx, Inc. Correction of duty-cycle distortion in communications and other circuits
KR100487947B1 (ko) * 2002-11-22 2005-05-06 삼성전자주식회사 클럭 스퀘어 회로
US7176720B1 (en) * 2003-03-14 2007-02-13 Cypress Semiconductor Corp. Low duty cycle distortion differential to CMOS translator
JP2005266043A (ja) * 2004-03-17 2005-09-29 Hitachi Displays Ltd 画像表示パネルおよびレベルシフト回路
US7064598B2 (en) * 2004-03-25 2006-06-20 Silicon Laboratories, Inc. Radio frequency CMOS buffer circuit and method
US7979036B2 (en) * 2004-12-30 2011-07-12 Agency For Science, Technology And Research Fully integrated ultra wideband transmitter circuits and systems
TW200715092A (en) * 2005-10-06 2007-04-16 Denmos Technology Inc Current bias circuit and current bias start-up circuit thereof
JP2007259122A (ja) * 2006-03-23 2007-10-04 Renesas Technology Corp 通信用半導体集積回路
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US8729954B2 (en) * 2011-08-31 2014-05-20 Freescale Semiconductor, Inc. MOFSET mismatch characterization circuit
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Also Published As

Publication number Publication date
EP0318018A2 (en) 1989-05-31
EP0318018A3 (en) 1990-05-02
JPH01138813A (ja) 1989-05-31
KR920003597B1 (ko) 1992-05-04
US4906871A (en) 1990-03-06

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