KR880000962A - 반도체장치 - Google Patents

반도체장치 Download PDF

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Publication number
KR880000962A
KR880000962A KR1019870006541A KR870006541A KR880000962A KR 880000962 A KR880000962 A KR 880000962A KR 1019870006541 A KR1019870006541 A KR 1019870006541A KR 870006541 A KR870006541 A KR 870006541A KR 880000962 A KR880000962 A KR 880000962A
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KR
South Korea
Prior art keywords
word line
semiconductor device
auxiliary
main
lines
Prior art date
Application number
KR1019870006541A
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English (en)
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KR930004709B1 (ko
Inventor
히로시 이노우에
Original Assignee
하시모도 나미오
오끼뎅끼 고오교오 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 하시모도 나미오, 오끼뎅끼 고오교오 가부시끼가이샤 filed Critical 하시모도 나미오
Publication of KR880000962A publication Critical patent/KR880000962A/ko
Application granted granted Critical
Publication of KR930004709B1 publication Critical patent/KR930004709B1/ko

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/14Word line organisation; Word line lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음

Description

반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 디램 특히 본 발명 실시예의 워드선 배열을 보여주는 평면도. 제5도는 제4도에서의 V-V선 확대 단면도. 제6도는 제4에서의 Ⅵ-Ⅵ:선 확대 종단면도.

Claims (8)

  1. 서로 평행으로 연장하는 다수의 워드선을 가지고 있는 기억셀어레이 구조를 갖춘 반도체장치에 있어서, 그 안의 각 워드선은 워드선 전장에 걸쳐 연장하는 주워드선과, 오직 워드선 위를 따라서만 연장하는 보조워드선으로 이루어져 있고 인접워드선의 보조워드선은 길게 겹치지 않게 되는 반도체장치.
  2. 제1항에 있어서 보조워드선과 그 대응하는 주워드선이 접점에 의해 연결되는 반도체장치.
  3. 제2항에 있어서 접점은 보조워드선 각 가닥의 양끝에서 되는 반도체장치.
  4. 제1항에 있어서 보조워드선은 주워드선보다 작은 저항을 가진 재료로 형성되는 반도체장치.
  5. 제1항에 있어서 주워드선은 폴리사이드로 형성되는 반도체장치.
  6. 제1항에 있어서 보조워드선은 금속으로 형성되는 반도체장치.
  7. 제 1 항에 있어서 워드선 전장 구획들로 나누어 지고 교번 워드선의 홀수구획은 보조워드선으로 구성되고 중간워드선의 짝수 구획은 보조워드선으로 구성되어 있는 반도체장치.
  8. 제7항에 있어서 구획들은 실질상 동일한 길이를 가지고 있는 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019870006541A 1986-06-27 1987-06-26 반도체 장치 KR930004709B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP61-149403 1986-06-27
JP149403 1986-06-27
JP61149403A JP2511415B2 (ja) 1986-06-27 1986-06-27 半導体装置

Publications (2)

Publication Number Publication Date
KR880000962A true KR880000962A (ko) 1988-03-30
KR930004709B1 KR930004709B1 (ko) 1993-06-03

Family

ID=15474368

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870006541A KR930004709B1 (ko) 1986-06-27 1987-06-26 반도체 장치

Country Status (3)

Country Link
US (1) US4827449A (ko)
JP (1) JP2511415B2 (ko)
KR (1) KR930004709B1 (ko)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2569040B2 (ja) * 1987-03-18 1997-01-08 株式会社日立製作所 半導体集積回路装置
US5332914A (en) * 1988-02-05 1994-07-26 Emanuel Hazani EEPROM cell structure and architecture with increased capacitance and with programming and erase terminals shared between several cells
KR0141495B1 (ko) * 1988-11-01 1998-07-15 미다 가쓰시게 반도체 기억장치 및 그 결함구제방법
US6212089B1 (en) * 1996-03-19 2001-04-03 Hitachi, Ltd. Semiconductor memory device and defect remedying method thereof
JPH07114077B2 (ja) * 1989-06-01 1995-12-06 三菱電機株式会社 不揮発性半導体記憶装置
KR930008310B1 (ko) * 1991-02-05 1993-08-27 삼성전자 주식회사 반도체 메모리장치의 워드라인드라이버단 배치방법
DE4115909C1 (ko) * 1991-05-15 1992-11-12 Siemens Ag, 8000 Muenchen, De
JP3186084B2 (ja) * 1991-05-24 2001-07-11 日本電気株式会社 半導体メモリー装置
JPH0828476B2 (ja) * 1991-06-07 1996-03-21 富士通株式会社 半導体装置及びその製造方法
US5251168A (en) * 1991-07-31 1993-10-05 Texas Instruments Incorporated Boundary cells for improving retention time in memory devices
EP0704901B1 (en) * 1994-09-30 1999-12-15 STMicroelectronics S.r.l. Tolerant integrated circuit to great manufacturing faults
KR0137320B1 (ko) * 1994-12-15 1998-04-29 김광호 반도체 메모리장치의 워드라인 디코딩회로
JP3411129B2 (ja) * 1995-07-03 2003-05-26 沖電気工業株式会社 半導体メモリ
EP0817269B1 (en) * 1996-06-28 2008-09-10 Texas Instruments Incorporated Wordline layout for semiconductor memory device
TW353181B (en) * 1996-06-28 1999-02-21 Texas Instruments Inc Circuit with matched delay word line strap
US6141236A (en) * 1999-03-10 2000-10-31 Alliance Semiconductor Corporation Interleaved stitch using segmented word lines
JP3386038B2 (ja) * 2000-06-22 2003-03-10 セイコーエプソン株式会社 半導体記憶装置
US7042030B2 (en) * 2003-11-21 2006-05-09 Texas Instruments Incorporated High density memory array
DE102004008245B3 (de) * 2004-02-19 2005-09-08 Infineon Technologies Ag Integrierter Halbleiterspeicher und Verfahren zum elektrischen Stressen eines integrierten Halbleiterspeichers
JP4871038B2 (ja) * 2006-06-27 2012-02-08 王子製紙株式会社 隠蔽用粘着シートおよび剥離シート付き隠蔽用粘着シート

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4464734A (en) * 1980-04-07 1984-08-07 Texas Instruments Incorporated Semiconductor dynamic memory cell array with word lines extending into windows of capacitor plate
JPS60167361A (ja) * 1984-02-09 1985-08-30 Fujitsu Ltd 半導体記憶装置
JPS61110459A (ja) * 1984-11-02 1986-05-28 Nippon Telegr & Teleph Corp <Ntt> 半導体メモリ

Also Published As

Publication number Publication date
JP2511415B2 (ja) 1996-06-26
KR930004709B1 (ko) 1993-06-03
JPS636870A (ja) 1988-01-12
US4827449A (en) 1989-05-02

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