KR870011695A - 반도체기억장치의 제조방법 - Google Patents

반도체기억장치의 제조방법

Info

Publication number
KR870011695A
KR870011695A KR1019870004316A KR870004316A KR870011695A KR 870011695 A KR870011695 A KR 870011695A KR 1019870004316 A KR1019870004316 A KR 1019870004316A KR 870004316 A KR870004316 A KR 870004316A KR 870011695 A KR870011695 A KR 870011695A
Authority
KR
South Korea
Prior art keywords
manufacturing
memory device
semiconductor memory
semiconductor
memory
Prior art date
Application number
KR1019870004316A
Other languages
English (en)
Other versions
KR910002039B1 (ko
Inventor
아키히로 니타야마
Original Assignee
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 도시바 filed Critical 가부시키가이샤 도시바
Publication of KR870011695A publication Critical patent/KR870011695A/ko
Application granted granted Critical
Publication of KR910002039B1 publication Critical patent/KR910002039B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
KR1019870004316A 1986-05-02 1987-05-02 반도체기억장치의 제조방법 KR910002039B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP61-102456 1986-05-02
JP61102456A JPS62259464A (ja) 1986-05-02 1986-05-02 半導体記憶装置の製造方法

Publications (2)

Publication Number Publication Date
KR870011695A true KR870011695A (ko) 1987-12-26
KR910002039B1 KR910002039B1 (ko) 1991-03-30

Family

ID=14327968

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870004316A KR910002039B1 (ko) 1986-05-02 1987-05-02 반도체기억장치의 제조방법

Country Status (4)

Country Link
US (1) US4784969A (ko)
JP (1) JPS62259464A (ko)
KR (1) KR910002039B1 (ko)
DE (1) DE3714338A1 (ko)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0824169B2 (ja) * 1989-05-10 1996-03-06 富士通株式会社 半導体記憶装置の製造方法
US5065273A (en) * 1990-12-04 1991-11-12 International Business Machines Corporation High capacity DRAM trench capacitor and methods of fabricating same
DE4132140A1 (de) * 1991-09-26 1993-04-08 Siemens Ag Verfahren zur herstellung einer selbstjustierten kontaktlochanordnung und selbstjustierte kontaktlochanordnung
US5395784A (en) * 1993-04-14 1995-03-07 Industrial Technology Research Institute Method of manufacturing low leakage and long retention time DRAM
US5406515A (en) * 1993-12-01 1995-04-11 International Business Machines Corporation Method for fabricating low leakage substrate plate trench DRAM cells and devices formed thereby
US6750091B1 (en) * 1996-03-01 2004-06-15 Micron Technology Diode formation method
US5998821A (en) * 1997-05-21 1999-12-07 Kabushiki Kaisha Toshiba Dynamic ram structure having a trench capacitor
JP2003197770A (ja) * 2001-12-25 2003-07-11 Mitsubishi Electric Corp 半導体装置およびその製造方法
US8480569B2 (en) * 2006-05-18 2013-07-09 Smart Medical Systems Ltd. Flexible endoscope system and functionality

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5812739B2 (ja) * 1975-05-07 1983-03-10 株式会社日立製作所 半導体記憶装置
DE3243125A1 (de) * 1982-11-22 1984-05-24 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von mos-transistoren mit flachen source/drain-gebieten, selbstjustierten polysiliziumkontakten und kurzen kanallaengen
JPS60152058A (ja) * 1984-01-20 1985-08-10 Toshiba Corp 半導体記憶装置
JPS60175448A (ja) * 1984-02-21 1985-09-09 Toshiba Corp 半導体記憶装置及びその製造方法
US4658283A (en) * 1984-07-25 1987-04-14 Hitachi, Ltd. Semiconductor integrated circuit device having a carrier trapping trench arrangement
DE3681490D1 (de) * 1985-04-01 1991-10-24 Nec Corp Dynamische speicheranordnung mit wahlfreiem zugriff mit einer vielzahl von eintransistorspeicherzellen.

Also Published As

Publication number Publication date
DE3714338C2 (ko) 1991-12-19
US4784969A (en) 1988-11-15
DE3714338A1 (de) 1987-11-05
KR910002039B1 (ko) 1991-03-30
JPS62259464A (ja) 1987-11-11

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Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee