KR20070003818A - 다중 직렬 선택 장치들을 통합하는 낸드 메모리 어레이 및상기 어레이의 동작 방법 - Google Patents

다중 직렬 선택 장치들을 통합하는 낸드 메모리 어레이 및상기 어레이의 동작 방법 Download PDF

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KR20070003818A
KR20070003818A KR1020067013554A KR20067013554A KR20070003818A KR 20070003818 A KR20070003818 A KR 20070003818A KR 1020067013554 A KR1020067013554 A KR 1020067013554A KR 20067013554 A KR20067013554 A KR 20067013554A KR 20070003818 A KR20070003818 A KR 20070003818A
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South Korea
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nand string
memory
voltage
string
devices
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Korean (ko)
Inventor
언-싱 천
앤드류 제이. 워커
로이 이. 쇼이어를레인
슈케타 날라모스우
알퍼 일크바하르
루카 지. 파소리
제임스 엠. 클리브스
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쌘디스크 3디 엘엘씨
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
KR1020067013554A 2003-12-05 2004-12-02 다중 직렬 선택 장치들을 통합하는 낸드 메모리 어레이 및상기 어레이의 동작 방법 Withdrawn KR20070003818A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/729,865 US20050128807A1 (en) 2003-12-05 2003-12-05 Nand memory array incorporating multiple series selection devices and method for operation of same
US10/729,865 2003-12-05

Publications (1)

Publication Number Publication Date
KR20070003818A true KR20070003818A (ko) 2007-01-05

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KR1020067013554A Withdrawn KR20070003818A (ko) 2003-12-05 2004-12-02 다중 직렬 선택 장치들을 통합하는 낸드 메모리 어레이 및상기 어레이의 동작 방법

Country Status (6)

Country Link
US (1) US20050128807A1 (enExample)
EP (1) EP1695356A2 (enExample)
JP (1) JP2007513455A (enExample)
KR (1) KR20070003818A (enExample)
CN (1) CN1906700A (enExample)
WO (1) WO2005057586A2 (enExample)

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KR20130007417A (ko) * 2011-06-23 2013-01-18 매크로닉스 인터내셔널 컴퍼니 리미티드 메모리 스트링 내에 다이오드를 구비하는 3차원 어레이의 메모리 구조
KR20240013012A (ko) * 2022-07-21 2024-01-30 경북대학교 산학협력단 공핍모드 및 다중 문턱전압을 갖는 mosfet을 사용하는 3진 논리 회로 설계 방법 및 이를 수행하기 위한 장치 및 기록 매체
US12530514B2 (en) 2022-07-21 2026-01-20 Kyungpook National University Industry-Academic Cooperation Foundation Method of designing ternary logic circuit using MOSFETs having depletion-mode and multi-VTHS, and device and recording medium for performing the same

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KR101691088B1 (ko) 2010-02-17 2016-12-29 삼성전자주식회사 불휘발성 메모리 장치, 그것의 동작 방법, 그리고 그것을 포함하는 메모리 시스템
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WO2005057586A2 (en) 2005-06-23
CN1906700A (zh) 2007-01-31

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