KR20030078023A - 반도체 디바이스 및 이를 이용한 반도체 메모리 - Google Patents

반도체 디바이스 및 이를 이용한 반도체 메모리 Download PDF

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Publication number
KR20030078023A
KR20030078023A KR10-2003-0018958A KR20030018958A KR20030078023A KR 20030078023 A KR20030078023 A KR 20030078023A KR 20030018958 A KR20030018958 A KR 20030018958A KR 20030078023 A KR20030078023 A KR 20030078023A
Authority
KR
South Korea
Prior art keywords
source
transistor
drain regions
cell transistors
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR10-2003-0018958A
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English (en)
Korean (ko)
Inventor
미이다다카시
Original Assignee
이노텍 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이노텍 가부시기가이샤 filed Critical 이노텍 가부시기가이샤
Publication of KR20030078023A publication Critical patent/KR20030078023A/ko
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/687—Floating-gate IGFETs having more than two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR10-2003-0018958A 2002-03-27 2003-03-26 반도체 디바이스 및 이를 이용한 반도체 메모리 Withdrawn KR20030078023A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2002089744 2002-03-27
JPJP-P-2002-00089744 2002-03-27
JPJP-P-2003-00036005 2003-02-14
JP2003036005A JP4472934B2 (ja) 2002-03-27 2003-02-14 半導体装置および半導体メモリ

Publications (1)

Publication Number Publication Date
KR20030078023A true KR20030078023A (ko) 2003-10-04

Family

ID=27807028

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2003-0018958A Withdrawn KR20030078023A (ko) 2002-03-27 2003-03-26 반도체 디바이스 및 이를 이용한 반도체 메모리

Country Status (6)

Country Link
US (2) US6984863B2 (enExample)
EP (1) EP1349215A2 (enExample)
JP (1) JP4472934B2 (enExample)
KR (1) KR20030078023A (enExample)
CN (1) CN1447436A (enExample)
TW (1) TW200308079A (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004214495A (ja) * 2003-01-07 2004-07-29 Innotech Corp トランジスタとそれを用いた半導体メモリ、および半導体メモリの製造方法
US6914825B2 (en) * 2003-04-03 2005-07-05 Ememory Technology Inc. Semiconductor memory device having improved data retention
US6936883B2 (en) * 2003-04-07 2005-08-30 Silicon Storage Technology, Inc. Bi-directional read/program non-volatile floating gate memory cell and array thereof, and method of formation
US6967143B2 (en) * 2003-04-30 2005-11-22 Freescale Semiconductor, Inc. Semiconductor fabrication process with asymmetrical conductive spacers
US7192876B2 (en) * 2003-05-22 2007-03-20 Freescale Semiconductor, Inc. Transistor with independent gate structures
JP4532405B2 (ja) * 2003-06-04 2010-08-25 富士通セミコンダクター株式会社 不揮発性半導体メモリ
US7202523B2 (en) * 2003-11-17 2007-04-10 Micron Technology, Inc. NROM flash memory devices on ultrathin silicon
KR100618819B1 (ko) * 2004-02-06 2006-08-31 삼성전자주식회사 오버레이 마진이 개선된 반도체 소자 및 그 제조방법
JP4557678B2 (ja) * 2004-02-13 2010-10-06 イノテック株式会社 半導体記憶装置
US7087950B2 (en) * 2004-04-30 2006-08-08 Infineon Technologies Ag Flash memory cell, flash memory device and manufacturing method thereof
JP5164405B2 (ja) * 2006-03-21 2013-03-21 株式会社半導体エネルギー研究所 不揮発性半導体記憶装置
KR101488516B1 (ko) * 2006-03-21 2015-02-02 가부시키가이샤 한도오따이 에네루기 켄큐쇼 불휘발성 반도체 기억장치
JP5164406B2 (ja) * 2006-03-21 2013-03-21 株式会社半導体エネルギー研究所 不揮発性半導体記憶装置
TWI416738B (zh) * 2006-03-21 2013-11-21 Semiconductor Energy Lab 非揮發性半導體記憶體裝置
EP1837917A1 (en) * 2006-03-21 2007-09-26 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
JP2007288175A (ja) * 2006-03-21 2007-11-01 Semiconductor Energy Lab Co Ltd 不揮発性半導体記憶装置
JP5164404B2 (ja) * 2006-03-21 2013-03-21 株式会社半導体エネルギー研究所 不揮発性半導体記憶装置
JP5466815B2 (ja) * 2006-03-31 2014-04-09 株式会社半導体エネルギー研究所 半導体装置
EP1840947A3 (en) 2006-03-31 2008-08-13 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
JP5483659B2 (ja) * 2006-03-31 2014-05-07 株式会社半導体エネルギー研究所 半導体装置
JP2007294911A (ja) * 2006-03-31 2007-11-08 Semiconductor Energy Lab Co Ltd 不揮発性半導体記憶装置
US7755132B2 (en) 2006-08-16 2010-07-13 Sandisk Corporation Nonvolatile memories with shaped floating gates
US7494860B2 (en) * 2006-08-16 2009-02-24 Sandisk Corporation Methods of forming nonvolatile memories with L-shaped floating gates
JP5270205B2 (ja) 2008-03-24 2013-08-21 株式会社Ｄｎｐファインケミカル インクジェット記録用油性緑色インク組成物およびインクジェット記録用油性インクセット
KR101096907B1 (ko) * 2009-10-05 2011-12-22 주식회사 하이닉스반도체 반도체 소자 및 그 형성방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5379255A (en) 1992-12-14 1995-01-03 Texas Instruments Incorporated Three dimensional famos memory devices and methods of fabricating
JP4397491B2 (ja) 1999-11-30 2010-01-13 財団法人国際科学振興財団 １１１面方位を表面に有するシリコンを用いた半導体装置およびその形成方法
JP3249811B1 (ja) 2000-11-09 2002-01-21 イノテック株式会社 半導体記憶装置、その製造方法及び半導体記憶装置の駆動方法
JP3249812B1 (ja) 2001-05-14 2002-01-21 イノテック株式会社 半導体記憶装置及びその製造方法
JP3283872B1 (ja) 2001-04-12 2002-05-20 イノテック株式会社 半導体記憶装置、その製造方法及び半導体記憶装置の駆動方法
JP4191975B2 (ja) 2001-11-01 2008-12-03 イノテック株式会社 トランジスタとそれを用いた半導体メモリ、およびトランジスタの製造方法
JP2004072060A (ja) 2001-11-22 2004-03-04 Innotech Corp トランジスタとそれを用いた半導体メモリ、およびトランジスタの駆動方法
JP2003224215A (ja) 2001-11-22 2003-08-08 Innotech Corp トランジスタとそれを用いた半導体メモリ、およびトランジスタの駆動方法
US6861315B1 (en) 2003-08-14 2005-03-01 Silicon Storage Technology, Inc. Method of manufacturing an array of bi-directional nonvolatile memory cells

Also Published As

Publication number Publication date
TW200308079A (en) 2003-12-16
US6984863B2 (en) 2006-01-10
JP2004006658A (ja) 2004-01-08
US20030183872A1 (en) 2003-10-02
CN1447436A (zh) 2003-10-08
EP1349215A2 (en) 2003-10-01
US20060027857A1 (en) 2006-02-09
JP4472934B2 (ja) 2010-06-02
US7221029B2 (en) 2007-05-22

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20030326

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid