KR19990066454A - 반도체 장치의 트렌치 격리 형성 방법 - Google Patents

반도체 장치의 트렌치 격리 형성 방법 Download PDF

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Publication number
KR19990066454A
KR19990066454A KR1019980002390A KR19980002390A KR19990066454A KR 19990066454 A KR19990066454 A KR 19990066454A KR 1019980002390 A KR1019980002390 A KR 1019980002390A KR 19980002390 A KR19980002390 A KR 19980002390A KR 19990066454 A KR19990066454 A KR 19990066454A
Authority
KR
South Korea
Prior art keywords
trench
material layer
semiconductor substrate
etching
insulating film
Prior art date
Application number
KR1019980002390A
Other languages
English (en)
Korean (ko)
Inventor
홍창기
Original Assignee
윤종용
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 윤종용, 삼성전자 주식회사 filed Critical 윤종용
Priority to KR1019980002390A priority Critical patent/KR19990066454A/ko
Priority to GB9901480A priority patent/GB2333644A/en
Priority to TW088100962A priority patent/TW412834B/zh
Priority to JP11017647A priority patent/JPH11260903A/ja
Priority to DE19902999A priority patent/DE19902999A1/de
Priority to FR9900811A priority patent/FR2776126A1/fr
Publication of KR19990066454A publication Critical patent/KR19990066454A/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
KR1019980002390A 1998-01-26 1998-01-26 반도체 장치의 트렌치 격리 형성 방법 KR19990066454A (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019980002390A KR19990066454A (ko) 1998-01-26 1998-01-26 반도체 장치의 트렌치 격리 형성 방법
GB9901480A GB2333644A (en) 1998-01-26 1999-01-22 A method of forming void free trench isolation
TW088100962A TW412834B (en) 1998-01-26 1999-01-22 A method of forming a void free trench isolation
JP11017647A JPH11260903A (ja) 1998-01-26 1999-01-26 無空洞トレンチ隔離を形成する方法
DE19902999A DE19902999A1 (de) 1998-01-26 1999-01-26 Verfahren zur Ausbildung einer hohlraumfreien Grabenisolation
FR9900811A FR2776126A1 (fr) 1998-01-26 1999-01-26 Procede de formation d'une isolation par tranchee depourvue de partie vide

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019980002390A KR19990066454A (ko) 1998-01-26 1998-01-26 반도체 장치의 트렌치 격리 형성 방법

Publications (1)

Publication Number Publication Date
KR19990066454A true KR19990066454A (ko) 1999-08-16

Family

ID=19532169

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980002390A KR19990066454A (ko) 1998-01-26 1998-01-26 반도체 장치의 트렌치 격리 형성 방법

Country Status (6)

Country Link
JP (1) JPH11260903A (fr)
KR (1) KR19990066454A (fr)
DE (1) DE19902999A1 (fr)
FR (1) FR2776126A1 (fr)
GB (1) GB2333644A (fr)
TW (1) TW412834B (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100313695B1 (ko) * 1998-11-11 2001-11-17 니시무로 타이죠 반도체 장치의 제조 방법
KR100485518B1 (ko) * 2002-09-18 2005-04-27 동부아남반도체 주식회사 셀로우 트렌치 소자분리막의 제조 방법

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001118920A (ja) * 1999-10-15 2001-04-27 Seiko Epson Corp 半導体装置およびその製造方法
JP2001332613A (ja) * 2000-05-24 2001-11-30 Nec Corp 半導体装置の製造方法
US6518148B1 (en) * 2001-09-06 2003-02-11 Taiwan Semiconductor Manufacturing Company, Ltd Method for protecting STI structures with low etching rate liners
KR100476934B1 (ko) * 2002-10-10 2005-03-16 삼성전자주식회사 트렌치 소자분리막을 갖는 반도체소자 형성방법
CN111863706A (zh) * 2020-08-28 2020-10-30 上海华力微电子有限公司 闪存存储器及其制造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW291580B (en) * 1996-04-22 1996-11-21 United Microelectronics Corp Manufacturing process of shallow isolation trench
US5712185A (en) * 1996-04-23 1998-01-27 United Microelectronics Method for forming shallow trench isolation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100313695B1 (ko) * 1998-11-11 2001-11-17 니시무로 타이죠 반도체 장치의 제조 방법
KR100485518B1 (ko) * 2002-09-18 2005-04-27 동부아남반도체 주식회사 셀로우 트렌치 소자분리막의 제조 방법

Also Published As

Publication number Publication date
FR2776126A1 (fr) 1999-09-17
DE19902999A1 (de) 1999-07-29
JPH11260903A (ja) 1999-09-24
TW412834B (en) 2000-11-21
GB9901480D0 (en) 1999-03-17
GB2333644A (en) 1999-07-28

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