KR102582536B1 - 반도체 장치의 제조 방법 및 반도체 장치 - Google Patents

반도체 장치의 제조 방법 및 반도체 장치 Download PDF

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Publication number
KR102582536B1
KR102582536B1 KR1020160102810A KR20160102810A KR102582536B1 KR 102582536 B1 KR102582536 B1 KR 102582536B1 KR 1020160102810 A KR1020160102810 A KR 1020160102810A KR 20160102810 A KR20160102810 A KR 20160102810A KR 102582536 B1 KR102582536 B1 KR 102582536B1
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KR
South Korea
Prior art keywords
semiconductor
circuit formation
resin composition
formation surface
semiconductor wafer
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KR1020160102810A
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English (en)
Korean (ko)
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KR20170020277A (ko
Inventor
마사야 고다
이타루 와타나베
Original Assignee
스미토모 베이클리트 컴퍼니 리미티드
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Publication of KR20170020277A publication Critical patent/KR20170020277A/ko
Application granted granted Critical
Publication of KR102582536B1 publication Critical patent/KR102582536B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
KR1020160102810A 2015-08-12 2016-08-12 반도체 장치의 제조 방법 및 반도체 장치 KR102582536B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2015-159389 2015-08-12
JP2015159389A JP6617471B2 (ja) 2015-08-12 2015-08-12 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR20170020277A KR20170020277A (ko) 2017-02-22
KR102582536B1 true KR102582536B1 (ko) 2023-09-26

Family

ID=58049546

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020160102810A KR102582536B1 (ko) 2015-08-12 2016-08-12 반도체 장치의 제조 방법 및 반도체 장치

Country Status (4)

Country Link
JP (1) JP6617471B2 (zh)
KR (1) KR102582536B1 (zh)
CN (1) CN106449436B (zh)
TW (1) TWI691004B (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI670779B (zh) * 2018-11-16 2019-09-01 典琦科技股份有限公司 晶片封裝體的製造方法
SG11202109556QA (en) * 2019-03-27 2021-10-28 Mitsui Chemicals Tohcello Inc Protection film, method for affixing same, and method for manufacturing semiconductor component
CN110085522A (zh) * 2019-05-15 2019-08-02 强茂电子(无锡)有限公司 轴式二极管的制作方法
JP7370215B2 (ja) * 2019-10-25 2023-10-27 三菱電機株式会社 半導体装置の製造方法
JP2023017595A (ja) * 2021-07-26 2023-02-07 株式会社レゾナック 離型フィルム及び半導体パッケージの製造方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002016022A (ja) 2000-06-29 2002-01-18 Toshiba Corp 半導体装置の製造方法
JP2002100709A (ja) 2000-09-21 2002-04-05 Hitachi Ltd 半導体装置及びその製造方法
JP2003243344A (ja) * 2002-02-15 2003-08-29 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2004022656A (ja) * 2002-06-13 2004-01-22 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP2005285824A (ja) * 2004-03-26 2005-10-13 Sharp Corp 半導体チップの製造方法、および、半導体装置の製造方法
JP2007251098A (ja) 2006-03-20 2007-09-27 Seiko Epson Corp 半導体チップの製造方法
JP2009049410A (ja) 2007-08-17 2009-03-05 Samsung Electronics Co Ltd 半導体チップパッケージ、その製造方法及びこれを含む電子素子

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09107046A (ja) 1995-10-11 1997-04-22 Hitachi Chem Co Ltd 半導体パッケ−ジ
JP3456462B2 (ja) * 2000-02-28 2003-10-14 日本電気株式会社 半導体装置及びその製造方法
JP5534594B2 (ja) 2010-03-30 2014-07-02 リンテック株式会社 シート貼付方法およびウエハ加工方法
JP5728423B2 (ja) * 2012-03-08 2015-06-03 株式会社東芝 半導体装置の製造方法、半導体集積装置及びその製造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002016022A (ja) 2000-06-29 2002-01-18 Toshiba Corp 半導体装置の製造方法
JP2002100709A (ja) 2000-09-21 2002-04-05 Hitachi Ltd 半導体装置及びその製造方法
JP2003243344A (ja) * 2002-02-15 2003-08-29 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2004022656A (ja) * 2002-06-13 2004-01-22 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP2005285824A (ja) * 2004-03-26 2005-10-13 Sharp Corp 半導体チップの製造方法、および、半導体装置の製造方法
JP2007251098A (ja) 2006-03-20 2007-09-27 Seiko Epson Corp 半導体チップの製造方法
JP2009049410A (ja) 2007-08-17 2009-03-05 Samsung Electronics Co Ltd 半導体チップパッケージ、その製造方法及びこれを含む電子素子

Also Published As

Publication number Publication date
KR20170020277A (ko) 2017-02-22
JP6617471B2 (ja) 2019-12-11
TW201717292A (zh) 2017-05-16
CN106449436B (zh) 2021-02-09
TWI691004B (zh) 2020-04-11
CN106449436A (zh) 2017-02-22
JP2017038005A (ja) 2017-02-16

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