KR102468793B1 - 반도체 웨이퍼, 반도체 구조체 및 이를 제조하는 방법 - Google Patents

반도체 웨이퍼, 반도체 구조체 및 이를 제조하는 방법 Download PDF

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Publication number
KR102468793B1
KR102468793B1 KR1020160002779A KR20160002779A KR102468793B1 KR 102468793 B1 KR102468793 B1 KR 102468793B1 KR 1020160002779 A KR1020160002779 A KR 1020160002779A KR 20160002779 A KR20160002779 A KR 20160002779A KR 102468793 B1 KR102468793 B1 KR 102468793B1
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South Korea
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semiconductor wafer
height
inclined surface
wafer
point
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Korean (ko)
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KR20170083384A (ko
Inventor
김종수
최삼종
구태형
김수련
김청준
유지원
주현희
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삼성전자주식회사
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Priority to KR1020160002779A priority Critical patent/KR102468793B1/ko
Priority to US15/354,320 priority patent/US9806036B2/en
Priority to JP2016229899A priority patent/JP6899648B2/ja
Priority to CN201710009776.3A priority patent/CN106992113B/zh
Publication of KR20170083384A publication Critical patent/KR20170083384A/ko
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    • H01L23/544—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H01L21/324—
    • H01L21/682—
    • H01L22/12—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H10P90/123—Preparing bulk and homogeneous wafers by grinding or lapping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H10P90/128—Preparing bulk and homogeneous wafers by edge treatment, e.g. chamfering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H10P90/18—Preparing bulk and homogeneous wafers by shaping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H01L2223/54493—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/201—Marks applied to devices, e.g. for alignment or identification located on the periphery of wafers, e.g. orientation notches or lot numbers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/301—Marks applied to devices, e.g. for alignment or identification for alignment

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  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
KR1020160002779A 2016-01-08 2016-01-08 반도체 웨이퍼, 반도체 구조체 및 이를 제조하는 방법 Active KR102468793B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020160002779A KR102468793B1 (ko) 2016-01-08 2016-01-08 반도체 웨이퍼, 반도체 구조체 및 이를 제조하는 방법
US15/354,320 US9806036B2 (en) 2016-01-08 2016-11-17 Semiconductor wafer, semiconductor structure and method of manufacturing the semiconductor wafer
JP2016229899A JP6899648B2 (ja) 2016-01-08 2016-11-28 半導体ウェーハ、半導体構造体、及びそれを製造する方法
CN201710009776.3A CN106992113B (zh) 2016-01-08 2017-01-06 半导体晶片、半导体结构及制造半导体晶片的方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020160002779A KR102468793B1 (ko) 2016-01-08 2016-01-08 반도체 웨이퍼, 반도체 구조체 및 이를 제조하는 방법

Publications (2)

Publication Number Publication Date
KR20170083384A KR20170083384A (ko) 2017-07-18
KR102468793B1 true KR102468793B1 (ko) 2022-11-18

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US (1) US9806036B2 (https=)
JP (1) JP6899648B2 (https=)
KR (1) KR102468793B1 (https=)
CN (1) CN106992113B (https=)

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JP6493253B2 (ja) * 2016-03-04 2019-04-03 株式会社Sumco シリコンウェーハの製造方法およびシリコンウェーハ
KR101992778B1 (ko) * 2017-11-01 2019-06-25 에스케이실트론 주식회사 웨이퍼 및 그 형상 분석 방법
KR102483923B1 (ko) * 2017-12-27 2023-01-02 삼성전자 주식회사 베벨부를 갖는 반도체 웨이퍼
US10978331B2 (en) * 2018-03-30 2021-04-13 Taiwan Semiconductor Manufacturing Co., Ltd. Systems and methods for orientator based wafer defect sensing
CN109926911A (zh) * 2019-03-04 2019-06-25 天通日进精密技术有限公司 晶圆凹口抛光装置及晶圆凹口抛光方法
CN110842754A (zh) * 2019-11-14 2020-02-28 西安奕斯伟硅片技术有限公司 一种边缘抛光系统、边缘抛光方法及晶圆
JP7578403B2 (ja) * 2020-03-02 2024-11-06 株式会社東京精密 シリコンウエハの表面改質方法
KR102457699B1 (ko) * 2020-07-16 2022-10-24 에스케이실트론 주식회사 웨이퍼 및 그 형상 분석 방법

Citations (1)

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JP2002001636A (ja) * 2000-06-23 2002-01-08 Memc Japan Ltd ウエハの面取り加工方法

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JP3580600B2 (ja) * 1995-06-09 2004-10-27 株式会社ルネサステクノロジ 半導体装置の製造方法およびそれに使用される半導体ウエハ並びにその製造方法
JP3213563B2 (ja) 1997-03-11 2001-10-02 株式会社スーパーシリコン研究所 ノッチレスウェーハの製造方法
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Also Published As

Publication number Publication date
CN106992113B (zh) 2020-03-03
KR20170083384A (ko) 2017-07-18
US20170200683A1 (en) 2017-07-13
JP6899648B2 (ja) 2021-07-07
CN106992113A (zh) 2017-07-28
US9806036B2 (en) 2017-10-31
JP2017123458A (ja) 2017-07-13

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