KR102082803B1 - 실리콘 다이옥사이드 기판의 식각 방법 및 식각 장치 - Google Patents

실리콘 다이옥사이드 기판의 식각 방법 및 식각 장치 Download PDF

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KR102082803B1
KR102082803B1 KR1020177018336A KR20177018336A KR102082803B1 KR 102082803 B1 KR102082803 B1 KR 102082803B1 KR 1020177018336 A KR1020177018336 A KR 1020177018336A KR 20177018336 A KR20177018336 A KR 20177018336A KR 102082803 B1 KR102082803 B1 KR 102082803B1
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South Korea
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gas
etching
temperature
silicon dioxide
dioxide substrate
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KR1020177018336A
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Korean (ko)
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KR20170092645A (ko
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나 저우
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베이징 나우라 마이크로일렉트로닉스 이큅먼트 씨오., 엘티디.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
KR1020177018336A 2014-12-04 2015-12-01 실리콘 다이옥사이드 기판의 식각 방법 및 식각 장치 KR102082803B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN201410742698.4A CN105719965A (zh) 2014-12-04 2014-12-04 二氧化硅基片的刻蚀方法和刻蚀设备
CN201410742698.4 2014-12-04
PCT/CN2015/096128 WO2016086841A1 (zh) 2014-12-04 2015-12-01 二氧化硅基片的刻蚀方法和刻蚀设备

Publications (2)

Publication Number Publication Date
KR20170092645A KR20170092645A (ko) 2017-08-11
KR102082803B1 true KR102082803B1 (ko) 2020-02-28

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KR1020177018336A KR102082803B1 (ko) 2014-12-04 2015-12-01 실리콘 다이옥사이드 기판의 식각 방법 및 식각 장치

Country Status (5)

Country Link
JP (1) JP6423534B2 (zh)
KR (1) KR102082803B1 (zh)
CN (1) CN105719965A (zh)
SG (1) SG11201704068YA (zh)
WO (1) WO2016086841A1 (zh)

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Publication number Priority date Publication date Assignee Title
JP2019102483A (ja) * 2017-11-28 2019-06-24 東京エレクトロン株式会社 エッチング方法およびエッチング装置
US11171011B2 (en) 2018-08-21 2021-11-09 Lam Research Corporation Method for etching an etch layer
TW202117847A (zh) * 2019-07-17 2021-05-01 美商得昇科技股份有限公司 使用沉積製程和蝕刻製程的工件處理
JP7382578B2 (ja) * 2019-12-27 2023-11-17 パナソニックＩｐマネジメント株式会社 プラズマ処理方法および素子チップの製造方法
CN111952169A (zh) * 2020-08-21 2020-11-17 北京北方华创微电子装备有限公司 聚酰亚胺刻蚀方法
CN113451126B (zh) * 2021-07-07 2024-02-27 北京北方华创微电子装备有限公司 晶圆刻蚀方法
CN114685057A (zh) * 2022-03-30 2022-07-01 广东佛智芯微电子技术研究有限公司 一种玻璃基板的纳米金属诱导蚀刻方法
CN114664649B (zh) * 2022-05-19 2022-09-20 浙江大学杭州国际科创中心 碳化硅高深宽比槽刻蚀工艺优化方法

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JP2013021192A (ja) * 2011-07-12 2013-01-31 Tokyo Electron Ltd プラズマエッチング方法
CN103700621A (zh) * 2013-12-27 2014-04-02 华进半导体封装先导技术研发中心有限公司 一种高深宽比垂直玻璃通孔的刻蚀方法

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JP3208596B2 (ja) * 1992-04-01 2001-09-17 ソニー株式会社 ドライエッチング方法
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US20070190743A1 (en) * 2005-12-28 2007-08-16 Roberto Colombo Process for digging a deep trench in a semiconductor body and semiconductor body so obtained
JP2013021192A (ja) * 2011-07-12 2013-01-31 Tokyo Electron Ltd プラズマエッチング方法
CN103700621A (zh) * 2013-12-27 2014-04-02 华进半导体封装先导技术研发中心有限公司 一种高深宽比垂直玻璃通孔的刻蚀方法

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Publication number Publication date
JP2017536701A (ja) 2017-12-07
KR20170092645A (ko) 2017-08-11
SG11201704068YA (en) 2017-06-29
CN105719965A (zh) 2016-06-29
WO2016086841A1 (zh) 2016-06-09
JP6423534B2 (ja) 2018-11-14

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