KR101227291B1 - Ｓｒａｍ용 워드선 구동 회로 및 그를 위한 방법 - Google Patents

Ｓｒａｍ용 워드선 구동 회로 및 그를 위한 방법 Download PDF

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Publication number
KR101227291B1
KR101227291B1 KR1020077011213A KR20077011213A KR101227291B1 KR 101227291 B1 KR101227291 B1 KR 101227291B1 KR 1020077011213 A KR1020077011213 A KR 1020077011213A KR 20077011213 A KR20077011213 A KR 20077011213A KR 101227291 B1 KR101227291 B1 KR 101227291B1
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South Korea
Prior art keywords
delete delete
voltage
power
power node
word line
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Korean (ko)
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KR20070084313A (ko
Inventor
스코트 아이. 레밍톤
제임스 디. 부르네트
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프리스케일 세미컨덕터, 인크.
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
KR1020077011213A 2004-11-18 2005-10-25 Ｓｒａｍ용 워드선 구동 회로 및 그를 위한 방법 Expired - Lifetime KR101227291B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/991,910 US7085175B2 (en) 2004-11-18 2004-11-18 Word line driver circuit for a static random access memory and method therefor
US10/991,910 2004-11-18
PCT/US2005/038468 WO2006055190A1 (en) 2004-11-18 2005-10-25 Word line driver circuit for a static random access memory and method therefor

Publications (2)

Publication Number Publication Date
KR20070084313A KR20070084313A (ko) 2007-08-24
KR101227291B1 true KR101227291B1 (ko) 2013-01-29

Family

ID=36386078

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020077011213A Expired - Lifetime KR101227291B1 (ko) 2004-11-18 2005-10-25 Ｓｒａｍ용 워드선 구동 회로 및 그를 위한 방법

Country Status (5)

Country Link
US (1) US7085175B2 (enExample)
JP (1) JP4988588B2 (enExample)
KR (1) KR101227291B1 (enExample)
CN (1) CN101040343B (enExample)
WO (1) WO2006055190A1 (enExample)

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US7440313B2 (en) * 2006-11-17 2008-10-21 Freescale Semiconductor, Inc. Two-port SRAM having improved write operation
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JP5064089B2 (ja) * 2007-04-12 2012-10-31 パナソニック株式会社 半導体集積回路
JP5224040B2 (ja) * 2008-04-01 2013-07-03 ルネサスエレクトロニクス株式会社 半導体集積回路装置
JP5262454B2 (ja) * 2008-09-01 2013-08-14 富士通セミコンダクター株式会社 半導体メモリ
US7903483B2 (en) * 2008-11-21 2011-03-08 Freescale Semiconductor, Inc. Integrated circuit having memory with configurable read/write operations and method therefor
TWI404065B (zh) * 2009-02-13 2013-08-01 Univ Hsiuping Sci & Tech 寫入操作時提高字元線電壓位準之單埠靜態隨機存取記憶體
US7864617B2 (en) * 2009-02-19 2011-01-04 Freescale Semiconductor, Inc. Memory with reduced power supply voltage for a write operation
US8315117B2 (en) * 2009-03-31 2012-11-20 Freescale Semiconductor, Inc. Integrated circuit memory having assisted access and method therefor
US8379466B2 (en) 2009-03-31 2013-02-19 Freescale Semiconductor, Inc. Integrated circuit having an embedded memory and method for testing the memory
US8634263B2 (en) * 2009-04-30 2014-01-21 Freescale Semiconductor, Inc. Integrated circuit having memory repair information storage and method therefor
KR101068571B1 (ko) * 2009-07-03 2011-09-30 주식회사 하이닉스반도체 반도체 메모리 장치
US8514611B2 (en) * 2010-08-04 2013-08-20 Freescale Semiconductor, Inc. Memory with low voltage mode operation
US8228713B2 (en) 2010-09-28 2012-07-24 International Business Machines Corporation SRAM having wordline up-level voltage adjustable to assist bitcell stability and design structure for same
US8582351B2 (en) 2010-09-28 2013-11-12 International Business Machines Corporation Methods and systems for adjusting wordline up-level voltage to improve production yield relative to SRAM-cell stability
KR101799482B1 (ko) * 2010-12-29 2017-11-20 삼성전자주식회사 기입 어시스트 회로를 포함하는 정적 메모리 장치
JP5653856B2 (ja) * 2011-07-21 2015-01-14 ルネサスエレクトロニクス株式会社 半導体装置
US8811110B2 (en) * 2012-06-28 2014-08-19 Intel Corporation Configuration for power reduction in DRAM
US8804449B2 (en) 2012-09-06 2014-08-12 Micron Technology, Inc. Apparatus and methods to provide power management for memory devices
KR102083488B1 (ko) 2013-09-12 2020-03-02 삼성전자 주식회사 테스트 인터페이스 보드 및 이를 포함하는 테스트 시스템
CN103531229A (zh) * 2013-10-18 2014-01-22 上海工程技术大学 一种静态随机存储器
JP6424448B2 (ja) * 2014-03-28 2018-11-21 株式会社ソシオネクスト 半導体記憶装置
US9455023B1 (en) * 2015-10-14 2016-09-27 Oracle International Corporation Wordline under-driving using a virtual power network
IT201600121631A1 (it) 2016-11-30 2018-05-30 St Microelectronics Srl Dispositivo di memoria a cambiamento di fase con un circuito di pilotaggio di linea di parola a elevata velocita'
JP2020042878A (ja) * 2018-09-12 2020-03-19 株式会社東芝 半導体記憶装置
US11282569B2 (en) * 2020-01-28 2022-03-22 Micron Technology, Inc. Apparatus with latch balancing mechanism and methods for operating the same

Citations (1)

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US6512705B1 (en) 2001-11-21 2003-01-28 Micron Technology, Inc. Method and apparatus for standby power reduction in semiconductor devices

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Also Published As

Publication number Publication date
KR20070084313A (ko) 2007-08-24
US20060104107A1 (en) 2006-05-18
WO2006055190A1 (en) 2006-05-26
CN101040343B (zh) 2013-11-20
CN101040343A (zh) 2007-09-19
JP2008521157A (ja) 2008-06-19
US7085175B2 (en) 2006-08-01
JP4988588B2 (ja) 2012-08-01

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